JPH0259923A - Method and device for controlling disk - Google Patents

Abstract

PURPOSE:To shorten the disk device access time of a host computer by executing data reading from a disk device and data transfer to the host computer in parallel. CONSTITUTION:A comparator 111 compares a drive sector address stored in a register 18 with a host sector address stored in a register 19, and when both the addresses coincide with each other, sends a coincidence signal to a pointer control circuit 114. The circuit 114 transfers data stored in a track buffer 122 located on a position pointed by a host pointer 119 to the host computer on the basis of the coincidence signal in parallel with data reading from the disk device. Thereby, the data of the disk device can be entered during the rotation waiting tie of a sector storing data to be first transferred to the host computer. Consequently, the disk device access time of the host computer can be shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a disk control method and device that make it possible to shorten the data read access time of a disk device.

[Conventional technology]

As described in Japanese Unexamined Patent Application Publication No. 62-54885, a conventional disk control device, after starting to read data from a disk device, first reads the selector address that the head of the disk device passed first and determines the current head address. The system recognized the position, then read the data of the sector that the head passes into the track buffer, read all the data to be transferred to the host computer, and then transferred this data to the host computer.

[Problems to be Solved by the Invention] In the above conventional technology, the rotational transit time of the first sector after the start of data reading from the disk device is not used for data reading, and the time required for reading data from the disk device and The problem was that data transfer to the host computer was completely separated.

It is an object of the present invention to capture data in readable sectors into a track buffer immediately after starting data reading from a disk device, and to load data from a readable sector into a track buffer immediately after reading data from a disk device, and to load data into a track buffer from a disk device when data to be transferred for the first time to a host computer is captured.
The object of the present invention is to reduce the time required for the host computer to access the disk device by reading data from the host computer and transferring data to the host computer in parallel.

[Means to solve the problem]

In order to solve the above problems, the present invention provides a disk control method for controlling data transfer between a host computer and a disk device. When the first data to be transferred to the host computer is captured, data is read from the disk device and data is transferred to the host computer in parallel, and the data transferred to the host computer is captured in the above buffer. It is characterized in that when the data is reached, the data captured in the buffer is transferred from the host 1 to the computer.

Further, as a means for solving the above problems, the present invention provides a method for verifying the validity of data being read from a disk device in a disk control device that controls data transfer between a host computer and a disk device. means, transfer start end detection means for detecting a start end to be transferred to the host computer from data being read from the disk device a; and a data capacity equal to or more than one track of the disk device;
A track buffer having a plurality of independent bus interfaces; and a buffer control means for instructing the track buffer to store the data read from the disk device and to instruct the storage position of the data to be transferred to the host computer. It is characterized in that it is equipped with and configured.

The ID verification means preferably includes a group of registers that store the twisting portion of the disk device, a register that stores the data address mark, and a first comparator that checks the twisting portion of the disk device and the data address mark. , and a register control circuit for controlling the ID register group and the first comparator.

Further, the transfer start end detection means preferably includes a register for storing the last read drive sector address of the transfer device, and a register for storing the host 1 sector address to be transferred last to the host computer. and a second comparator for comparing these two registers.

Furthermore, the buffer control means preferably includes a drive pointer for controlling the data storage position of the track buffer, a host 1 pointer for controlling the data output position of the track buffer, and a pointer for controlling these two pointers. It is configured by providing a control circuit.

One aspect of the disk control device of the present invention is a disk control device that controls data transfer between a host computer and a disk device.

a group of registers for storing the twisted portion of the disk device; a register for storing the data address mark; a first comparator for checking the twisted portion of the disk device and the data address mark; A register control circuit that controls the comparator No. 1, a register that stores the last read drive sector address of the disk device, and a register that stores the host sector address that is first transferred to the host computer. It has a second comparator that compares two registers, and a data capacity that is more than one track of a disk device.
A track buffer having a plurality of independent bus interfaces, a drive pointer that controls the data storage position of the track buffer, a host pointer that controls the data output position of the track buffer, and a pointer control that controls these two pointers. There is a disk control device characterized by being provided with a circuit.

The above aspect can be further embodied as follows. As the bus interface of the above-mentioned track buffer, it is possible to use a drive port that inputs data in synchronization with clock pulses from the disk device, and a host port that outputs data in synchronization with clock pulses from host 1 to the computer. preferable.

In the above aspect, the pointer control circuit is configured to transfer data from the disk device to the track buffer when the drive sector address and host sector address stored in the two registers match as a result of comparison by the second comparator. It is preferable to have a configuration in which manual labor and data output from the track buffer to the host computer are performed in parallel.

Further, in the above embodiment, a register is provided to define the number of customers in the track buffer, and a host counter that counts the number of data transferred to and from the host computer, and a drive counter that counts the number of data transferred to and from the disk device. It is preferable to provide one.

[Operation] The operation of the present invention will be explained using the above-mentioned specific embodiments.

When reading data from a disk device, the ID register group, ID register control circuit, and first comparator:
It checks the validity of the disk drive, stores the drive sector address and host sector address in registers, and stores data via the drive port to the track buffer location pointed to by the drive pointer.

The drive pointer moves the position pointed to each time one hide of data is stored. The second comparator compares the drive sector address and the host sector address, and if they match, sends a match signal to the pointer control circuit.

Based on this coincidence signal, the pointer control circuit checks the drive pointer position or drive counter value in parallel with reading data from the disk device, and after confirming that data can be transferred to the host computer, transfers the data to the host computer. , the data in the trunk buffer at the position pointed to by the host pointer is transferred to the host computer, and the host counter is decremented every time one byte is transferred, and the position pointed to by the host pointer is moved. If the value of the host counter becomes O, data transfer ends.

In addition, the values of the drive pointer and host pointer are
At the beginning of the drive buffer, the values of the drive counter and host counter are initialized in advance to the number of data bytes to be transferred to the host computer.

In this way, the data access time of the host computer is shortened by storing the data to be accessed in the track buffer in the sector storing the data to be transferred first to the host computer.

C Embodiment] Hereinafter, an embodiment of a disk control method of the present invention and a device for carrying out the method will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of essential parts of a disk control system according to an embodiment of the present invention.

In the figure, 11 is a register that stores an address mark, and 12 is a register that stores an address mark.
is a register that stores the upper hide of the cylinder address,
Reference numeral 13 is a register that stores the lower hide of the cylinder address, 14 is a register that stores a head address, and 15 is a register that stores a flag, and these constitute an ID register group. 16 is a register that stores a data address mark. 17 is C of the twisting part of the disk device
CRC calculation circuit for RC inspection, 18 is the last (latest)
This register stores the read drive sector address of the disk device.

100 is a serial-to-parallel conversion circuit, and 110 is a comparator for inspecting the disk unit and data address mark. 171 is register 1, 12, 13, 1
4, 15, 16.18 and CRC calculation circuit 17 and comparator 1
10 and is a register control circuit. These constitute ID verification means.

19 is a register that stores the host l-sector address to be transferred to the host computer first; 111 is a comparator 11;
The drive sector address stored in the register 18 is compared with the host sector address stored in the register 19, and if -M, the pointer control circuit 114
This is a comparator that sends an enable signal to the these are,
It functions as a transfer start end detection means.

122 has a data capacity equal to or more than one track of the disk device, stores the data from the drive port 121 at the position pointed to by the drive pointer 120, and stores the data from the drive port 121 at the position pointed to by the drive pointer 120.
This is a track buffer that outputs the data at the position indicated by 19 to the host board 1-118. The drive boat 121 receives data from the disk device in synchronization with the clock using the enable signal sent from the B/S counter 113, and sends pulses to the B/S counter 113 and the drive pointer 120. host port 118
sends out the data in the track buffer 122 in synchronization with the read clock from the host computer in response to an enable signal sent from the pointer control circuit 114;
A pulse is sent to host counter 112 and pointer control circuit 114. In response to this, the counter 112 to host 1 counts the number of data transferred to and from the host computer as count 1.
- to do.

Pointer control circuit 114 is enabled to operate by an enable signal from comparator 110, and changes the pointer control mode of drive pointer 120 and host pointer 119 by an enable signal from comparator 111. 11
6 is a register that defines the capacity of the track buffer 122; 117 is a register that stores the number of data bytes per sector;
This is a register that sends the value held by the B/S counter 113 to the B/S counter 113 in response to a signal sent from the B/S counter 113.

When the B/S counter 113 receives an enable signal sent from the pointer control circuit 114.

The drive port 121 and the register 117 send a hay enable signal, and the value is decreased by the signal from the drive port 1-121. When the decreased result becomes O, it is assumed that data capture for one sector has been completed, and the drive port 12↓ and A reset signal is sent to the register 117.

The position of the drive pointer 120 pointing to the track buffer 122 is increased by a signal from the drive boat 121, and the end point is defined by the value of the register 116. Host pointer 119 is controlled by pointer control circuit 114. The drive counter 115 counts the number of data transfers with the disk device. It is activated by the pointer control circuit 114 and decreases its value in response to a signal from the drive port 121. When the decreased value reaches 0, the drive counter 115 counts the number of data transfers to and from the disk device. Send a signal. Together with the pointer control circuit 114, the register indicating the capacity of the track buffer, the B/S counter 113, etc., these constitute buffer control means.

3 and 4 are flowcharts of the processing of the disk control device of this embodiment shown in FIG. 1. FIG. 3 shows data import processing from the disk device, and FIG. 4 shows data transfer processing to the host computer.

First, in step 31, registers 11, 12°13.1
4, 15, and 16 are initialized, and the sector address of the sector to be transferred first to the host computer is set in the register 19. The number of data bytes for one track of the disk device is set in register 116, and the number of data bytes per sector is set in register 117. The pointers of drive pointer 120 and host pointer 119 are initialized to the start end of track buffer 122. Further, the number of data bytes to be transferred to the host computer is set in the host counter 112, and the same value as the value of the host counter 112 is set in the drive counter 115.

Next, in step 32, a read gate (not shown) in the drive interface is asserted to start reading to the disk device.

In step 33, the CR is read under the control of the rD register control circuit 171 in synchronization with the read clock from the disk device.
Activate the C calculation circuit 17 and register the registers 11, 12, 13,
The comparator 110 compares each register 14 and 15 with the storage area of the disk device, and also compares the registers 14 and 15 of the disk device.
- Store the response value in register 18. When the comparison by the comparator 110 does not match, or when the comparator 110 receives a CRC error signal from the CRC calculation circuit 17.

Comparator 110 sends out an enable signal to ID register control circuit 171 and proceeds to error processing. A match is obtained in the comparison, the validity of the ID part is confirmed, and C
Upon receiving an enable signal from the RC calculation circuit 17, the comparator 110 sends out an enable signal to the ID register control circuit 171, and compares the data address mark stored in the register 16 with the data address mark of the disk device. If the two do not match, the comparator 110
D control circuit 171 sends out an enable signal;
Let's move on to error handling. Also, if they match, the comparator 11
0 is the comparator 111 and pointer control port, ? fil1
4, and the process proceeds to step 34.

In step 34, the value of the drive sector stored in the register 18 and the value of the host sector stored in the register 19 are processed.
- The value of the sector is compared by the comparator 111, and if they do not match, the process proceeds to step 35. If they match, proceed to step 36.

In step 35, the pointer control circuit 114 controls the B/S
The counter 113 sends out an enable signal, and upon receiving this enable signal, the B/S counter 113 sends out an enable signal to the register 117 and the drive port h]t, 21. As a result, the register 117 stores the number of bytes per sector held by the B/S counter 1.
Set to 13. When the drive port 121 receives the enable signal sent from the B/S counter 113,
Data is received and taken one byte at a time from the disk device in synchronization with the read clock, and the data is stored in the position of the track buffer 122 pointed to by the drive pointer 120. Each time one byte of data is taken in, the B/S counter 113 and the drive pointer are 120 pulses are sent. B/S
The counter decrements the value and updates the track buffer location pointed to by the drive pointer 120. The host pointer 119 updates its value in conjunction with the drive pointer 120. When the B/S counter 113 decreases to O, it sends out an enable signal to the drive port 121 and stops reading data from the disk device. Then, the process returns to step 33 again.

In step 36, the comparator 111 sends out the pointer control circuit 114 hay enable signal, and the pointer control circuit 1
14 separates the drive pointer 120 and host pointer 119 upon receiving this enable signal, and connects the drive pointer 120 with a pulse from the drive port 121.
Only make it work. Thereafter, the process moves to two processes: the process after step 37 and the process after step 41 in FIG. 4. That is, data reading from the disk device and data transfer to the host computer are performed in parallel.

Step 37 is similar to step 33.

Step 38 is similar to step 35 except that the drive pointer 120 and the host 1 pointer 119 are separated and only the drive pointer 120 operates with the pulse of the drive port 121 color.

The drive counter 115 also decrements its value in response to a pulse from the drive port 121 in step 38 .

In step 39, if the drive pointer 120 points to the end of the track buffer 122 defined by the register 116 or if the value of the drive counter 115 is 0, data reading from the disk device is terminated.

On the other hand, in FIG. 4, in step 41, the pointer control circuit 114 determines whether the positions pointed to by the drive pointer 120 and the host pointer 119 are separated by more than the value of the number of data bytes per sector stored in the register 117. The process proceeds to step 448, and if it is less than 8, the process proceeds to step 42.

At step 42, drive pointer 120 is set to register 1.
16, or if the value of the drive counter 115 is O in step 43, step 4
The process advances through 4 steps, and if neither is the case, the process returns to step 41 again.

In step 44, the pointer control circuit 114 sends a host port 118 hay enable signal, and the host port 118 sends the host port 118 to the track buffer 12 pointed to by the host pointer 119 in synchronization with the read clock of the host computer.
2 is transferred to the host computer, and pulses are sent to the host counter 112 and pointer control circuit 114.

The host counter 112 decreases its value by this pulse, and when the decreased value becomes O, the pointer control circuit 11
Sends a transfer end signal to 4. Further, the pointer control circuit 114 moves the position of the host pointer 119 using a pulse from the host port 118, and when the value after the movement points to the end of the track buffer 122 defined by the register 116, the pointer control circuit 114 moves the position of the host pointer 119 using a pulse from the host port 118. The value of is reset to the starting end of the track buffer 122. In this way, data is transferred to the host computer for the number of data bytes per sector stored in the register 117,
Proceed to step 45.

In step 45, pointer control circuit 114, upon receiving the transfer end signal from host counter 112, sends a disable signal to host port 118 to end the data transfer. If the transfer end signal is not received from the host counter 112, the process returns to step 418 again.

According to the disk control device of this embodiment, as shown in FIG. 2, data from the disk device can be taken in during the rotation wait time of the sector that stores the data to be first transferred to the host computer. The access time of the host computer to the disk device can be shortened compared to the disk control device of the above.

Note that the drive counter 115 determines whether the data is read to the track buffer 122 when the disk control device of this embodiment reads data from some sectors on the 1st rack of the disk device and transfers it to the host computer. When the transfer is completed, the drive interface is opened to complete the necessary data transfer to the host computer, and the disk controller can immediately execute the next command from the host computer.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to import data from the disk device during the rotation wait time of the sector that stores the data to be transferred first to the host computer, so that the host computer can access the disk device. This has the effect of reducing time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the main parts of a disk control device according to an embodiment of the present invention, FIG. 2 is a time chart showing the operation of the above embodiment, and FIG. FIG. 4 is a flowchart of the data import process to the disk control device, which is a flowchart 1 of the data transfer process from the disk control device to the host computer shown in FIG. kl, 12, 13, 14, 15, 16, 18° 19.1
16,117...Register, 17...CRC calculation circuit, 100...Serial-to-parallel conversion circuit, 110.1
11... Comparator, 112... Host counter, 113... B/S counter, 114... Pointer control circuit, 115... Drive counter, 118... Host port, 119... Host Pointer, 120... Drive pointer, 121... Drive port, 122... Track buffer, 171... ID register control circuit. Third eye

Claims (1)

[Claims] 1. In a disk control method for controlling data transfer between a host computer and a disk device, immediately after data reading from the disk device starts, data in readable sectors is captured in a track buffer, and the host When the first data to be transferred to the computer is captured, data is read from the disk device and data is transferred to the host computer in parallel, and the data transferred to the host computer reaches the data captured in the above buffer. 1. A disk control method characterized in that the data loaded in the buffer is transferred to a host computer at a point in time. 2. In a disk control device that controls data transfer between a host computer and a disk device, ID verification means that verifies the validity of data being read from the disk device; has a transfer start edge detection means for detecting the start edge of the transfer, and has a data capacity equal to or more than one track of the disk device,
A track buffer having a plurality of independent bus interfaces; and a buffer control means for instructing the track buffer to store the data read from the disk device and to instruct the storage position of the data to be transferred to the host computer. A disk control device comprising: 3. The ID verification means includes a group of ID registers that store a storage section of a disk device, a register that stores a data address mark, and a first comparator that tests the ID section and data address mark of the disk device; 3. The disk control device according to claim 2, further comprising a register control circuit for controlling the register group and the first comparator. 4. The transfer start end detection means compares two registers: a register that stores the last read drive sector address of the disk device and a register that stores the host sector address to be transferred to the host computer first. 3. The disk control device according to claim 2, further comprising a second comparator that performs the following steps. 5. The buffer control means includes a drive pointer that controls the data storage position of the track buffer, a host pointer that controls the data output position of the track buffer, and a pointer control circuit that controls these two pointers. 3. The disk control device according to claim 2, comprising: 6. In a disk control device that controls data transfer between a host computer and a disk device, an ID register group that stores the ID section of the disk device, a register that stores a data address mark, and a group of ID registers that store the ID section of the disk device and the data a first comparator that checks an address mark; an ID register control circuit that controls the ID register group and the first comparator; and a register that stores the drive sector address of the ID section of the disk device that was last read. , a register that stores the host sector address to be transferred first to the host computer, a second comparator that compares these two registers, and a data capacity that is equal to or more than one track of the disk device.
A track buffer having a plurality of independent bus interfaces, a drive pointer that controls the data storage position of the track buffer, a host pointer that controls the data output position of the track buffer, and a pointer control that controls these two pointers. A disk control device characterized by being provided with a circuit. 7. The bus interface of the above track buffer is a drive port that inputs data in synchronization with clock pulses from the disk device, and a host port that outputs data in synchronization with clock pulses from the host computer. 7. The disk control device according to claim 6. 8. The pointer control circuit is configured to transfer data from the disk device to the track buffer if the drive sector address and host sector address stored in the two registers match as compared by the second comparator. 7. The disk control device according to claim 6, wherein said disk control device is configured to perform control so that input and data output from said track buffer to said host computer are performed in parallel. 9. The disk control device according to claim 6, further comprising a register that defines the capacity of the track buffer. 10. The disk control device according to claim 6, further comprising a host counter that counts the number of data transferred to and from the host computer, and a drive counter that counts the number of data transferred to and from the disk device.