JPH0258988A - Picture signal movement detecting device - Google Patents

Abstract

PURPOSE:To prevent that a moving block and a still block are erroneously decided by introducing a value having the minimum influence of a noise as the value to express the moving amount of each block unit. CONSTITUTION:One picture is partitioned into many three-dimensional blocks, the maximum value MAX3, the minimum value MIN3, and a dynamic range DR3 of picture element data included in each block are obtained, and further, the moving amount of a sample unit, for example, a frame difference FDi, is detected from the picture element data which are chronologically different and included in the same block. This frame difference TDi and plural thresholds are compared, and the number of samples included in plural areas to be prescribed by the thresholds is obtained. The existence of the movement of the block is detected based on the number of the samples. Thus, since the value to indicate the moving amount of the block is hardly influenced by the noise, the static block and the dynamic block can be correctly decided.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a motion detection device for an image signal applied to a high-efficiency encoding device for an image signal, particularly when recording a digital video signal on a magnetic tape. The present invention relates to an image signal motion detection device used in an information amount control device that controls the transmission rate of recorded data to a predetermined value corresponding to a transmission path.

[Summary of the Invention] The present invention provides an information amount control device that controls the amount of generated information so that it does not exceed the transmission capacity of a transmission path when performing variable length encoding in which the number of encoded bits is variable depending on the dynamic range. In the required image signal motion detection device, the amount of motion in sample units is compared with multiple thresholds, the number of samples included in multiple areas defined by multiple thresholds is determined, and these The presence or absence of movement in a block is detected based on the number of samples contained in multiple regions, thus preventing a stationary block from being mistakenly determined as a moving block due to noise. .

[Conventional technology]

The applicant of this application calculates the dynamic range, which is the difference between the maximum and minimum values of multiple pixels included in a two-dimensional block, as described in Japanese Patent Application No. 59-266407, and calculates the dynamic range based on this dynamic range. A high-efficiency encoding device that performs adaptive encoding is proposed. Also, a special request in 1986
As described in Japanese Patent No. 232,789, a high-efficiency encoding device has been proposed that performs encoding adapted to the dynamic range of a three-dimensional block formed from pixels in areas included in each of a plurality of frames. Furthermore, as described in Japanese Patent Application No. 60-268817, there is a variable length encoding method in which the number of bits changes depending on the dynamic range so that the maximum distortion caused when quantization is constant. is proposed.

High-efficiency encoding (A
(referred to as DRC) can greatly compress the amount of data to be transmitted, and is suitable for use with digital VTRs.

In particular, variable length ADRC can increase the compression ratio. However, with variable length ADRC, the amount of data to be transmitted varies depending on the image content, so when using a fixed rate transmission path such as a digital VTR that records a predetermined amount of data as one track, buffering processing is required. is necessary.

As a buffering method for variable length ADRC, the applicant of the present application forms an integrated type dynamic range frequency distribution as described in Japanese Patent Application No. 61-257586, and for this frequency distribution, It has been proposed that a set of threshold values prepared in advance is applied to determine the amount of generated data over a predetermined period, for example, one frame period, and control is performed so that the amount of generated data does not exceed a target value.

FIG. 8 shows a frequency distribution graph of the cumulative type shown in the above-mentioned application. The horizontal axis in FIG. 8 is the dynamic range DR, and the vertical axis is the frequency of occurrence in blocks. TI-T4 written on the horizontal axis is the threshold value. This threshold T1
~T4 determines the number of quantization bits. That is, (
In the case of a dynamic range DR in the range of maximum value to T■), the number of quantization bits is set to 4 bits, and (Tl-1
-T2), the number of quantization bits is set to 3 bits, and in the range of (72-1 to T3), the number of quantization bits is set to 2 bits, and (T3-1 to T4). ), the number of quantization bits is set to 1 bit, and (T4
-1 to minimum value), the number of quantization bits is 0.
bit (no code signal is transmitted).

In the cumulative type frequency distribution, when calculating the frequency distribution of the dynamic range DR within one frame period, the threshold value (Tl-1 ) to the threshold value T2. Threshold T from next threshold (T2-1)
The frequencies of occurrence up to 3 are also accumulated in the same way. Thereafter, similar processing is repeated. Therefore, the frequency of occurrence of the minimum dynamic range DR is the total number of blocks included in one frame (
MXN).

In this way, if we form a cumulative frequency distribution, the cumulative frequency up to the threshold TI will be XI, the cumulative frequency up to the threshold T2 will be (xt+X,), and the cumulative frequency up to the threshold T3 will be ( XI +Xz +X, ), and the threshold value T4
The cumulative frequency up to (χ, +xz 1X3 + X4)
becomes. Therefore, the amount of information generated during one frame period (total number of bits) is expressed by the following equation.

4 (XI O)+3 ((x+ +x,)
XI]+2 [(x+ +xt +X3)-(x+
+xz ))+l ((x, +xt+X, +x4)
−(x+ +xt +x,): 1=4x+ +3xt
+2x:l +Xa Threshold values T1 to T4 are set so that the amount of generated information described above does not exceed the target value. When changing the threshold value to find an optimal threshold value, the values of x1 to x4 described above are changed according to the threshold value, and the amount of generated information is calculated for each set of threshold values.

Therefore, if you create a cumulative frequency distribution table,
The amount of generated information can be calculated quickly.

As mentioned above, the method of converging the transmission data rate to a target value by changing, for example, four thresholds in the level direction, is insufficient in terms of performance in terms of reducing distortions such as quantization noise. there were.

Therefore, in the case of ADRC of a three-dimensional block consisting of two areas belonging to two frames, we not only change the threshold in the level direction, but also change the threshold for frame drop processing. High-efficiency encoding devices have been proposed that can buffer transmission data while suppressing deterioration in restored image quality.

For example, in the specification of Japanese Patent Application No. 62-133924, as shown in FIG. A method is shown in which a frequency distribution table is formed with the axis being the maximum value (for example, in the range of 0 to 19, where the maximum frame difference exceeding 19 is clipped). That is, a value of +2 is assigned to the range below the maximum frame difference ΔF of each block,
The range exceeding the maximum frame difference ΔF is assigned a value of +1. This means that when making a motion judgment to determine whether or not a frame is dropped, the motion judgment threshold MTH and the maximum frame difference ΔF of the block are compared, and (ΔF≧MT) I
), no frames are dropped; when (ΔF<MTH), frames are dropped; the amount of information generated when frames are dropped is % of the amount of information generated when no frames are dropped. It is from.

The above-mentioned frequency distribution table regarding the blocks included in the entire screen is formed, and then the frequency is accumulated from 255 to O in the dynamic range DR3 for each maximum frame difference ΔF, thereby creating an integrated frequency distribution table. is obtained. 1st
FIG. 0 shows the cumulative frequency distribution table obtained for each of the maximum frame differences ΔF in this manner. Using this cumulative frequency distribution table, a set of threshold values and a motion threshold MTH regarding a level at which the amount of generated information does not exceed the target value are determined. Frame drop processing is performed using this motion threshold MTH, and variable length ADRC (coding adapted to dynamic range) is performed using a set of thresholds.

Further, in the specification of Japanese Patent Application No. 62-13'3925, it is stated that since the frame dropping process is an averaging process, the dynamic range DR2 of a still block is smaller than the dynamic range DR3 of a moving block. A method for creating a frequency distribution table is described. Figure 11 is constructed by determining both the dynamic ranges DR2 and DR3 of each block, and assigning +2 to the range of dynamic range DR3 that is less than or equal to the maximum frame difference ΔF of the block, and +1 to the range that exceeds the maximum frame difference ΔF. The table shows the frequency distribution table.

Furthermore, Japanese Patent Application No. 183781/1983 discloses a method of creating a frequency distribution table by totaling the frequencies of blocks at positions determined by the maximum frame difference ΔF and the dynamic range DR3. Creation of this frequency distribution table will be explained with reference to FIGS. 12 to 14. In FIG. 12, the vertical axis shows the dynamic range DR3, and the horizontal axis shows the maximum frame difference ΔF. The maximum frame difference ΔF is (0
~255). To simplify the process, all maximum frame differences greater than or equal to a predetermined value may be replaced with a predetermined value, as described above.

The frequency of occurrence is written in the position defined by the dynamic range DR3 and the maximum frame difference ΔF of each block,
The frequencies are tallied over two frame periods. 12th
In the figure, the frequency of occurrence of areas that are omitted from illustration is as follows:
For simplicity, all are set to O.

The frequency distribution table compiled over two frame periods is converted into an integrated type. Integration is performed in both directions of maximum frame difference ΔF and dynamic range DR3. The table shown in FIG. 13A is the result of integrating the maximum frame difference ΔF in the direction from 255 to 0 with respect to the table shown in FIG.
That's what you get. Next, dynamic range DR3
By integrating the table in FIG. 13A in the direction from 255 to 0, the table shown in FIG. 13B is obtained.

The table shown on the 13th day is a cumulative frequency distribution table.

The frequency (47 in FIG. 13B) when (ΔF=O, DR3=O) is the total number of blocks in a two-frame period.

An optimal threshold set and motion threshold MTH are determined using this cumulative frequency distribution table.

As a method for this determination, as the motion threshold MTH,
By giving an initial value that does not cause jerkiness in the restored image and moving the threshold in the level direction, a threshold set is determined in which the generated information amount (total number of bits) does not exceed the target value. If you cannot reach the target value,
By moving the motion threshold MTtl, a threshold set that does not exceed the target value is searched again.

With reference to FIG. 14A, a process for calculating the amount of generated information using the frequency distribution table shown in FIG. 13 will be described.

When the motion threshold MTH is given, (ΔF≦MT1
1) is treated as a stationary block, and (ΔF>MT
The range of H) is treated as a motion pro-nk.

For a still block, an encoded code signal of 16 pixels (pixels included in one block) is generated, and for a motion block, an encoded code signal of 32 pixels is generated.

When threshold values T1 to T4 in the level direction are given, the number of encoding bits is allocated as follows.

When (T4>DR3), θ bit (T3>DR3≧T4), 1 bit (T2>DR3)
≧73), 2 bits (Tl>DR3≧T2),
When 3 bits (DR3≧Tl), 4 bit motion threshold MTH and level direction thresholds T1 to T4
Therefore, the frequency distribution table is 10 as shown in Figure 14A.
divided into several areas. If the total frequency included in each region is expressed as MOO~M41, then 2
The data amount DAv (number of bits) for a frame period is calculated by the following formula.

DAv= I X 16 XM10+ I X 32
XMII2X 16XM20+2X32XM213
16 XM30+3 X 32 XM314X16X
M40+4X32XM41 =16 (M10+ 2 M11+ 2 M20+ 4
M21+ 3 M3Q+ 6 M31+ 4 M40
+ 8 M41)=16 ((M10+M11+M2O
4M21+M3Q+M31+M40+M41) +(M11+M21+M31+M41)+ (M20+
M21+M30+M31+M40+M41)+ (M2
1+M31+M41) +(M30+M31+M40+M41)+(M31 10M
41) + (M40+M41) + (M41) ) The amount of information generated during a two-frame period is calculated by adding the fixed data 1tDAf (number of bits) to the variable data amount DAv according to the dynamic range in the above formula. It is something. The fixed data amount DAf is the number of bits obtained by multiplying 17 bits, which is the sum of DR3 and MIN3 and the determination code SJ, by the total number of blocks.

As can be seen from the above formula, the frequencies of multiple regions M00~M
Data 11DAV is calculated by selectively integrating 41. The integrated value of the frequencies enclosed in parentheses in the above formula is the 13th
This can be readily obtained from the cumulative frequency distribution table shown in Figure B.

Figure 14B shows the cumulative frequency distribution table for the above equation (
) indicates the positions of integrated values NIO to N41. These integrated values correspond as shown below.

N10 = (M10 + M11 + M20 + M21 + M30
+M31+M40+M41) N11= (M11+M21+M31+M41)N20
= (M20+M21+M30+M31+M40+M4
1) N21= (M21+M31+M41) N30=
(M30+M31+M40+M41)N31- (M3
1 + M41) N40 = (M40 + M41) N41 = (M41) Therefore, to calculate the data amount DAv using the cumulative frequency distribution table, DAv = 16 (N10 + N11 + N20 + N21
+N30+N31+N40+N41) processing is performed.

An object of the present invention is to provide a motion detection device.

[Problem to be solved by the invention] As mentioned above, the previously proposed information amount control device has the following problems:
A moving block and a stationary block are determined by comparing the maximum frame difference ΔF representing the amount of motion of a block with a motion threshold MTH.

The maximum frame difference ΔF is the maximum value among the absolute values of the differences between the sample data of the current frame and the sample data of the previous frame, which are determined for a plurality of pixels in the block. Therefore, the maximum frame difference Δ with an outstanding level due to noise
When F occurs, the block is erroneously determined to be a motion block even though it is a stationary block. As a result, the proportion of motion blocks increases and the amount of generated information increases, resulting in a problem that the quality of the restored image deteriorates.

Therefore, an object of the present invention is to provide an image signal that prevents erroneous determination of moving blocks and stationary blocks by introducing a value that is less affected by noise as a value expressing the amount of motion in units of blocks. Means for Solving] In the present invention, in an image signal motion detection device that detects whether a block consisting of areas belonging to multiple frames of a digital image signal is a still block or a moving block, the motion amount in units of samples is calculated for each block. A circuit 3 that detects the amount of motion is compared with a plurality of thresholds, calculates the number of samples included in the plurality of regions defined by the plurality of thresholds, and calculates the number of samples included in the plurality of regions based on the number of samples included in the plurality of regions. A circuit 5.11 for determining the presence or absence of block movement is provided.

[Effect]

The present invention is an image signal motion detection device used in an information amount control device that controls the amount of generated information so that it does not exceed the transmission capacity of a transmission path. One image is divided into a large number of three-dimensional blocks, and the maximum value MAX3, minimum value MIN3, and dynamic range DR3 of pixel data included in each block are determined. The amount of motion (for example, frame difference FDi) in units of samples is detected from the pixel data. This frame difference FDi is compared with a plurality of threshold values, and the number of samples included in the plurality of regions defined by the threshold values is determined. Based on the number of samples included in the plurality of areas, the presence or absence of block movement is detected.

In this invention, since the value representing the amount of block motion is not easily affected by noise, it is possible to correctly determine whether a stationary block or a moving block is present.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in the following order with reference to the drawings.

a. Configuration of the recording side; ADRC encoder c; Block motion detection circuit a; Configuration of the recording side FIG. 1 shows the configuration of the recording side of an embodiment of the present invention.
In FIG. 1, a digital video signal in which one sample is quantized to 8 bits, for example, is supplied to an input terminal indicated by 1. This digital video signal is supplied to the blocking circuit 2. The blocking circuit 2 converts television scanning order data into block order data.

In the blocking circuit 2, for example, (520 lines x 720 lines
As shown in Figure 2, one frame screen of (M pixels)
XN) is subdivided into blocks. One block consists of two areas each having a size of (4 lines x 4 pixels), as shown in FIG. 3, for example. Each region belongs to two temporally consecutive frames. Further, as shown in FIG. 4, the sampling pattern has an offset between blocks due to subsampling. In FIG. 4, ◯ indicates a pixel that is transmitted, Δ indicates a pixel that is not transmitted, and in a spatially corresponding block two frames later, the transmitted and thinned out pixels have an opposite relationship. Such a sampling pattern enables good interpolation in a still area when interpolating thinned out pixels on the receiving side. From the blocking circuit 2, B II, BB,
B.3. ... A digital video signal converted into the block order of B□ is generated.

The output signal of the blocking circuit 2 is supplied to a detection circuit 3 and a delay circuit 4. The detection circuit 3 detects the maximum value M of each block.
AX3 and the minimum value MIN3 are detected, and the dynamic range DR3 which is the difference between them is detected, and the amount of motion of the block in units of samples, for example, the frame difference FDi is detected. The difference between the data of pixels at the same position between two areas constituting one block is determined, and this difference between each pixel is converted into an absolute value and set as a frame difference FDi. That is, if the data of the current frame are x, l and the data of the previous frame is X5i-+i, then the frame FDi in units of samples is obtained as F'Dix x, i-X@-1i.

The frame difference FDi from the detection circuit 3 is the block motion amount (
N) The dynamic range DR3 from the detection circuit 3 is supplied to the frequency distribution generation circuit 6.

As will be described later, the block motion amount detection circuit 5 compares the 16 frame differences FDi for each block with a plurality of threshold values, and calculates the number of samples included in a plurality of regions defined by the plurality of threshold values. Count. This count value indicates the frequency distribution of frame differences within the block, and a block motion amount N reflecting this frequency distribution is formed. The block motion amount N is supplied to the frequency distribution generation circuit 6.

This frequency distribution generating circuit 6 has a dynamic range DR3.
(=MAX3-MINa+1) is taken as the vertical axis, the block movement amount N is taken as the horizontal axis, and the frequency of occurrence of each block is totaled over a period of two frames. The frequency distribution table formed in this way is supplied to the cumulative frequency distribution generation circuit 7, and an cumulative frequency distribution table is formed.

Using the cumulative frequency distribution table, the threshold determining circuit 8 determines optimal thresholds (level thresholds T1 to T4 and motion threshold MTH).

The optimal threshold value means a threshold value that allows encoding to be performed so that the total number of bits per two frames does not exceed the transmission capacity of the transmission path. This optimal threshold value is determined using the motion threshold value MTH as a parameter. A ROM 9 is provided in association with the threshold value determination circuit 8 . This ROM 9 stores a program for determining an optimal threshold value.

Pixel data PD passed through the delay circuit 4 is supplied to a frame difference detection circuit 10. This frame difference detection circuit 10
The frame difference FDl is calculated in the same way as the detection circuit 3 described above.
Detect. The frame difference FDi and pixel data PD from the frame difference detection circuit 10 are transferred to the block motion amount detection circuit 5.
The signal is supplied to a block motion amount (N) detection circuit 11 similar to the above, and a value N representing the motion amount in units of blocks is detected.

This block motion ilN and pixel data PD are supplied to the motion determination circuit 12. The motion determination circuit 12 compares the motion threshold value MTH from the threshold value determination circuit 8 with the block motion amount N, and determines whether the block to be processed is a motion block or a stationary block.

Blocks with the relationship (block motion amount N>motion threshold MTH) are determined to be moving blocks, and blocks with the relationship (block motion amount N≦motion threshold MT) I) are determined to be stationary blocks. . The pixel data of the motion block is supplied to a three-dimensional ADRC encoder 13. Furthermore, the pixel data of the still block is supplied to the averaging circuit 14. This averaging circuit 14 adds the data of pixels at the same position in two areas included in the block (1), converts the data into %, and forms a block with the number of pixels equal to 2 of the original number of pixels in one block. Such processing is called drop-proofing processing. The output signal of the averaging circuit 14 is two-dimensional AD, R
The signal is supplied to the C encoder 15. These encoders 1
3 and 15, the threshold value T1 is supplied from the threshold value determining circuit 8.
~T4 is supplied.

The three-dimensional ADRC encoder 13 selects the maximum value MAX3. out of a total of 32 pixel data (4 lines x 4 pixels x 2 frames). The minimum value MIN3 is detected and (MAX3-M
Dynamic range DR3 due to IN3+1-DR3)
is required. Dynamic range DR of this block
3 and the threshold values T1 to T4, the code signal DT
The number of bits of 3 is determined. That is, in the block where (DR3≧TI), a 4-bit code signal is formed, and (TI>
In the block where DR3≧T2), a 3-bit code signal is formed, and in the block where (T2>DR3≧T3), a 3-bit code signal is formed.
A 2-bit code signal is formed, and (T3>DR3≧T
In the block 4), a 1-bit code signal is formed, and in the block (T4>DR3), a 0-bit code signal is formed, that is,
No code signal is transmitted.

For example, in the case of 4-bit quantization encoding, the detected dynamic range DR3 is divided into 16 (-24),
A 4-bit code signal DT3 is generated corresponding to the range to which the level of the data after removing the minimum value MIN3° of each pixel data belongs.

In the two-dimensional ADRC encoder 15, the three-dimensional AD
By the same operation as the RC encoder 13, the maximum value MAX
2. Minimum value MIN2. Dynamic range DR2 is detected and code signal DT2 is formed. However, what is to be encoded is data whose number of pixels has been set to % by the averaging circuit 14 at the previous stage.

The output signal of the three-dimensional ADRC encoder 13 (DR3, M
IN3. DT3) and the output signal (DR2, MIN2.DT2) of the two-dimensional ADRC encoder 15 are supplied to the selector 16. The selector 16 is controlled by a determination signal SJ from the motion determination circuit 12. That is, in the case of a motion block, the selector 16 selects the output signal of the three-dimensional ADRC encoder 13, and in the case of a still block, the selector 16 selects the output signal of the two-dimensional ADRC encoder 15. The output signal of this selector 16 is supplied to a framing circuit 17.

In addition to the output signal of the selector 16, the framing circuit 17 is supplied with a threshold code Pi specifying a threshold set and a determination code SJ. The threshold code Pi is 2
It changes on a frame-by-frame basis, and the judgment code SJ is
Changes in block units. The framing circuit 17 converts the input signal into recording data having a frame structure. The framing circuit 17 performs error correction code encoding processing as necessary. Output terminal 1 of framing circuit 17
The recorded data obtained in step 8 is supplied to a rotary head via a recording amplifier, a rotary transformer, etc. (not shown), and is recorded on a magnetic tape.

b. ADRC Encoder FIG. 5 shows the configuration of an example of the three-dimensional ADRC encoder 13. In FIG. 5, 21 indicates an input terminal, and this input terminal 21 is connected to a maximum value detection circuit 22. A minimum value detection circuit 23 and a delay circuit 24 are connected. The maximum value MAX3 detected by the maximum value detection circuit 22 is detected by the subtraction circuit 2.
The minimum value MIN3 detected by the minimum value detection circuit 23 is supplied to the subtraction circuit 25, and the output signal of the subtraction circuit 25 is supplied to the +1 addition circuit 27.

A dynamic range DR3 expressed as (MAX3-M[N3+1)] is obtained from the +1 addition circuit 27.

Pixel data passed through the delay circuit 24 is supplied to a subtraction circuit 26. The subtraction circuit 26 is supplied with the minimum value MIN3, and the pixel data P after the minimum value is removed from the subtraction circuit 26.
DI occurs. This pixel data PDI is transferred to the quantization circuit 3.
0. The dynamic range DR3 is taken out to the output terminal 31 and is also supplied to the ROM2B. A threshold code Pi generated by the threshold determining circuit 8 is supplied to the ROM 28 from a terminal 29.

This ROM 28 generates a bit number code Nb indicating the quantization step Δ and the number of bits.

The quantization step Δ is supplied to the quantization circuit 30, and a code signal DT3 is formed from the data PDI after minimum value removal and the quantization step Δ. This code signal DT3 is taken out to the output terminal 34.

The output signals generated at these output terminals 31, 32, 33, 34 are supplied to the framing circuit 17.

The bit number code Nb is used in the framing circuit 17 to select valid bits.

The formation of the code signal DT3 in the above-mentioned quantization circuit 30 will be explained. - In the case of encoding that allocates n bits to boat fishing, the level of the original data PD is expressed as Li, and the quantization code is expressed as Qi. The symbol [ ] means truncation.

Also, on the decoding side, if the restoration level is expressed as Ll, then L, i
= (DR3/2”)X (Qi +0.5)+M
IN3-ΔX (Qi +0.5) +M I N
3 processing is performed.

C. An example of a block motion amount detection circuit The value N representing the block motion amount is determined by comparing the frame difference FDi, which is the motion expression value of each sample in the block, with a plurality of threshold values. It is obtained by counting the number of samples included in a plurality of regions and converting this counted value using logic. That is, the count value included in each area defined by a plurality of threshold values indicates the frequency distribution of frame differences within the block, and the block motion amount N that reflects this frequency distribution is determined. In addition to the frame difference FDi, the square difference of each sample may be used as the motion expression value of the sample.

The circuits 5 and 11 for detecting the value N representing the amount of block movement described above have a configuration shown in FIG.

In FIG. 6, the frame difference FDi from the input terminal 41 is connected to a comparator circuit 42. ．． 42. , ...4
2m-+. Comparison circuits 42°, 421.・・・
. . , a plurality of threshold values R,, R,
,...R□1 is supplied. These multiple threshold values are (Rk-+ >R*-t >...>R,
>Ro). Comparison circuit 42°, 42+
,...42□, each of (FD i > R@
), (F D'i >R+) ・ ・ ・
・ ・ When (FDi>R), a high level comparison output is generated and the comparison circuits 42°, 42. ,...
The comparison output of 42-+ is sent to counters 43°, 43i, . . .
- Supplied to the enable terminal EN of the 431 spirit.

The counters 43°, 43+, . . . 43-, count the sample clocks during the period when the comparison output is at a high level,
It is cleared by the block cycle clock BLPKI. In this example, there are 16 frame differences FD per block.
Since i is found, the counters 43o, 43+, ・' ・
・Count value n O+ n l of 43b-1.

... nk-1 takes any value within the range (0 to 16).

Counter values n of counters 43°, 43r,...43□
11+nt+...rt, , indicates the frequency distribution of the frame difference FDi within the block. In this frequency distribution, when the amount of motion of a block is small, the count value n0 etc. of the area defined by the small threshold value Ro etc. among the k count values becomes large. On the other hand, when the amount of motion of a block is large, the count value n k of the N area defined by the smaller threshold value Rk-□, Rk-1, etc. among the k count values
−2, 1k−1, etc. become large.

Therefore, the frequency distribution of frame differences within a block indicates the movement of the block. When using the maximum value of the frame difference as the representation value of the amount of block motion, the maximum value becomes quite large due to prominent noise (or, in the case of the frequency distribution described above, even in the case of prominent noise, Since it is counted as one piece, the influence of noise is reduced.

Counter Counter 43°, 43+, ...-1 to 43
The count value fl 6+ n I, ” ” n k-1 is R
The signal is supplied to a logic circuit 44 composed of OM, ALU, etc. Through the logic of the logic circuit 44,
A value N representing the amount of block movement reflecting the frequency distribution is formed.

The output signal of the logic circuit 44 is taken out as an output signal via the register 45. The register 45 outputs the logic circuit 44 in synchronization with the block period clock BLKP2.
Outputs the output signal to the outside.

The above-mentioned block motion amount value N is applied as the motion amount axis of the frequency distribution table, and as shown in FIG. 7, a frequency distribution table is formed with N and the dynamic range DR3 as two axes. As mentioned at the beginning, this frequency distribution table can be formed by assigning (+1) to the part of the table that is treated as a stationary block and (+2) to a part that is treated as a moving block, or by assigning one screen (two frames) A method of allocating the number of blocks that occur in one period) can be used. In reality, the frequency distribution table uses a memory, and the horizontal and vertical addresses of the memory are specified by N and DR3.

This frequency distribution table is converted into a cumulative frequency distribution table by the cumulative frequency distribution generating circuit 7. The threshold determining circuit 8 determines the motion threshold MTH for the cumulative frequency distribution table.
The amount of generated information is calculated by applying the threshold values T1 to T4 regarding the level. The obtained amount of generated information is compared with a target value, and the motion threshold MTH and thresholds T1 to T4 are set within a range where the amount of generated information does not exceed the target value.
is determined. Frame drop processing is performed using the motion threshold MTH, and the thresholds T1 to T4 are applied to the ADRC encoder 1.
3 and 15.

An example of the logic of the logic circuit 44 that converts the count value n or n + +...nk-1 into the amount of movement N of the block will be described. (k=2) comparison circuits 42°, 4
21 are used, with thresholds Ro, R+ (e.g. R
0=8. R,=20) is supplied.

Therefore, the count value n0 and GF
The number of frame differences within a block that satisfies the relationship Di>R, ) and the corresponding count value nl are determined. In the logic circuit 44, these count values no and n+ are converted into a block motion amount N using the following logic.

(N　O=　n　.

N= (Nl+16)+NO According to the above logic, the number n that exceeds the threshold value of (R, = 20) is displayed as that number, and the number n that does not exceed the threshold value R3 is displayed as the number n. is expressed as a value (0 to 16). Further, if all the frame differences FDi are equal to or less than the threshold value R0, (N=0) is set.

In addition, in FIG. 1, whether a frame difference detection circuit 10 and a block motion amount detection circuit 11 are provided separately from the detection circuit 3 and the block motion amount detection circuit 5, or whether the frame difference detection circuit 10 and the block motion amount detection circuit 11 are provided separately from the detection circuit 3 and the block motion amount detection circuit 5 are shown. Frame difference FDi
and the block motion amount N may be stored, and the motion determination may be performed using the stored values. Further, the three-dimensional ADRC encoder 13 and the two-dimensional ADRC encoder 15 can have a common circuit configuration.

〔Effect of the invention〕

In this invention, the value representing the amount of movement of a block is not the maximum frame difference ΔF (but a value N that reflects the frequency distribution within the block of the frame difference of each sample, so
The influence of prominent noise can be reduced, and stationary blocks and moving blocks can be correctly determined. Therefore,
It is possible to reduce the possibility that a stationary block is determined to be a moving block due to noise. In order to suppress the amount of generated information to a value smaller than the target value, the dynamic range D
When applied to an information amount control device that introduces not only R but also a motion threshold, it is possible to effectively perform frame drop processing, reduce the amount of generated information by frame drop processing, and reduce the amount of information generated by the frame drop processing. There is no need to make it strict, and the quality of the restored image can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the recording side configuration of an embodiment of the present invention, FIGS. 2, 3, and 4 are route diagrams for explaining the block configuration, and FIG. 5 is an ADRC encoder configuration. The block diagram of the second side, Figure 6 is a block diagram of an example of a block motion amount detection circuit, Figure 7 is a route map showing a frequency distribution table, and Figure 8 uses the previously proposed cumulative type frequency distribution. Figures 9, 10 and 11 are route maps used to explain an example of the buffering circuit proposed previously, and Figure 12 is a route map used to explain another example of the buffering circuit proposed previously. , FIG. 13, and FIG. 14 are route diagrams used to explain still other examples of the previously proposed buffering circuit. Explanation of main symbols in the drawings 1: Digital video signal input terminal, 2 Niblock conversion circuit, 3: Detection circuit, S, tt Niblock motion amount detection circuit, 6: Frequency distribution generation circuit, 7: Integration type frequency distribution Generation circuit, 8: Threshold determination circuit, 10: Frame difference detection circuit, 12: Motion determination circuit, t-3: Three-dimensional ADRC encoder, J4: Averaging circuit, 15: Two-dimensional ADRC encoder.

Claims (1)

[Claims] An image signal motion detection device for detecting whether a block consisting of an area belonging to a plurality of frames of a digital image signal is a still block or a moving block, which detects the amount of motion in units of samples for each block. means, comparing the amount of motion with a plurality of thresholds, determining the number of samples included in the plurality of regions defined by the plurality of thresholds, and calculating the number of samples included in the plurality of regions based on the number of samples included in the plurality of regions. A motion detection device for an image signal, comprising: means for determining the presence or absence of block motion.