JPH0258935A - Receiving mode switching circuit - Google Patents
Receiving mode switching circuitInfo
- Publication number
- JPH0258935A JPH0258935A JP21019188A JP21019188A JPH0258935A JP H0258935 A JPH0258935 A JP H0258935A JP 21019188 A JP21019188 A JP 21019188A JP 21019188 A JP21019188 A JP 21019188A JP H0258935 A JPH0258935 A JP H0258935A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- mode switching
- circuit
- signals
- squelch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 3
- 101000826119 Bacillus subtilis (strain 168) Single-stranded DNA-binding protein B Proteins 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Abstract
Description
本発明は、複数の復調器からの復調信号が入力され、こ
れらの復調信号を選択するためのモード切り替え信号の
入力により対応する復調信号が選択切り替えられる受信
モード切り替え回路に関する。The present invention relates to a receiving mode switching circuit that receives demodulated signals from a plurality of demodulators and selects and switches the corresponding demodulated signals by inputting a mode switching signal for selecting these demodulated signals.
従来の受信モード切り替え回路は、第2図に示すように
、SSB復調器21、AM復調器22、FM復調器23
、モード切り替え回路24、ミュート回路27から構成
され、SSB選択信刊A1AM選択信号B、FM選択信
号Cによって、対応する復調信号が選択され、受信され
るべき信号が所定の信号強度レベル以下のときは、スケ
ルチ信号によりミュート回路27が作動し、信号を通過
させないように構成されていた。As shown in FIG. 2, the conventional reception mode switching circuit includes an SSB demodulator 21, an AM demodulator 22, and an FM demodulator 23.
, a mode switching circuit 24, and a mute circuit 27, and the corresponding demodulated signal is selected by the SSB selection newsletter A1AM selection signal B and FM selection signal C, and when the signal to be received is below a predetermined signal strength level. The mute circuit 27 is activated by the squelch signal and is configured to prevent the signal from passing through.
しかし、前述したような従来の受信モード切り替え回路
は、モード切り替え回路24とミ、−ト回路27とを独
立して備えているので、ミュート回路の回路構成が複雑
になるとともに、低周波信号に対して直接制御するので
、安定性が悪く、高速に応答しないという欠点がある。However, since the conventional reception mode switching circuit as described above includes the mode switching circuit 24 and the mute circuit 27 independently, the circuit configuration of the mute circuit becomes complicated and the mute circuit is not sensitive to low frequency signals. Since the control is directly controlled, there are disadvantages in that stability is poor and the response is not fast.
本発明では、上記課題を解決するために、複数の復調器
からの復調信号が入力され、これらの復調信号を選択す
るためのモード切り替え信号の入力により対応する復調
信号が選択切り替えられる受信モード切り替え回路にお
いて、モード切り換え信号とスケルチ信号とを論理演算
しモード切り替え制御信号を出力する論理回路と、前記
モード切り替え制御信号によって、各復調器からの復調
信号を選択切り替え、若しくはON10 F F制御す
る復調信号選択制御回路とを備えるという手段を講じた
。In order to solve the above problems, the present invention provides reception mode switching in which demodulated signals from a plurality of demodulators are input and a corresponding demodulated signal is selectively switched by inputting a mode switching signal for selecting these demodulated signals. The circuit includes a logic circuit that performs a logical operation on the mode switching signal and the squelch signal and outputs a mode switching control signal, and a demodulation circuit that selectively switches or ON10 FF controls demodulated signals from each demodulator using the mode switching control signal. A measure was taken to include a signal selection control circuit.
本発明によれば、
複数の復調器からの復調信号が入力され、これらの復調
信号を選択するためのモード切り替え信号の入力により
対応する復調信号が選択切り替えられる受信モード切り
替え回路において、モード切り換え信号とスケルチ信号
とを論理演算しモード切り替え制御信号を出力する論理
回路と、前記モード切り替え制御信号によって、各復調
器からの復調信号を選択切り替え、若しくはON/OF
F制御する復調信号選択制御回路とを備えたので、スケ
ルチ信号が出力される時は、モード切り替え信号が出力
され、該当するモードの復調信号が選択通過され、スケ
ルチ信号が出力されない時は、モード切り替え信号は出
力されず、該当するモードの選択信号が出力されていて
もその復調信号は遮断される。According to the present invention, in a receiving mode switching circuit in which demodulated signals from a plurality of demodulators are input and a corresponding demodulated signal is selectively switched by inputting a mode switching signal for selecting these demodulated signals, a mode switching signal is provided. and a logic circuit that performs a logical operation on the squelch signal and outputs a mode switching control signal;
Since it is equipped with a demodulation signal selection control circuit that performs F control, when a squelch signal is output, a mode switching signal is output, and the demodulation signal of the corresponding mode is selectively passed, and when a squelch signal is not output, the mode switching signal is output. No switching signal is output, and even if a selection signal for the corresponding mode is output, its demodulated signal is blocked.
以下に、本発明にかかる受信モード切り換え回路を図面
に基づいて詳細に説明する。
第1図は本発明にかかる受信モード切り換え回路の一実
施例のブロック図である。
図面において、
1はSSB復調器、2はAMM調器、3ばFM復調器、
4は復調信号選択制御回路、5は切り替え制御回路、6
はコンパレータ、7はモード切り替え回路、AはSSB
選択信号、BはAMM択信号、CはFMM択信号、Dは
スケルチ信号である。モード切り替え回路7は、前記復
調信号選択制御回路4と前記切り替え制御回路5とから
構成されている。
SSBm択信号Aが入力され且つスケルチ信号がしきい
値より大きければ、コンパレータ6の出力がロジックレ
ベルの(HIGH)レベルとなるので、SSB切り替え
制御信号へ°のみが(HIGH)レベルとなり、SSB
復調器lからの復調信号のみが復調信号選択制御回路4
にて選択通過される。
当然、AMM調器2およびFM復調器3からの信号は復
調信号選択制御回路4を通過しない。
そして、SSB選択信号Aが入力されてもスケルチ信号
がしきい値より小さければ、コンパレータ6の出力がロ
ジックレベルの(LOW)レベルとなるので、SSB切
り替え制御信号A“も〔LOW〕レベルとなり、SSB
復調器1からの復調信号も復調信号選択制御回路4を通
過しない。
AM選択信号B、FM選選択信号炉出力されるときも上
述と同様に、スケルチ信号がしきい値より大きいときの
み、それぞれのモード切り換え制御信号B’、C’が出
力され、それに該当する復調信号が復調信号選択制御回
路4を通過するのである。
コンパレータ6に限らず、シュミットトリガ−等のよう
にスケルチ信号のレベルによって、ロジック信号を出力
できるものであれば他の手段でも良い。
また、切り替え制御回路5はアンド素子に限るものでは
無い。
このようにして、本願発明によれば、従来のようにミュ
ート回路を必要としないので、回路構成が簡略化され、
スペース的にも、コスト的にもメリットが得られるので
ある。
また、スケルチ信号によってロジックレベルのモード選
択信号に対して論理演算を加えてミュートするので、制
御が容易且つ確実であるとともに、応答が高速にできる
という効果も得られる。Below, the reception mode switching circuit according to the present invention will be explained in detail based on the drawings. FIG. 1 is a block diagram of an embodiment of a reception mode switching circuit according to the present invention. In the drawings, 1 is an SSB demodulator, 2 is an AMM modulator, 3 is an FM demodulator,
4 is a demodulation signal selection control circuit, 5 is a switching control circuit, 6
is a comparator, 7 is a mode switching circuit, A is SSB
B is an AMM selection signal, C is an FMM selection signal, and D is a squelch signal. The mode switching circuit 7 includes the demodulated signal selection control circuit 4 and the switching control circuit 5. When the SSBm selection signal A is input and the squelch signal is larger than the threshold, the output of the comparator 6 becomes the logic level (HIGH), so only the SSB switching control signal ° becomes the (HIGH) level, and the SSB
Only the demodulated signal from the demodulator l is sent to the demodulated signal selection control circuit 4.
The selection is passed. Naturally, the signals from the AMM modulator 2 and the FM demodulator 3 do not pass through the demodulation signal selection control circuit 4. Even if the SSB selection signal A is input, if the squelch signal is smaller than the threshold value, the output of the comparator 6 will be at the logic level (LOW) level, so the SSB switching control signal A' will also be at the [LOW] level. S.S.B.
The demodulated signal from the demodulator 1 also does not pass through the demodulated signal selection control circuit 4. When the AM selection signal B and the FM selection signal are output, the respective mode switching control signals B' and C' are output only when the squelch signal is larger than the threshold value, and the corresponding demodulation is performed in the same manner as described above. The signal passes through the demodulation signal selection control circuit 4. The comparator 6 is not limited to the comparator 6, and other means such as a Schmitt trigger may be used as long as it can output a logic signal depending on the level of the squelch signal. Further, the switching control circuit 5 is not limited to an AND element. In this way, according to the present invention, unlike the conventional mute circuit, the circuit configuration is simplified, and the mute circuit is not required.
There are advantages in terms of space and cost. Further, since the squelch signal performs a logical operation on the logic level mode selection signal and mutes it, control is easy and reliable, and the response can be made faster.
本願発明によれば、従来のようにミュート回路を必要と
しないので、回路構成が簡略化され、スペース的にも、
コスト的にもメリットが得られるのである。
また、スケルチ信号によってロジックレベルのモード選
択信号に対して論理演算を加え、得られたモード切り換
え制御信号によって各モードに対応する復調信号を切り
換え、若しくはON10 FF制御するので、制御が容
易且つ確実であるとともに、応答が高速にできるという
効果も得られる。According to the present invention, unlike conventional mute circuits, the circuit configuration is simplified and the space is saved.
There are also cost benefits. In addition, logical operations are performed on the logic level mode selection signal using the squelch signal, and the resulting mode switching control signal switches the demodulation signal corresponding to each mode or performs ON10 FF control, making control easy and reliable. At the same time, the effect of faster response can also be obtained.
第1図は本発明にかかる受信モード切り換え回路の一実
施例のブロック図、第2図は従来の受信モード切り換え
回路の一実施例のブロック図である。
■・・・SSB復調器、2・−A M復調器、3・・・
FM復調器、4・・・復調信号選択制御回路、5・・・
切り替え制御回路(論理回路)、6・・・コンパレータ
、7・・・モード切り換え回路、A・・・S S B選
択信号、B・・・AM選択信号、C・・・FM選択信号
、D・・・スケルチ信号、A’、B’、C’・・・モー
ド切り換え制御信号。FIG. 1 is a block diagram of an embodiment of a reception mode switching circuit according to the present invention, and FIG. 2 is a block diagram of an embodiment of a conventional reception mode switching circuit. ■...SSB demodulator, 2-AM demodulator, 3...
FM demodulator, 4... Demodulated signal selection control circuit, 5...
Switching control circuit (logic circuit), 6... Comparator, 7... Mode switching circuit, A... S S B selection signal, B... AM selection signal, C... FM selection signal, D. ... Squelch signal, A', B', C'... Mode switching control signal.
Claims (1)
の復調信号を選択するためのモード切り替え信号の入力
により対応する復調信号が選択切り替えられる受信モー
ド切り替え回路において、モード切り換え信号とスケル
チ信号とを論理演算しモード切り替え制御信号を出力す
る論理回路と、前記モード切り替え制御信号によって、
各復調器からの復調信号を選択切り替え、若しくはON
/OFF制御する復調信号選択制御回路とを備えたこと
を特徴とする受信モード切り替え回路。(1) In a receiving mode switching circuit where demodulated signals from a plurality of demodulators are input and a corresponding demodulated signal is selectively switched by inputting a mode switching signal for selecting these demodulated signals, a mode switching signal and a squelch signal are input. and a logic circuit that performs a logical operation on and outputs a mode switching control signal, and the mode switching control signal,
Select or switch the demodulated signal from each demodulator
1. A reception mode switching circuit comprising: a demodulation signal selection control circuit that performs /OFF control.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21019188A JPH0258935A (en) | 1988-08-24 | 1988-08-24 | Receiving mode switching circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21019188A JPH0258935A (en) | 1988-08-24 | 1988-08-24 | Receiving mode switching circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0258935A true JPH0258935A (en) | 1990-02-28 |
JPH0447493B2 JPH0447493B2 (en) | 1992-08-04 |
Family
ID=16585292
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21019188A Granted JPH0258935A (en) | 1988-08-24 | 1988-08-24 | Receiving mode switching circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0258935A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008022340A (en) * | 2006-07-13 | 2008-01-31 | Oki Electric Ind Co Ltd | Multimode receiving circuit |
JP2008240141A (en) * | 2007-02-28 | 2008-10-09 | Kobe Steel Ltd | HIGH STRENGTH AND HIGH DUCTILITY Al ALLOY, AND METHOD FOR PRODUCING THE SAME |
-
1988
- 1988-08-24 JP JP21019188A patent/JPH0258935A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008022340A (en) * | 2006-07-13 | 2008-01-31 | Oki Electric Ind Co Ltd | Multimode receiving circuit |
JP4674190B2 (en) * | 2006-07-13 | 2011-04-20 | Okiセミコンダクタ株式会社 | Multimode receiver circuit |
JP2008240141A (en) * | 2007-02-28 | 2008-10-09 | Kobe Steel Ltd | HIGH STRENGTH AND HIGH DUCTILITY Al ALLOY, AND METHOD FOR PRODUCING THE SAME |
Also Published As
Publication number | Publication date |
---|---|
JPH0447493B2 (en) | 1992-08-04 |
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