JPH0257681B2 - - Google Patents

Info

Publication number
JPH0257681B2
JPH0257681B2 JP58139128A JP13912883A JPH0257681B2 JP H0257681 B2 JPH0257681 B2 JP H0257681B2 JP 58139128 A JP58139128 A JP 58139128A JP 13912883 A JP13912883 A JP 13912883A JP H0257681 B2 JPH0257681 B2 JP H0257681B2
Authority
JP
Japan
Prior art keywords
jig
grooves
recess
lead wire
recesses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58139128A
Other languages
Japanese (ja)
Other versions
JPS6030145A (en
Inventor
Akihiro Yanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kansai Nippon Electric Co Ltd
Original Assignee
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kansai Nippon Electric Co Ltd filed Critical Kansai Nippon Electric Co Ltd
Priority to JP58139128A priority Critical patent/JPS6030145A/en
Publication of JPS6030145A publication Critical patent/JPS6030145A/en
Publication of JPH0257681B2 publication Critical patent/JPH0257681B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thermistors And Varistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 イ 産業上の利用分野 この発明は半導体素子等の電子部品の素子本体
にリード線を半田付け接続する方法で、詳しくは
複数の素子本体にリード線を一括して半田付けす
る方法に関する。
[Detailed Description of the Invention] A. Field of Industrial Application This invention relates to a method for connecting lead wires to the element bodies of electronic components such as semiconductor elements by soldering. Regarding how to attach.

ロ 従来技術及び発明が解決しようとする問題点 例えばサーミスタは第1図及び第2図に示すよ
うにチタン酸バリウム等のプレート状素子1の両
面に1本ずつリード線2,3を半田4,4で接続
して電極の取出しを行つた後、素子1を外装樹脂
材5で封止した構造が一般的である。従来この種
サーミスタの需要が少ないため、その構造は手作
業で行われているが、最近サーミスタの需要が伸
びて手作業による製造が量産的、コスト的に不適
になりつつあるのが現状である。
B) Problems to be Solved by the Prior Art and the Invention For example, in a thermistor, as shown in FIGS. A common structure is that the element 1 is sealed with an exterior resin material 5 after the electrodes are taken out by connecting the elements 1 to 4. Conventionally, there was little demand for this type of thermistor, so their construction was done by hand, but as the demand for thermistors has increased recently, manual manufacturing is becoming unsuitable for mass production and cost. .

即ち、サーミスタの素子1は1mm角前後と非常
に小さく、この素子1へのリード線2,3の半田
付けは拡大鏡を使つて拡大した像を目で観察しな
がら作業者が1本ずつ半田ゴテを使つて行つてい
た。そのため作業性が極めて悪く、また作業者の
熟練度に半田付けの良否が大きく左右されて歩留
りが悪く、結果的にサーミスタを高価にしてい
た。
In other words, the thermistor element 1 is very small, about 1 mm square, and the lead wires 2 and 3 are soldered to the element 1 one by one by the operator while visually observing the magnified image using a magnifying glass. I used a trowel to do it. As a result, workability is extremely poor, and the quality of soldering is largely dependent on the skill level of the worker, leading to poor yields and, as a result, thermistors becoming expensive.

ハ 問題点を解決するための手段 本発明は上記サーミスタの素子の如き小形素子
へのリード線接続の問題点に鑑みてなされたもの
で、次の治具を使つたパツチ処理可能な方法を提
供する。
C. Means for Solving the Problems The present invention was made in view of the problems of connecting lead wires to small elements such as thermistor elements, and provides a patch processing method using the following jig. do.

上記治具は表裏両面に素子が嵌まる複数の凹部
と、各凹部の底面を横切る複数の第1溝と、各凹
部の上端開口を横切る複数の第2溝と、各凹部の
底面に真空吸着孔を有し、次の(a)〜(d)の各工程で
素子へのリード線接続を一括して行う。
The above jig has a plurality of recesses into which the elements fit on both the front and back surfaces, a plurality of first grooves that cross the bottom of each recess, a plurality of second grooves that cross the upper end opening of each recess, and vacuum suction on the bottom of each recess. It has a hole, and lead wires are connected to the device at once in each of the following steps (a) to (d).

(a) 上記治具の表裏両面の各第1溝に所望のリー
ド線(第1リード線)を巻き付け等で嵌入す
る。
(a) A desired lead wire (first lead wire) is inserted into each of the first grooves on both the front and back surfaces of the jig by winding or the like.

(b) 上記治具の先ず表面の各凹部に1個ずつ素子
を半田を介して真空吸着で嵌入し、次に治具の
裏面の各凹部に素子を真空吸着で嵌入する。こ
の素子嵌入は別の素子整列治具を使う等して行
えばよく、また各凹部内に先に嵌入された第1
リード線と素子の少くとも一方に予備半田処理
をしておく。
(b) First, one element is fitted into each recess on the front surface of the jig by vacuum suction via solder, and then the element is fitted into each recess on the back surface of the jig by vacuum suction. This element insertion can be done by using another element alignment jig, or the first element inserted into each recess first.
Pre-solder at least one of the lead wire and the element.

(c) 上記治具の第2溝に所望のリード線(第2リ
ード線)を巻き付ける等で嵌入する。この場合
も素子と第2リード線との少くとも一方に予備
半田処理をしておく。
(c) Fit a desired lead wire (second lead wire) into the second groove of the jig by winding it or the like. In this case as well, preliminary soldering is applied to at least one of the element and the second lead wire.

(d) 治具全体を加熱炉に通して各凹部内の素子の
表裏両面にある予備半田を溶融させて第1、第
2リード線を同時に半田付け接続する。
(d) Pass the entire jig through a heating furnace to melt the preliminary solder on both the front and back sides of the element in each recess, and simultaneously solder and connect the first and second lead wires.

以上の各工程により素子が小形でもパツチ処理
が容易で、従つて量産性の大幅な改善が図れる。
Through each of the above steps, patch processing is easy even if the device is small, and therefore mass productivity can be greatly improved.

ニ 実施例 本発明で使用する上記治具の一実施例を第3図
乃至第7図を参照しながら説明すると、6は矩形
平板状の治具、7,7…は治具6の表面m1の中
央部に2列配置で等間隔で形成された複数の凹
部、8,8…は治具6の裏面m2に上記凹部7,
7…と同配列で同数、同一形状で形成された凹部
で、各凹部7,7…、8,8…には例えば上記サ
ーミスタの素子1が1個ずつ嵌入される形状大の
ものである。9,9…及び10,10…は第3図
におけるA−A線及びB−B線で切断した断面を
示す第5図及び第6図から判るように、治具6の
表裏両面m1,m2に各凹部7,7…、8,8…の
横に並ぶ2つの底面を横切る方向且つ深さh1で形
成された複数条の平行な第1溝、11,11…及
び12,12…は同様に第5図及び第6図の通り
治具6の表裏両面m1,m2に各凹部7,7…、
8,8…の横に並ぶ2つの上端開口を横切る方向
且つ深さh2で形成された複数条の平行な第2溝で
ある。13,13…は第5図のC−C線で切断し
た第7図のように各凹部7,7…、8,8…の底
面に開口する真空吸着孔で、各々は外部の真空ポ
ンプ14に連結される。尚第7図で図番17及び
17′は後述する。各第1溝9,9…、10,1
0…は1本の第1リード線15が嵌入される幅を
持ち、各第2溝11,11…、12,12…は1
本の第2リード線6が嵌入される幅を持ち、この
両者の幅は通常同じで第1、第2リード線15,
16も同一線径のものが用いられる。尚第1溝
9,9…、10,10…及び第2溝11,11
…、12,12…は第5図乃至第7図のいずれに
も示されている。また治具6は図示しないが外部
支持体で上下反転可能に支持される。
D. Example An example of the above-mentioned jig used in the present invention will be described with reference to FIGS. A plurality of recesses 8, 8 , .
The recesses are formed in the same arrangement, in the same number, and in the same shape as the recesses 7, 7, 8, 8, . 9, 9... and 10, 10... are the front and back surfaces m 1 , A plurality of parallel first grooves 11, 11... and 12, 12 formed in a direction transverse to the two bottom surfaces of each recess 7, 7..., 8, 8... and at a depth h 1 in m 2 . Similarly, as shown in FIGS. 5 and 6, the recesses 7, 7, . . . on both sides m 1 and m 2 of the jig 6,
A plurality of parallel second grooves are formed in a direction transverse to two upper end openings lined up side by side and have a depth h2 . 13, 13... are vacuum suction holes opened at the bottoms of the respective recesses 7, 7..., 8, 8... as shown in FIG. 7 taken along line C-C in FIG. connected to. Note that the drawing numbers 17 and 17' in FIG. 7 will be described later. Each first groove 9, 9..., 10, 1
0... has a width into which one first lead wire 15 is inserted, and each second groove 11, 11..., 12, 12... has a width of 1
It has a width into which the second lead wire 6 of the book is inserted, and these two widths are usually the same, and the first and second lead wires 15,
16 also have the same wire diameter. Note that the first grooves 9, 9..., 10, 10... and the second grooves 11, 11
..., 12, 12... are shown in any of FIGS. 5 to 7. Although the jig 6 is not shown, it is supported by an external support so that it can be turned upside down.

次に治具6による本発明の方法を工程毎に説明
する。
Next, the method of the present invention using the jig 6 will be explained step by step.

先ず第8図に示す如く各第1溝9,9…、1
0,10…に長尺な第1リード線15を順次嵌入
していく。これは治具6を第8図の矢印方向に回
転させながら1本の長尺な第1リード線15を端
の第1溝9から始めて10−9−10−9…と順
次に嵌入していくようにすれば自動化、高速化が
可能である。
First, as shown in FIG. 8, each first groove 9, 9..., 1
The long first lead wires 15 are sequentially inserted into the wires 0, 10, . . . . This is done by sequentially inserting one long first lead wire 15 starting from the first groove 9 at the end, 10-9-10-9, etc. while rotating the jig 6 in the direction of the arrow in FIG. It is possible to automate and speed up the process if you proceed.

次に真空ポンプ14を作動させておいて、第9
図に示すように治具6の表面m1を上にして各凹
部7,7…に素子1,1…を1個ずつ挿入し真空
吸着させる。この素子嵌入は例えば第13図に示
すように、別の素子整列治具17に素子1,1…
を整列保持させ、この各素子1,1…上にスクリ
ーン印刷等で定量の半田18,18…を塗着させ
ておいて、その上に治具6の下にした表面m1
位置決めして被せ、全体を上下逆に反転させれば
各素子1,1…は凹部7,7…に真空引きされて
吸引され、一括処埋で確実に行える。同様の要領
で治具6の裏面m2の各凹部8,8…にも各素子
1,1…を1個ずつ挿入し真空吸着させる。尚上
述した素子1,1…を各凹部7,7…及び8,8
…に真空吸着させる時には、素子1,1…を吸着
する側と反対側の凹部の真空吸着孔13,13…
は、第7図に示すように当て板治具17′で閉塞
しておく必要がある。
Next, the vacuum pump 14 is operated, and the ninth
As shown in the figure, the elements 1, 1... are inserted one by one into each of the recesses 7, 7... with the surface m1 of the jig 6 facing upward, and are vacuum-adsorbed. For example, as shown in FIG. 13, the elements 1, 1, . . . are inserted into another element alignment jig 17.
are aligned and held, a certain amount of solder 18, 18... is applied by screen printing etc. onto each element 1, 1..., and the surface m1 below the jig 6 is positioned on top of it. If the entire device is placed on top and turned upside down, each element 1, 1... will be evacuated and suctioned into the recesses 7, 7..., making it possible to reliably perform the treatment all at once. In the same manner, each element 1, 1... is inserted one by one into each recess 8, 8... on the back surface m2 of the jig 6 and vacuum-adsorbed. It should be noted that the above-mentioned elements 1, 1... are connected to the respective recesses 7, 7... and 8, 8.
When vacuum adsorbing the elements 1, 1..., the vacuum suction holes 13, 13... in the concave portion on the opposite side to the side where the elements 1, 1... are adsorbed
must be closed with a patch plate jig 17' as shown in FIG.

而る後、第10図に示すように第1リード線1
5と同じ要領で長尺な第2リード線16を第2溝
11,11…、12,12…に順次に嵌入する。
この時の状態を第14図に示す。尚、19,19
…は各素子1,1…に予め塗着した半田である。
この時の各素子1,1…は第2リード線16で押
圧されるので各真空吸着孔13,13…の真空引
きを止める。
After that, as shown in FIG.
In the same manner as in step 5, the long second lead wires 16 are sequentially fitted into the second grooves 11, 11..., 12, 12....
The state at this time is shown in FIG. Furthermore, 19,19
... is solder applied in advance to each element 1, 1....
At this time, each element 1, 1... is pressed by the second lead wire 16, so the vacuum suction of each vacuum suction hole 13, 13... is stopped.

次に第11図に示すように治具6の両側面にリ
ード線仮固定用押板20,20を押し当てた状態
で全体を加熱炉(図示せず)に通して各素子1,
1…の半田18,18…,19,19…を溶融さ
せ、各素子1,1…に両リード線15,16を部
分的に一括して半田付けする。
Next, as shown in FIG. 11, the jig 6 is passed through a heating furnace (not shown) with press plates 20, 20 for temporarily fixing the lead wires pressed against both sides of the jig 6, and each element 1,
The solders 18, 18, 19, 19, .

後は例えば第12図に示すように治具6の表裏
両面m1,m2上の第2リード線16に横切る方向
でテープ21,21を貼布しておいて、3つのカ
ツター22,22,22で両リード線15,16
の先ず治具表面m1の両側コーナ部と中央の箇所
とを切断し、続いて治具6を上下反転させて同じ
ように切断する。このようにするとリード線切断
後の各部品はテープ21,21で連結された取扱
い便利なテーピング部品として治具6から取り出
されて後工程に送られる。
After that, as shown in FIG. 12, for example, tapes 21, 21 are pasted in a direction transverse to the second lead wires 16 on both sides m 1 and m 2 of the jig 6, and the three cutters 22, 22 are attached. , 22 with both lead wires 15, 16
First, both corner portions and the center portion of the jig surface m 1 are cut, and then the jig 6 is turned upside down and cut in the same manner. In this way, each component after the lead wire has been cut is taken out from the jig 6 as a taped component connected by tapes 21, 21, which is easy to handle, and sent to a subsequent process.

尚、本発明の実施形態例は上記例に限らず、特
に治具の凹部は2列配置以外に格子状配置でより
多数個形成する等の変更が可能である。また素子
はサーミスタの素子に限らず、他の電子部品の素
子であつてもよく、特に素子の片面にのみリード
線接続をするものであれば上記治具の凹部と浅い
方の第2溝のみを利用する使用変更によつてバツ
チ処理が可能である。
Note that the embodiments of the present invention are not limited to the above examples, and in particular, modifications such as forming a larger number of recesses in the jig in a lattice-like arrangement instead of in two rows are possible. In addition, the element is not limited to a thermistor element, but may be an element of another electronic component. In particular, if the lead wire is connected only to one side of the element, only the concave part of the jig and the shallower second groove are used. Batch processing is possible by changing usage using .

ホ 発明の効果 以上説明したように、本発明によれば小形素子
へのリード線接続のバツチ処理が簡単で且つ治具
利用による位置決めで正確になり、歩留り改善や
量産性の大幅な向上化が図れ、電子部品のコスト
ダウン化が可能となる。
E. Effects of the Invention As explained above, according to the present invention, batch processing for connecting lead wires to small devices is simple and accurate positioning is achieved using a jig, and yield improvement and mass productivity are greatly improved. This makes it possible to reduce the cost of electronic components.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は電子部品の一例を示す部分
断面視正面図及び側面図、第3図及び第4図は本
発明で使用する治具の一例を示す平面図及び正面
図、第5図及び第6図は第3図のA−A線及びB
−B線に沿う断面図、第7図は第5図のC−C線
に沿う拡大断面図、第8図乃至第12図は本発明
の方法を説明するための各工程での治具の部分斜
視図と正面図、第13図は第9図の素子供給工程
の動作例を示す治具部分拡大断面図、第14図は
第10図の治具部分拡大断面図である。 1……素子、6……治具、m1……表面、m2
…裏面、7,8……凹部、9,10……第1溝、
11,12……第2溝、13……真空吸着孔、1
5……第1リード線、16……第2リード線。
1 and 2 are a partially sectional front view and a side view showing an example of an electronic component, FIGS. 3 and 4 are a plan view and a front view showing an example of a jig used in the present invention, and FIG. The figure and Figure 6 are lines A-A and B of Figure 3.
7 is an enlarged sectional view taken along line C-C in FIG. A partial perspective view and a front view, FIG. 13 is an enlarged sectional view of a part of the jig showing an example of the operation of the element feeding process of FIG. 9, and FIG. 14 is an enlarged sectional view of a part of the jig shown in FIG. 1...Element, 6...Jig, m 1 ...Surface, m 2 ...
...back surface, 7, 8... recess, 9, 10... first groove,
11, 12...Second groove, 13...Vacuum suction hole, 1
5...First lead wire, 16...Second lead wire.

Claims (1)

【特許請求の範囲】[Claims] 1 表裏両面に電子部品の素子が嵌まる複数の凹
部と、各凹部の底面を横切る複数の第1溝及び各
凹部の上端開口を横切る複数の第2溝を有し、前
記各凹部の底面に真空吸着孔を設けた治具の前記
各第1溝に第1リード線を嵌入する工程、前記各
凹部に素子を前記第1リード線との間に半田を介
して真空吸着させて嵌入する工程、前記各第2溝
に第2リード線を前記素子との間に半田を介して
嵌入する工程、全体を加熱炉内で加熱して各凹部
内の素子の表裏両面に第1、第2リード線を同時
に半田付けする工程を含むことを特徴とする電子
部品素子へのリード線接続方法。
1. A plurality of recesses into which electronic component elements are fitted on both the front and back surfaces, a plurality of first grooves that cross the bottom surface of each recess, and a plurality of second grooves that cross the upper end opening of each recess, and a plurality of second grooves that cross the top opening of each recess, and A step of fitting a first lead wire into each of the first grooves of a jig provided with a vacuum suction hole, and a step of fitting an element into each of the recesses by vacuum suctioning the element with the first lead wire via solder. , a step of fitting a second lead wire into each of the second grooves via solder between the element and the element; heating the whole in a heating furnace to form the first and second leads on both the front and back sides of the element in each recess; A method for connecting lead wires to an electronic component element, the method comprising the step of simultaneously soldering the wires.
JP58139128A 1983-07-28 1983-07-28 Connecting method of lead wire to electronic part element Granted JPS6030145A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58139128A JPS6030145A (en) 1983-07-28 1983-07-28 Connecting method of lead wire to electronic part element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58139128A JPS6030145A (en) 1983-07-28 1983-07-28 Connecting method of lead wire to electronic part element

Publications (2)

Publication Number Publication Date
JPS6030145A JPS6030145A (en) 1985-02-15
JPH0257681B2 true JPH0257681B2 (en) 1990-12-05

Family

ID=15238168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58139128A Granted JPS6030145A (en) 1983-07-28 1983-07-28 Connecting method of lead wire to electronic part element

Country Status (1)

Country Link
JP (1) JPS6030145A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0738835A (en) * 1993-07-23 1995-02-07 Nec Corp Simultaneous recording and reproducing device for multi-system signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0738835A (en) * 1993-07-23 1995-02-07 Nec Corp Simultaneous recording and reproducing device for multi-system signal

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Publication number Publication date
JPS6030145A (en) 1985-02-15

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