JPH0255957B2 - - Google Patents

Info

Publication number
JPH0255957B2
JPH0255957B2 JP20754985A JP20754985A JPH0255957B2 JP H0255957 B2 JPH0255957 B2 JP H0255957B2 JP 20754985 A JP20754985 A JP 20754985A JP 20754985 A JP20754985 A JP 20754985A JP H0255957 B2 JPH0255957 B2 JP H0255957B2
Authority
JP
Japan
Prior art keywords
power supply
layer
area
printed board
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP20754985A
Other languages
Japanese (ja)
Other versions
JPS6266699A (en
Inventor
Masaoki Ishiwatari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20754985A priority Critical patent/JPS6266699A/en
Publication of JPS6266699A publication Critical patent/JPS6266699A/en
Publication of JPH0255957B2 publication Critical patent/JPH0255957B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】 〔概要〕 多層プリント板の信号層の回路パターンを必要
としない電源用エリア部に、全面にわたり銅箔層
を残して、プリント板の板厚が平等になる構造と
することにより、プリント板の反りを防止し、ま
た、プレスフイツトピン型の端子を有するコネク
タ、搭載部品等の挿着の信頼度を向上させる。
[Detailed Description of the Invention] [Summary] A copper foil layer is left over the entire surface of the signal layer of a multilayer printed board in the power supply area that does not require a circuit pattern, so that the thickness of the printed board is equalized. This prevents the printed board from warping and improves the reliability of insertion of connectors having press-fit pin type terminals, mounted components, etc.

〔産業上の利用分野〕[Industrial application field]

本発明は多層プリント板、特に層構造の改良に
関する。
The present invention relates to multilayer printed boards, and in particular to improvements in layer structure.

半導体技術の進歩に伴い、小形の電子装置の電
源が開発され、プリント板に搭載可能となつてい
る。
With advances in semiconductor technology, power supplies for small electronic devices have been developed that can be mounted on printed circuit boards.

一方、多層プリント板に高密度に部品を実装し
て信号伝送の高速化、電子装置の小形化、低コス
ト化が行われている。この結果、プリント板へは
大電流の供給と共に、伝送での電圧降下を抑える
ため、多層プリント板の一層或いは複数層を電源
供給専用層、又その帰路用として一層或いは複数
層をアース専用層としている。
On the other hand, high-density mounting of components on multilayer printed circuit boards has led to faster signal transmission, smaller electronic devices, and lower costs. As a result, in addition to supplying a large current to the printed board, in order to suppress the voltage drop during transmission, one or more layers of the multilayer printed board are used as a layer dedicated to power supply, and one or more layers are used as a layer dedicated to grounding for the return path. There is.

そして、プリント板内での信号の回路部と電源
部とは、電源の高周波化されるスイツチングノイ
ズより回路部を融離するため、エリア分割して搭
載している。
The signal circuit section and the power supply section within the printed board are mounted in divided areas in order to prevent the circuit section from being affected by switching noise caused by the high frequency of the power supply.

又、多数の電子回路プリント板より電子ユニツ
トが構成される場合には、これら電子回路プリン
ト板への電源供給のため、専用の電源実装プリン
ト板を併設実装し、バツクボードプリント板を介
して供給する。
In addition, when an electronic unit is constructed from a large number of electronic circuit printed boards, a dedicated power supply mounting printed board is installed in order to supply power to these electronic circuit printed boards, and the power is supplied via a backboard printed board. do.

この時の実装形態は、複数の電子回路プリント
板の搭載エリアと、複数の電源実装プリント板の
搭載エリアとに分離させるのが一般的な実装方法
である。
A common mounting method at this time is to separate the mounting area into a mounting area for a plurality of electronic circuit printed boards and a mounting area for a plurality of power supply mounting printed boards.

また、近年のコネクタ、或いは搭載部品は、端
子をスルーホールに半田付け挿着することなく、
単に、スルーホールに押入しただけで、接続・固
定可能なプレスフイツトピン型を採用し、電子装
置のコストダウンを推進している。
In addition, recent connectors or mounted components do not require soldering and insertion of terminals into through holes.
By using a press fit pin type that can be connected and fixed simply by pushing it into a through hole, we are promoting cost reductions in electronic devices.

第2図は上述のような電子ユニツトの断面図で
あつて、一面が開口した箱形の筺体1は、側壁側
の電源実装プリント板4を並列するエリアDと、
中央部の電子回路プリント板3を並列するエリア
Sとに区分されている。
FIG. 2 is a cross-sectional view of the electronic unit as described above, in which the box-shaped housing 1 with one side open has an area D on the side wall where the power supply mounting printed boards 4 are arranged in parallel;
It is divided into an area S in which electronic circuit printed boards 3 are arranged in parallel in the center.

また、筺体1の底面には、同形の多層のバツク
ボードプリント板2A,2Bを装着し、バツクボ
ードプリント板2A,2Bの内側面に配設したボ
ード側コネクタのそれぞれに、電子回路プリント
板3、電源実装プリント板4をそれぞれ挿着する
ように構成してある。
Furthermore, multilayer backboard printed boards 2A and 2B of the same shape are attached to the bottom of the housing 1, and an electronic circuit printed board 3 is attached to each of the board-side connectors arranged on the inner surfaces of the backboard printed boards 2A and 2B. , and a power supply mounting printed board 4 are respectively inserted therein.

即ち、エリアSに並列した電子回路プリント板
3には、隣接したエリアDに並列した電源実装プ
リント板4から、スルーホールプリント板2A、
または2Bの電源層を介して電力を供給する構成
である。
That is, to the electronic circuit printed board 3 parallel to area S, through-hole printed board 2A,
Alternatively, the configuration is such that power is supplied through the 2B power supply layer.

この際、バツクボードプリント板、電子回路プ
リント板、及び電源実装プリント板等には、搭載
部品が隣接したプリント板に接触しないこと、筺
体に円滑に挿入、装着可能とするため、反りがな
いことが要求されている。
At this time, the backboard printed boards, electronic circuit printed boards, power supply mounting printed boards, etc. should not be warped so that mounted components do not come into contact with adjacent printed boards and can be inserted and installed smoothly into the housing. is required.

〔従来の技術〕[Conventional technology]

第3図は多層プリント板の1例の断面図、第4
図はバツクボードプリント板の従来例の構成図で
ある。
Figure 3 is a cross-sectional view of an example of a multilayer printed board;
The figure is a configuration diagram of a conventional example of a backboard printed board.

第2図に示すバツクボードプリント板2A,2
Bは第4図の如くに、一方の側縁に矩形状の電源
用エリア11、残りが回路用エリア10である信
号層L1,L2,L4,L5,L7,L8と、全
面にわたり銅箔Fが形成されたアース層L3、及
び電源層L6とより構成されている。なおアース
層L3は、信号層L2と信号層L4の間に、電源
層L6は信号層L5と信号層L7の間に設けてあ
る。
Backboard printed boards 2A, 2 shown in FIG.
As shown in Fig. 4, B has signal layers L1, L2, L4, L5, L7, and L8 with a rectangular power supply area 11 on one side edge and a circuit area 10 on the other side, and a copper foil F over the entire surface. The ground layer L3 includes a ground layer L3, and a power layer L6. Note that the ground layer L3 is provided between the signal layer L2 and the signal layer L4, and the power layer L6 is provided between the signal layer L5 and the signal layer L7.

基材の表面に銅箔を張り、その銅箔Fを所望に
エツチングして形成した信号層L1は、その回路
用エリア10に、走行方向がY軸に並行した信号
パターンと、所望にスルーホール8が形成されて
いる。また、電源用エリア11には、スルーホー
ル8が並設されているだけで、パターンは形成さ
れていない。即ち、銅箔はエツチング除去され残
存しない。
The signal layer L1 is formed by applying copper foil to the surface of the base material and etching the copper foil F as desired.The signal layer L1 has a signal pattern whose running direction is parallel to the Y axis and a through hole as desired in the circuit area 10. 8 is formed. Further, in the power supply area 11, only the through holes 8 are arranged in parallel, and no pattern is formed therein. That is, the copper foil is etched away and does not remain.

次層の信号層L2には、回路用エリア10に走
行方向がX軸に並行した信号パターンと、所望に
スルーホール8が形成されている。電源用エリア
11の形状は、信号層L1の電源用エリア11と
同形状である。
In the signal layer L2, which is the next layer, a signal pattern whose running direction is parallel to the X-axis is formed in the circuit area 10, and through holes 8 are formed as desired. The shape of the power supply area 11 is the same as that of the power supply area 11 of the signal layer L1.

アース層L3の基材の裏面には信号層L4が形
成され、信号層L5の基材の裏面には電源層L6
が形成されている。また、信号層L5、信号層L
8は信号層L2と同形状であり、信号層L4、信
号層L7は信号層L1と同形状である。
A signal layer L4 is formed on the back surface of the base material of the ground layer L3, and a power layer L6 is formed on the back surface of the base material of the signal layer L5.
is formed. In addition, the signal layer L5, the signal layer L
8 has the same shape as the signal layer L2, and the signal layer L4 and the signal layer L7 have the same shape as the signal layer L1.

このように、それぞれの信号層L1乃至信号層
L8に、Y軸方向、X軸方向の信号パターンを交
互に形成して、信号パターンの高密度化を進め、
且つスルーホール8を介して、プレスフイツトピ
ン型の端子を備えたコネクタに接続するように構
成してある。
In this way, the signal patterns in the Y-axis direction and the X-axis direction are alternately formed in each of the signal layers L1 to L8, thereby increasing the density of the signal patterns.
Further, it is configured to be connected to a connector equipped with a press-fit pin type terminal via a through hole 8.

上述のような各層は、それぞれプリプレグ7を
介して接着され、第3図の如くに一体化・重層さ
れている。
The above-mentioned layers are adhered to each other via prepregs 7, and are integrated and layered as shown in FIG. 3.

なお、このような多層プリント板の板厚Tが、
下式に準拠することは公知である。
In addition, the board thickness T of such a multilayer printed board is
It is known that the following formula is followed.

T=T1+T2…Tn+0.1×Pn−α・C+2×Tp ここで、 T1,T2…Tn 銅箔を含めた各層の板厚 Pn プリプレグ7の枚数 C 内層銅箔の合計厚さ α(除去率) 内層銅箔のエツチングされる部分
の面積百分率 Tp 外層のメツキ厚さ 上式により、第3図の多層プリント板の板厚T
を計算すると、 αが100%の時…T=2.258mm αが0%の時…T=2.678mm となり、最大0.42mmの差が生じる。
T=T 1 +T 2 ...Tn+0.1×Pn-α・C+2×Tp Here, T 1 , T 2 ...Tn Thickness of each layer including copper foil Pn Number of prepregs 7 C Total thickness of inner layer copper foil α (removal rate) Area percentage of the etched portion of the inner layer copper foil Tp Plating thickness of the outer layer From the above formula, the board thickness T of the multilayer printed board shown in Figure 3
When α is 100%...T=2.258mm When α is 0%...T=2.678mm, resulting in a maximum difference of 0.42mm.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら上記従来の多層プリント板には、
それぞれの信号層の電源用エリア11は、銅箔が
除去されているので、電源用エリア11部の板厚
が、他方の回路用エリア10部の板厚よりも薄く
なつている。
However, the conventional multilayer printed board mentioned above has
Since the copper foil is removed from the power supply area 11 of each signal layer, the thickness of the power supply area 11 is thinner than the thickness of the other circuit area 10.

したがつて、電源用エリア11部にプレスフイ
ツトピン型の端子を有するコネクタ、或いは搭載
部品を実装すると、弾接面積が小さいことに起因
して、接触面積が確保されず接触不良を惹起する
という問題点がある。
Therefore, if a connector having a press-fit pin type terminal or a mounting component is mounted in the power supply area 11, the contact area will not be secured due to the small elastic contact area, resulting in poor contact. There is a problem.

また、板厚が不平等であるので、重層製作時の
加熱、あるいは部品搭載時の加熱等により、反り
が発生し易いという問題点がある。
Furthermore, since the plate thicknesses are unequal, there is a problem in that warping is likely to occur due to heating during multi-layer manufacturing or heating during mounting of components.

〔問題点を解決するための手段〕[Means for solving problems]

上記従来の問題点を解決するため本発明は、第
1図のように、それぞれの信号層が回路用エリア
10と電源用エリア11とに、区画された多層の
バツクボードプリント板、或いは他の多層プリン
ト板において、電源用エリアの全面に銅箔を残し
て、アースパターン15、或いは電源パターン1
6を設けたものである。
In order to solve the above conventional problems, the present invention utilizes a multilayer backboard printed board in which each signal layer is divided into a circuit area 10 and a power supply area 11, as shown in FIG. In a multilayer printed board, leave the copper foil on the entire surface of the power supply area and connect it to the ground pattern 15 or power supply pattern 1.
6.

〔作用〕[Effect]

上記本発明の手段によれば、多層に重層された
信号層のそれぞれの電源用エリア11には、全面
に銅箔を残存して、銅箔の除去率を回路用エリア
10の除去率に近付けている。よつて、電源用エ
リア11部の板厚と回路用エリア10部の板厚は
殆ど等しい。
According to the means of the present invention, the copper foil remains on the entire surface of each power supply area 11 of the multilayered signal layer, so that the removal rate of the copper foil approaches the removal rate of the circuit area 10. ing. Therefore, the board thickness of the power supply area 11 and the board thickness of the circuit area 10 are almost equal.

したがつて、電源用エリア11部にプレスフイ
ツトピン型の端子を有するコネクタ等を実装して
も、弾接面積が所定に大きいので接触面積が確保
され、接触不良等を惹起する恐れがない。
Therefore, even if a connector or the like having a press-fit pin type terminal is mounted in the power supply area 11, the elastic contact area is large enough to ensure a sufficient contact area and there is no risk of contact failure. .

また、板厚が平等で、且つ対称構造であるの
で、重層製作時、あるいは部品搭載時に、反りが
発生し難い。更に、電源・アースパターンを強化
することで大電流を低電圧降下で供給できる。
Furthermore, since the plate thickness is equal and the structure is symmetrical, warping is less likely to occur during multi-layer manufacturing or when mounting components. Furthermore, by strengthening the power supply and grounding patterns, it is possible to supply large currents with low voltage drops.

〔実施例〕〔Example〕

以下図示実施例により、本発明を具体的に説明
する。なお、全図を通じて同一符号は同一対象物
を示す。
The present invention will be specifically explained below with reference to illustrated examples. Note that the same reference numerals indicate the same objects throughout the figures.

第1図は、本発明の1実施例の構成図であつ
て、第2図のバツクボードプリント板2A,2B
の各層のパターン構成を示す。
FIG. 1 is a block diagram of one embodiment of the present invention, in which backboard printed boards 2A and 2B shown in FIG.
The pattern configuration of each layer is shown.

即ちバツクボードプリント板は、信号層L1,
L2,L4,L5,L7,L8の順に重層し、信
号層L2と信号層L4の間にアース層L3を、信
号層L5と信号層L7の間に、電源層L6を設け
てある。
That is, the backboard printed board has signal layers L1,
L2, L4, L5, L7, and L8 are layered in this order, and a ground layer L3 is provided between the signal layer L2 and the signal layer L4, and a power layer L6 is provided between the signal layer L5 and the signal layer L7.

アース層L3と電源層L6とは、全面に銅箔を
残して所望のベタパターンを形成してある。
The ground layer L3 and the power layer L6 are formed into a desired solid pattern with copper foil left on the entire surface.

一方信号層L1,L2,L4,L7,L8、
は、一方の側縁に矩形状の電源用エリア11、残
りの回路用エリア10とに区画されている。電源
用エリア11には、銅箔を全面にわたり残して、
アースパターン15を形成してある。
On the other hand, the signal layers L1, L2, L4, L7, L8,
is divided into a rectangular power supply area 11 and the remaining circuit area 10 on one side edge. In the power supply area 11, leave the copper foil over the entire surface,
A ground pattern 15 is formed.

また、電源層L6の基材の反対側面の信号層L
5の電源用エリア11には、銅箔を全面にわたり
残して、電源パターン16を形成してある。
In addition, the signal layer L on the opposite side of the base material of the power supply layer L6
In the power supply area 11 of No. 5, a power supply pattern 16 is formed by leaving the copper foil over the entire surface.

またそれぞれの信号層の、回路用エリア10の
周縁には、電源用エリア11のアースパターン1
5、或いは電源パターン16に連結した縁枠状の
パターンを形成してある。
Also, on the periphery of the circuit area 10 of each signal layer, there is a ground pattern 1 of the power supply area 11.
5, or a frame-like pattern connected to the power supply pattern 16 is formed.

上述のように、電源用エリア11の全面に銅箔
を残して、ベタパターンを形成したので、電源用
エリア11と回路用エリア10の、銅箔の除去率
は殆ど等しい。
As described above, since the copper foil was left on the entire surface of the power supply area 11 to form a solid pattern, the removal rate of the copper foil in the power supply area 11 and the circuit area 10 is almost equal.

したがつて、電源用エリア11部の板厚と回路
用エリア10部の板厚とが殆ど等しい多層のバツ
クボードプリント板を、容易に得ることができ
る。
Therefore, it is possible to easily obtain a multilayer backboard printed board in which the thickness of the power supply area 11 and the circuit thickness of the circuit area 10 are almost equal.

よつて、バツクボードプリント板に反りが発生
することが少なく、且つプレスフイツトピン型端
子を有したコネクタの挿着面積が確保され、接触
障害を惹起する恐れが少ない。
Therefore, the backboard printed board is less likely to warp, and the insertion area for the connector having press-fit pin type terminals is secured, so that there is less risk of contact failure.

なお本発明は、図示例の如くにバツクボードプ
リント板に限らず、一部の区画に電源部品を搭載
し、他方の区画に回路部品を搭載する多層プリン
ト板に適用して、同様の効果がある。
The present invention is not limited to a backboard printed board as shown in the illustrated example, but can be applied to a multilayer printed board in which power supply components are mounted in some sections and circuit components are mounted in the other section, and similar effects can be achieved. be.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、多層プリント板
の各層の銅箔の除去率が等しく、且つ平等になる
如く分布させたもので、多層プリント板の各部の
板厚が等しくて、プレスフイツトピン型端子を備
えたコネクタ、或いは他の部品を実装するにあた
り、接触面積が確保され、接触不良等を惹起する
恐れがなく、且つ製作時、部品実装時等に反りが
発生し難い、更には電流容量が増加する中で大電
流の供給を低変動で供給できる等、実用上で優れ
た効果がある。
As explained above, in the present invention, the removal rate of copper foil in each layer of a multilayer printed board is equal and evenly distributed, the thickness of each part of the multilayer printed board is equal, and the press fit pin When mounting connectors with type terminals or other components, the contact area is secured, there is no risk of contact failure, and warping is unlikely to occur during manufacturing or component mounting, and the current As the capacity increases, it has excellent practical effects, such as being able to supply large currents with low fluctuations.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の1実施例の構成図、第2図は
電子ユニツトの断面図、第3図は多層プリント板
の1例の断面図、第4図は従来例の多層プリント
板の構成図である。 図において、1は筺体、2A,2Bはバツクボ
ードプリント板、3は電子回路プリント板、4は
電源実装プリント板、7はプリプレグ、8はスル
ーホール、10は回路用エリア、11は電源用エ
リア、15はアースパターン、16は電源パター
ン、L1,L2,L4,L5,L7,L8は信号
層、L3はアース層、L6は電源層、Fは銅箔を
示す。
Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a sectional view of an electronic unit, Fig. 3 is a sectional view of an example of a multilayer printed board, and Fig. 4 is a configuration of a conventional multilayer printed board. It is a diagram. In the figure, 1 is a housing, 2A and 2B are backboard printed boards, 3 is an electronic circuit printed board, 4 is a power supply mounting printed board, 7 is a prepreg, 8 is a through hole, 10 is a circuit area, and 11 is a power supply area , 15 is an earth pattern, 16 is a power supply pattern, L1, L2, L4, L5, L7, and L8 are signal layers, L3 is an earth layer, L6 is a power supply layer, and F is a copper foil.

Claims (1)

【特許請求の範囲】 1 それぞれの信号層が回路用エリア10と電源
用エリア11とに、区画された多層プリント板に
おいて、 該電源用エリア11の全面に銅箔を残して、ア
ースパターン15或いは電源パターン16を設け
たことを特徴とする多層プリント板構造。
[Claims] 1. In a multilayer printed board in which each signal layer is divided into a circuit area 10 and a power supply area 11, copper foil is left on the entire surface of the power supply area 11, and a ground pattern 15 or A multilayer printed board structure characterized by providing a power supply pattern 16.
JP20754985A 1985-09-19 1985-09-19 Multilayer printed board structure Granted JPS6266699A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20754985A JPS6266699A (en) 1985-09-19 1985-09-19 Multilayer printed board structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20754985A JPS6266699A (en) 1985-09-19 1985-09-19 Multilayer printed board structure

Publications (2)

Publication Number Publication Date
JPS6266699A JPS6266699A (en) 1987-03-26
JPH0255957B2 true JPH0255957B2 (en) 1990-11-28

Family

ID=16541572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20754985A Granted JPS6266699A (en) 1985-09-19 1985-09-19 Multilayer printed board structure

Country Status (1)

Country Link
JP (1) JPS6266699A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60124959T2 (en) 2001-09-14 2007-05-24 Wayo Co. Ltd. ARTICLE SUPPORT

Also Published As

Publication number Publication date
JPS6266699A (en) 1987-03-26

Similar Documents

Publication Publication Date Title
EP0379686B1 (en) Printed circuit board
US5892658A (en) VME eurocard triple printed wiring board single slot module assembly
MY118245A (en) Multilayer printed circuit boards
JPS63211692A (en) Double-sided interconnection board
US6803527B2 (en) Circuit board with via through surface mount device contact
US20030089522A1 (en) Low impedance / high density connectivity of surface mount components on a printed wiring board
JPH0255957B2 (en)
JP2642922B2 (en) Printed wiring board
US7180752B2 (en) Method and structures for implementing enhanced reliability for printed circuit board high power dissipation applications
JPS63114299A (en) Printed wiring board
JPH0268988A (en) Surface mounting printed wiring board
JPH05160540A (en) Circuit board unit
JP2753766B2 (en) Substrate for mounting electronic components
JPH1079568A (en) Manufacturing method of printed circuit board
JPH05347485A (en) Edge connector for multilayer printed wiring board
US7020958B1 (en) Methods forming an integrated circuit package with a split cavity wall
JPH0231800Y2 (en)
JP2004327605A (en) Connection structure of printed circuit boards
JP3212933B2 (en) Composite circuit board
JPS5818992A (en) Connecting structure for circuit member
JPH0143877Y2 (en)
JPS6141272Y2 (en)
JPH06196832A (en) Insulating substrate with through-hole
JPH0621630A (en) Multilayer printed wiring board
JPH08779Y2 (en) Multilayer printed board