JPH0255336U - - Google Patents
Info
- Publication number
- JPH0255336U JPH0255336U JP13189788U JP13189788U JPH0255336U JP H0255336 U JPH0255336 U JP H0255336U JP 13189788 U JP13189788 U JP 13189788U JP 13189788 U JP13189788 U JP 13189788U JP H0255336 U JPH0255336 U JP H0255336U
- Authority
- JP
- Japan
- Prior art keywords
- address
- adder circuit
- memory
- input
- logical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Static Random-Access Memory (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13189788U JPH0255336U (me) | 1988-10-07 | 1988-10-07 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13189788U JPH0255336U (me) | 1988-10-07 | 1988-10-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0255336U true JPH0255336U (me) | 1990-04-20 |
Family
ID=31388376
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13189788U Pending JPH0255336U (me) | 1988-10-07 | 1988-10-07 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0255336U (me) |
-
1988
- 1988-10-07 JP JP13189788U patent/JPH0255336U/ja active Pending
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