JPH0254552A - Manufacture of dielectric isolation substrate - Google Patents

Abstract

PURPOSE:To prevent development of chipping, etc., by forming a step through etching of a rear periphery of a single crystalline silicon substrate and forming a V-shaped groove for isolation at the same time and by forming an arched conferred shape at a periphery of the substrate at the time of completion. CONSTITUTION:A V-shaped groove 14 which serves as an isolation region is formed and a step 15 is formed at the same time at an opening section on an opposite surface. After an oxide film 11 is removed, an oxide film 16 for isolation is formed to form a polycrystalline silicon layer 17. When a side of a periphery is conferred to a projecting arched shape of a desired diameter, a vertex (c) of an arc moves to the side of the polycrystalline silicon layer 17 because of the step 15. When the V-shaped groove 14 is polished and removed until its bottom is exposed, an end section (d) of the single crystalline silicon island does not make a sharp angle and forms an arc in this way.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a dielectric isolation substrate, and particularly to a method of obtaining an arcuate chamfered shape when the substrate is completed.

(Prior Art) Conventionally, as technologies in this field, there have been the following, for example.

The configuration will be explained below using figures.

FIG. 2 is a cross-sectional view of the manufacturing process of such a conventional dielectric isolation substrate, and FIG. 3 is a diagram showing a chamfering state of the dielectric isolation substrate material.

First, as shown in FIG. 2(a), a dielectric isolation substrate material 1 is prepared by forming a 7-shaped groove 3 for isolation on the surface (lower surface side in the figure) of a single crystal silicon substrate 2, and then forming a V-shaped groove 3 for isolation. It is obtained by forming an isolation insulating film 4 on the surface of the single crystal silicon substrate 2 including the inner wall of the groove 3, and further forming a polycrystalline silicon layer 5 as a support layer on this insulating film 4. In addition, when forming the polycrystalline silicon layer 5, it also adheres to the outer circumferential side and back surface of the single crystal silicon substrate 2, so that the dielectric material #substrate material l
has a large diameter.

Next, as shown in FIG. 2(b), the outer peripheral side surface of the dielectric bone #substrate material 1 is chamfered to obtain the target diameter while removing the polycrystalline silicon layer 5 attached to the side surface and back surface. Machining into a convex arc shape. This chamfering method is, for example, the method shown in FIG.
(disclosed in No. 21).

That is, processing is carried out by pressing the dielectric ribs against the side surface of the PM substrate material 1 while rotating a V-groove-shaped grinding wheel 7, and the diameter of the dielectric separated substrate material 1 is equal to the cut of the grinding wheel 7. By controlling the amount, the desired dimensions can be easily achieved.

Next, as shown in FIG. 2(c), the surface (lower surface side in the figure) of the polycrystalline silicon layer 5 of this dielectric isolation substrate material 1 is used as a flat reference surface in the subsequent process. Polish as shown. The amount of polishing here is within a range that allows the polycrystalline silicon layer 5 to have a sufficient thickness as a support layer.

Next, using the flat surface of the polycrystalline silicon layer 5 as a reference plane, the monocrystalline silicon base vi2 is polished from the back surface (upper surface side in the figure) until the bottom of the V-shaped groove 3 is exposed, as shown in FIG. As shown in (d), a dielectric isolation substrate on which single crystal silicon islands 2a, 2b2c, . . . surrounded by an insulating film 4 are formed is obtained.

(Problem to be Solved by the Invention) However, in the above-described conventional method for manufacturing a dielectric isolation substrate, the shape of the obtained dielectric isolation substrate is limited to the end face on the single crystal silicon side [FIG. 2(d)] In part a), there is a drawback that the shape is so sharp that even if chamfering is performed, it becomes meaningless, and this causes chips etc. to occur in the subsequent element forming process. As shown in FIG. 2(a), in order to ensure the thickness of the polycrystalline silicon layer 5 as a support layer, it is usually necessary to form the polycrystalline silicon layer 5 to a thickness comparable to that of the single crystal silicon substrate 2. This is because the apex of the arc obtained by the chamfering process in FIG. This is because most of the single-crystal silicon substrate 2 is removed by polishing (usually about 10 to 50 μm is left), and its apex is located at the end face.

As a way to solve this drawback, Fig. 4 (Japanese Patent Laid-Open No.
There is a method shown in (see No.-208841). That is, the fourth
As shown in Figure (b), the apex of the arc shape is chamfered in advance so that it is located on the polycrystalline silicon layer 5 side. Also in this case, as shown in FIG. 4(a), the dielectric bone IS plate material 1
The outer peripheral edge of the single crystal silicon substrate 2 on which the V-shaped groove 3 is formed is angular, and in order to chamfer the outer peripheral surface, it is necessary to prepare a special grindstone having a desired shape. In other words,
As shown in Fig. 4(b), this type of grindstone must have a surface of a specific shape in order to chamfer an outer peripheral surface that is not vertically symmetrical, so it is not versatile and is expensive. There was a problem with it being bulky.

The present invention eliminates the above-mentioned problems, makes it possible to form an arcuate chamfered shape without forming sharp parts on the outer periphery of the substrate when the dielectric isolation substrate is completed, and moreover uses a low-cost dielectric material. An object of the present invention is to provide a method for mounting a separated substrate.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention provides a method for manufacturing a dielectric isolation substrate, in which a first insulating film is formed on the entire surface of a single crystal semiconductor substrate, and the first insulating film is formed on the entire surface of a single crystal semiconductor substrate. patterning the insulating film of step 1; etching the single crystal semiconductor substrate using the patterned insulating film as an etching mask material;
a step of forming a V-groove for element isolation on the surface of the single crystal semiconductor substrate; a step of forming a stepped portion having an arbitrary etching width and amount from the outer peripheral end on the outer peripheral portion of the back surface of the single crystal semiconductor substrate; forming a second insulating film for element isolation on the entire surface after removing the first insulating film; forming a support layer on the front side of the single crystal semiconductor substrate; and forming a support layer on the outer periphery of the substrate. chamfering the side surfaces into an arcuate shape, and polishing the single crystal semiconductor substrate from the back surface side using the surface of the support layer as a reference surface until the bottom of the V-shaped groove is exposed;
The step of removing the wafer and the step of removing the wafer are sequentially performed.

(Function) According to the present invention, in the method for manufacturing a dielectric isolation substrate,
When etching and forming the 7-shaped groove for separation, at the same time etching the outer periphery of the back surface of the single crystal silicon substrate to form a step, the apex of the arc shape is made more easily than before when chamfering the polycrystalline silicon substrate. It is possible to form an arcuate chamfered shape that can be positioned on the layer side and prevent sharp parts from being formed on the outer periphery of the substrate when the dielectric isolation substrate is completed.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a cross-sectional view of the manufacturing process of a dielectric isolation substrate showing an embodiment of the present invention.

First, as shown in FIG. 1(a), 1 μll of oxide is formed on the entire surface of a single crystal silicon substrate 10 having a (100) plane, and then the main surface (
An opening 12 is provided at a desired position on the lower surface (in the figure), and an opening 13 having an arbitrary width from the peripheral edge of the substrate is formed on the opposite surface. The width of the opening 13 is suitably a value slightly larger than the width to which the abrasive stone will be applied during the subsequent chamfering process, for example, about 1 to 2III+.

Next, as shown in FIG. 1(b), so-called anisotropic etching is performed using an etching solution such as a KOH aqueous solution using the patterned oxide 11111 as a mask, and a separation region is formed in the opening 12 on the main surface. A V-shaped groove I4 is formed, and a stepped portion 15 is formed in the opening 13 on the opposite surface. Here, the amount of step (depth) of the step portion 15 may be arbitrary as long as the thickness of the outer periphery of the single crystal silicon substrate 10 still maintains sufficient strength for the post-etching process, and usually The etching end point is when the separation V-shaped groove 14 is completed.

Since it is desirable to
Next, there is a step with a depth of about 50 μm).
As shown in FIG. 1C, after the oxide film 11 used as an etching mask material is completely removed, an oxide film for isolation is formed on the entire surface of the single crystal silicon substrate 10, including the V-shaped groove 14 and the stepped portion 15. 16 is formed, and a polycrystalline silicon layer 17 serving as a support layer is formed on the main surface including the V-shaped groove 14 (lower surface side in the figure) to a thickness equivalent to that of the single-crystal silicon cover plate 10. Thereby, the dielectric isolation substrate material 18 before the Kenreki process can be obtained. Note that the diameter of the dielectric bone #substrate material 18 is smaller than the diameter of the overgrown crystalline silicon substrate 10 since it will adhere to the outer circumferential side and back surface of the single crystal silicon substrate 10 to some extent when forming the polycrystalline silicon layer 17. It becomes a big state.

Next, as shown in FIG. 1(d), the outer circumferential side surface is chamfered using a method similar to the conventional method, and the polycrystalline silicon layer 17 attached to the side and back surfaces is removed until the target diameter is obtained. Machining into a convex arc shape. At this time, the apex C of the convex arc shape is inevitably located on the polycrystalline silicon layer 17 side by the amount that the thickness of the outer peripheral part of the single crystal silicon substrate 10 is thinned due to the step part 15 provided in FIG. 1(b). (The dotted line in the figure indicates the center).

Next, as shown in FIG. 1(e), polycrystalline silicon J1
! The surface of i17 is polished to the extent that a sufficient thickness can be ensured as a support layer, thereby forming a surface that will serve as a flat reference surface in subsequent steps.

Next, using the flat surface of the polycrystalline silicon layer 17 as a reference plane, the V-shaped groove 1 is opened from the opposite surface side of the single crystal silicon substrate 10.
Polish and remove until you see the bottom exposed at 4.

As a result, as shown in FIG. 1 (f>), the oxide film 16
Single crystal silicon islands 10a, 10b, loc・
... is formed, and a dielectric isolation substrate can be obtained.

By the way, the outer circumferential chamfered shape of the completed dielectric isolation substrate has a convex arc-shaped apex C, as explained in FIG. 1(d).
is located on the polycrystalline silicon layer 17 side than in the past, so as shown in FIG. A circular arc shape can be formed.

Note that the present invention is not limited to the above embodiments,
Various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

(Effects of the Invention) As described in detail above, according to the present invention, a step is provided on the outer periphery of the back surface of a single crystal silicon substrate, so that the apex of the convex arc shape obtained by chamfering is different from the conventional one. It can be reliably located on the polycrystalline silicon layer side, and as a result, when the dielectric isolation substrate is completed, it can be formed into an arcuate shape with no sharp parts on the outer periphery. Therefore,
Dielectric material generated during post-processing! l! Accidents such as chipping around the substrate can be eliminated, and this can be done without making any particular changes to the conventionally used chamfering grindstone or the manufacturing method of the dielectric separation substrate.

[Brief explanation of the drawing]

Figure 1 is a sectional view of the manufacturing process of a dielectric isolation substrate showing an embodiment of the present invention, Figure 2 is a sectional view of the manufacturing process of a conventional dielectric isolation substrate, and Figure 3 is a chamfering of the conventional dielectric isolation substrate material. FIG. 4, which is a diagram showing the processing state, is a partial sectional view of the processing process of another conventional dielectric bone jiI substrate material. 10... Single crystal silicon substrate, 10a, 10b, 10
c... Single crystal silicon island, 11.16... Oxide film,
12.13...opening, 14...7-shaped groove, 15...
- Stepped portion, 17... Polycrystalline silicon layer, 18... Dielectric isolation substrate material. Patent applicant: Oki Electric Industry Co., Ltd. Agent: Patent attorney: Mamoru Shimizu (1 other person)

Claims (1)

[Claims] (a) a step of forming a first insulating film on the entire surface of a single crystal semiconductor substrate and patterning the first insulating film; (b) using an etching mask to cover the patterned insulating film; (c) etching the single crystal semiconductor substrate as a material to form a V-shaped groove for element isolation on the surface of the single crystal semiconductor substrate; (d) forming a second insulating film for element isolation on the entire surface after removing the first insulating film; (e) forming a second insulating film for element isolation on the entire surface; (f) chamfering the outer peripheral side surface of the substrate into an arc shape; (g) using the surface of the support layer as a reference plane; A method for manufacturing a dielectric isolation substrate, which comprises sequentially performing the steps of polishing and removing the bottom of the V-shaped groove from the back side of the single crystal semiconductor substrate until it is exposed.