JPH0253811B2 - - Google Patents

Info

Publication number
JPH0253811B2
JPH0253811B2 JP57101268A JP10126882A JPH0253811B2 JP H0253811 B2 JPH0253811 B2 JP H0253811B2 JP 57101268 A JP57101268 A JP 57101268A JP 10126882 A JP10126882 A JP 10126882A JP H0253811 B2 JPH0253811 B2 JP H0253811B2
Authority
JP
Japan
Prior art keywords
graph
nodes
node
processor
random access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57101268A
Other languages
English (en)
Japanese (ja)
Other versions
JPS588359A (ja
Inventor
Furedoritsuku Haagenmaiyaa Junia Kaaru
Rii Rotsugusudon Geari
Seshiru Boruton Burento
Roorensu Mainaa Junia Robaato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Unisys Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unisys Corp filed Critical Unisys Corp
Publication of JPS588359A publication Critical patent/JPS588359A/ja
Publication of JPH0253811B2 publication Critical patent/JPH0253811B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
    • G06F15/17343—Direct connection machines, e.g. completely connected computers, point to point communication networks wherein the interconnection is dynamically configurable, e.g. having loosely coupled nearest neighbor architecture
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4494—Execution paradigms, e.g. implementations of programming paradigms data driven

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Devices For Executing Special Programs (AREA)
  • Multi Processors (AREA)
JP57101268A 1981-07-07 1982-06-11 還元プロセサの同時処理回路網および処理方法 Granted JPS588359A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US28106581A 1981-07-07 1981-07-07
US281065 1981-07-07

Publications (2)

Publication Number Publication Date
JPS588359A JPS588359A (ja) 1983-01-18
JPH0253811B2 true JPH0253811B2 (enExample) 1990-11-19

Family

ID=23075796

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57101268A Granted JPS588359A (ja) 1981-07-07 1982-06-11 還元プロセサの同時処理回路網および処理方法

Country Status (3)

Country Link
EP (1) EP0069314B1 (enExample)
JP (1) JPS588359A (enExample)
DE (1) DE3276971D1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4498133A (en) * 1981-12-10 1985-02-05 Burroughs Corp. Selector switch for a concurrent network of processors
US4482996A (en) * 1982-09-02 1984-11-13 Burroughs Corporation Five port module as a node in an asynchronous speed independent network of concurrent processors
JPS60184666U (ja) * 1984-05-17 1985-12-07 株式会社　丹下紙工品製作所 製本の構造体
US4734848A (en) * 1984-07-17 1988-03-29 Hitachi, Ltd. Combination reduction processing method and apparatus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3978452A (en) * 1974-02-28 1976-08-31 Burroughs Corporation System and method for concurrent and pipeline processing employing a data driven network
US4307446A (en) * 1979-05-02 1981-12-22 Burroughs Corporation Digital communication networks employing speed independent switches

Also Published As

Publication number Publication date
EP0069314B1 (en) 1987-08-12
EP0069314A2 (en) 1983-01-12
EP0069314A3 (en) 1983-03-30
JPS588359A (ja) 1983-01-18
DE3276971D1 (en) 1987-09-17

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