JPH0249470A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To prevent a reverse staggered type transistor from varying in characteristic by a method wherein a hole trap, subsisting near the surface of a silicon nitride film of a gate insulating film, is compensated for with a nitrogen plasma treatment. CONSTITUTION:An gate electrode G is formed on a transparent insulating substrate P, and a silicon nitride film 1 is formed on the substrate P and also on the electrode G. Gas containing nitrogen as an elemental component being introduced into a reaction vessel, the surface of the silicon film 1 is treated with the plasma produced from gas which contains nitrogen as an elemental component. A hole trap near the surface of the silicon film 1 is compensated with nitrogen plasma. Next, the gas introduced into the same reaction vessel is replaced with silane gas, and an amorphous silicon layer 3 is formed through a plasma chemical vapor growth method. By this setup, an reverse staggered type thin film transistor can be prevented from varying in characteristics.

Description

[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing an inverted staggered thin film transistor for driving a liquid crystal, the purpose is to prevent variations in characteristics of the thin film transistor, and the method involves forming a gate electrode on a transparent insulating substrate, and then forming the gate electrode on a transparent insulating substrate. After forming a gate insulating film made of a silicon nitride film on the transparent insulating substrate including the gate electrode, introducing a gas containing nitrogen as an elemental component into a reaction tank in which the transparent insulating substrate is placed, The surface of the silicon nitride film is treated with plasma generated from the gas containing nitrogen as an elemental component, and then, in the same reaction tank, the introduced gas is switched to silane gas, and an amorphous silicon layer is formed by plasma chemical vapor deposition. The structure includes a step of forming an active semiconductor layer consisting of the following.

[Industrial application field]

The present invention relates to a method of manufacturing a thin film transistor for driving a liquid crystal.

Since liquid crystal display devices have characteristics such as low power consumption, light weight, and easy color display, they are gaining a wide market as flat display devices for use in blur screens and OA terminal equipment. Particularly, active matrix liquid crystal display devices driven by thin film transistors, which have a large capacity and provide clear gradation display, have been partially put into practical use and are currently being actively developed and researched.

This active matrix liquid crystal display device has each pixel (
An inverted staggered thin film transistor is added to the liquid crystal cell to drive the cell. Therefore, in order to manufacture an active matrix type liquid crystal display device, it is necessary to manufacture thin film transistors ranging from several directions to several tens of directions without defects and at a high yield.

[Conventional technology]

In order to manufacture thin film transistor (TPT) matrices with high yield, data bus lines D as shown in FIG.
B is provided on the opposite substrate P' side, and on the P side of the thin film transistor substrate (hereinafter abbreviated as TPT substrate), the drain electrode is connected to the scan path line SB having the next scanning order, thereby eliminating the need for a common path line. A gate-connection type liquid crystal display device that eliminates pass line intersections has been proposed (see Japanese Patent Application No. 61-212696).

In this method, as mentioned above, the drain electrode of the TFT is connected to the next scan path line SB, so when the scan path line SB is not selected (liquid crystal applied voltage is stored), the drain and gate are connected. The potentials are the same, and the gate bias cannot be set negative with respect to the drain. Therefore, the off-state current when the gate bias is 0■ is
It needs to be sufficiently low.

[Problems to be Solved by the Invention] ``The off-state current when the gate bias of the FFT is O, as shown in characteristic curve I in Figure 5, is sufficiently low at the beginning of the use of the TPT, but it remains When used for a period of time, the characteristics change as shown by the characteristic curve (■), so the off-state current increases, making it impossible to maintain the voltage applied to the liquid crystal, which sometimes makes it impossible to display normally.

This is because when the scan path line SB is not selected, the gate is effectively biased to 0 with respect to the source, so holes are injected and trapped in the insulating film, and T
This was caused by a shift in the PT characteristics in the negative direction.

An object of the present invention is to prevent variations in characteristics of an inverted staggered thin film transistor.

[Means to solve the problem]

In the present invention, as shown in FIG.
After forming a SiN:H film 1 as a gate insulating film by plasma chemical vapor deposition (P-CVD) using silane and ammonia as source gases, the NZ( The surface treatment of the SiN:H film 1 with (nitrogen) plasma 2 and the a-3i:H which is an operational semiconductor layer by the P-CVD method using silane as a raw material gas shown in FIG. 1(C)
Formation of layer 3 is performed continuously by switching the reaction gas used in the same reaction tank.

[For production]

In the present invention, S near the interface, which is the origin of hole traps,
It is understood that after the weak Si -1 bond in the i N :H film 1 is once dissociated, the bond is compensated by the nitrogen radicals in the nitrogen plasma together with the Si dangling bond that existed from the beginning.

The results of such nitrogen plasma treatment are shown in FIG. Compared to the untreated case, the shift in transistor characteristics with respect to negative gate bias is reduced to about 1/2 or less. Since the time dependence (long time; one hour or more) of this shift in transistor characteristics is proportional to log t, the characteristic fluctuations of the TPT made according to the present invention are significantly reduced compared to the conventional TPT. For example, the amount of variation 1ΔV1 in the dark value after using the conventional TPT for about 100 hours corresponds to the amount of variation when using the TPT prepared using the present invention for about 10,000 hours. As described above, according to the present invention, the reliability of TPT is significantly improved.

〔Example〕

An example will be described using FIGS. 3(a) to 3(d).

As shown in FIG. 3(a), a Ti film is formed to a thickness of about 70 nm by sputtering on a transparent insulating TPT substrate P such as a glass substrate, and then patterned to form a gate. Electrode G is formed.

Next, the TFT substrate P is placed in a reaction tank, and a SiN:H film 1 as shown in FIG.
Form to a thickness of .

Next, the gas introduced into the reaction tank is switched to N2 (nitrogen), and the surface of the SiN:H film 10 is treated with nitrogen plasma.

Furthermore, as shown in the same figure (C), the active semiconductor layer a-
3i: The H layer 3 is formed using silane gas, and the Stow film 4 as a protective film is formed using silane gas and nitrous oxide (N20) gas.

Next, as shown in FIG. 4(d), a positive resist film (not shown) is coated on the SiO□ film 4 and exposed from the back side of the TPT substrate P to align the position with the gate electrode G. A resist film was formed using the above SiO□ as a mask.
The exposed portion of the film 4 is removed, and then the n'a-3t:H layer 5 is removed.
After forming a Ti film 6 thereon, unnecessary parts of the n''a-3i:H layer 5 and Ti film 6 are removed by a lift-off method to form a source electrode S and a drain electrode. The inverted staggered TPT according to the example is completed.

In this example described above, the steps from forming the SiN film 1 to forming the n''a-3i layer 5 were performed continuously in the same reaction tank by switching the reaction gas. The N2 plasma treatment on the film 1 and the subsequent formation process of the a-3i layer 3 must be performed in succession in the same reaction tank by switching the reaction gas.

Among the above-mentioned series of steps, the other steps do not necessarily have to be performed continuously in the same reaction tank, but it is preferable that they be performed continuously in the same reaction tank as in this example.

By continuously performing the N2 plasma treatment and the formation process of the a-3i layer 3 in the same reaction tank, the effect of the N2 plasma treatment described above can be maintained, and as seen in FIG. Darkness value fluctuations over time will be reduced.

Between the N2 plasma treatment and the a-3i layer 3 formation step,
When the substrate to be processed is moved between reaction vessels, the characteristics change greatly (this is because the surface of the SiN:H film 1 is exposed to other atmospheres, It is understood that this is because undesirable gas molecules are adsorbed and the effect of bond compensation by the N2 plasma treatment is lost.

〔Effect of the invention〕

As explained above, according to the present invention, the hole traps near the surface of SiN:H, which is the gate insulating film, are compensated for by nitrogen plasma treatment.
Shifts in PT characteristics can be reduced. the result,
Even after long-term driving, the off-state current when the gate bias is 0 can be kept sufficiently low. Therefore, when applied as a liquid crystal driving element in a gate-connected liquid crystal display device, the reliability of the device is improved. .

[Brief explanation of the drawing]

FIGS. 1(a) to (C) are diagrams explaining the structure of the thin film transistor of the present invention, FIG.
) to (d) are explanatory diagrams of one embodiment of the present invention, FIG. 4(a),
(b) is an explanatory diagram of a gate connection type liquid crystal display device, and FIG. 5 is an explanatory diagram of problems with a conventional thin film transistor. In the figure, 1 is a SiN:H film as a gate insulating film,
3 is an a'-3i:H layer as an active semiconductor layer, 4 is a Sin film as a protective film, and 5 is an n'' as a contact layer.
a-3i: H layer, 6 a Ti film, P a TFT substrate, G a gate electrode, S a source electrode, and D a drain electrode.

Claims (1)

[Claims] A gate electrode (G), a gate insulating film made of a silicon nitride film (1), and an active semiconductor layer made of an amorphous silicon layer (3) are formed on a transparent insulating substrate (P). When manufacturing a thin film transistor formed by sequentially laminating layers, a gate electrode (G) is formed on the transparent insulating substrate (P), and then a silicon nitride film (1) is formed on the transparent insulating substrate including on the gate electrode. After forming the silicon nitride film (1), a gas containing nitrogen as an elemental component is introduced into a reaction tank in which the transparent insulating substrate (P) is placed, so that the surface of the silicon nitride film (1) contains nitrogen as an elemental component. It is characterized by including a step of processing with plasma generated from a gas, and then, in the same reaction tank, changing the introduced gas to silane gas and forming the amorphous silicon layer (3) by plasma chemical vapor deposition. A method for manufacturing thin film transistors.