JPH0249386U - - Google Patents

Info

Publication number
JPH0249386U
JPH0249386U JP12778988U JP12778988U JPH0249386U JP H0249386 U JPH0249386 U JP H0249386U JP 12778988 U JP12778988 U JP 12778988U JP 12778988 U JP12778988 U JP 12778988U JP H0249386 U JPH0249386 U JP H0249386U
Authority
JP
Japan
Prior art keywords
voltage
pulse width
width modulation
pwm inverter
type pwm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12778988U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12778988U priority Critical patent/JPH0249386U/ja
Publication of JPH0249386U publication Critical patent/JPH0249386U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例の電圧型PWMイ
ンバータ装置の構成を示すブロツク図、第2図は
第1図の動作を示すタイムチヤート、第3図は電
圧型PWMインバータ装置の既提案例の構成を示
すブロツク図、第4図および第5図はそれぞれ第
3図の各部のタイムチヤートである。 1……直流電源、2A〜2D……スイツチング
素子、11……電圧型PWMインバータ本体、1
2……電圧検出回路、13……平均誤差電圧検出
部、14……加算器、15……パルス幅変調部、
16……デツドタイム発生部、25……リセツト
回路。
Fig. 1 is a block diagram showing the configuration of a voltage type PWM inverter device according to an embodiment of this invention, Fig. 2 is a time chart showing the operation of Fig. 1, and Fig. 3 is an already proposed example of a voltage type PWM inverter device. 4 and 5 are time charts of each part of FIG. 3, respectively. 1...DC power supply, 2A to 2D...Switching element, 11...Voltage type PWM inverter main body, 1
2... Voltage detection circuit, 13... Average error voltage detection section, 14... Adder, 15... Pulse width modulation section,
16...Dead time generating section, 25...Reset circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 直流電源と、この直流電源より給電される電圧
型PWMインバータ本体と、この電圧型PWMイ
ンバータ本体の出力電圧を検出する電圧検出回路
と、設定電圧と前記電圧検出回路により検出した
電圧型PWMインバータ本体の出力電圧との平均
誤差電圧をパルス幅変調用搬送波電圧の1周期毎
に検出して前記パルス幅変調用搬送波電圧の1周
期間保持する平均誤差電圧検出部と、この平均誤
差電圧検出部から出力される平均誤差電圧を前記
設定電圧に加算する加算器と、この加算器の出力
電圧を前記パルス幅変調用搬送波電圧でパルス幅
変調して前記電圧型PWMインバータ本体の複数
のスイツチング素子のオンオフ駆動用の矩形波信
号をそれぞれ出力するパルス幅変調部と、このパ
ルス幅変調部から出力される各矩形波信号の前縁
を所定時間遅らせて前記複数のスイツチング素子
に与えるデツドタイム発生部と、前記設定電圧の
符号反転を検出して前記平均誤差電圧検出部内の
積分器をリセツトするリセツト回路とを備えた電
圧型PWMインバータ装置。
A DC power supply, a voltage-type PWM inverter body supplied with power from the DC power supply, a voltage detection circuit that detects the output voltage of the voltage-type PWM inverter body, and a set voltage and the voltage-type PWM inverter body detected by the voltage detection circuit. an average error voltage detection unit that detects an average error voltage with respect to the output voltage for each cycle of the pulse width modulation carrier voltage and holds it for one cycle of the pulse width modulation carrier voltage; an adder that adds the output average error voltage to the set voltage; and an adder that pulse width modulates the output voltage of the adder with the pulse width modulation carrier voltage to turn on and off a plurality of switching elements of the voltage type PWM inverter main body. a pulse width modulation section that outputs each rectangular wave signal for driving; a dead time generation section that delays the leading edge of each rectangular wave signal output from the pulse width modulation section by a predetermined time and applies it to the plurality of switching elements; A voltage type PWM inverter device comprising: a reset circuit that detects a sign reversal of a set voltage and resets an integrator in the average error voltage detection section.
JP12778988U 1988-09-27 1988-09-27 Pending JPH0249386U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12778988U JPH0249386U (en) 1988-09-27 1988-09-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12778988U JPH0249386U (en) 1988-09-27 1988-09-27

Publications (1)

Publication Number Publication Date
JPH0249386U true JPH0249386U (en) 1990-04-05

Family

ID=31380533

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12778988U Pending JPH0249386U (en) 1988-09-27 1988-09-27

Country Status (1)

Country Link
JP (1) JPH0249386U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006166558A (en) * 2004-12-06 2006-06-22 Yanmar Co Ltd Method of controlling inverter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006166558A (en) * 2004-12-06 2006-06-22 Yanmar Co Ltd Method of controlling inverter
JP4611009B2 (en) * 2004-12-06 2011-01-12 ヤンマー株式会社 Inverter control method

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