JPS61189327U - - Google Patents
Info
- Publication number
- JPS61189327U JPS61189327U JP7112485U JP7112485U JPS61189327U JP S61189327 U JPS61189327 U JP S61189327U JP 7112485 U JP7112485 U JP 7112485U JP 7112485 U JP7112485 U JP 7112485U JP S61189327 U JPS61189327 U JP S61189327U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- computer system
- supply voltage
- clock
- generation circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Description
第１図は本考案によるコンピユータシステムの
一実施例を示すブロツク図、第２図は本考案によ
るコンピユータシステムを適用する動画倉庫装置
の概略構成を示す正面図、第３図は本考案のコン
ピユータシステムの動作を示すフローチヤート、
第４図は本考案のコンピユータシステムに適用さ
れるクロツク発生回路の第１実施例を示すブロツ
ク図、第５図は第４図のクロツク発生回路の各部
の信号波形図、第６図は本考案のコンピユータシ
ステムに適用されるクロツク発生回路の第２実施
例を示すブロツク図、第７図は第６図のクロツク
発生回路の各部の信号波形図である。
９……幅コンピユータシステム、２０……中央
処理ユニツト、２１……ＲＯＭ、２２……ＲＡＭ
、２４……インターフエイス回路、２５……バツ
テリ電源、２６……クロツク発生回路、３０〜３
２……インバータ回路。
FIG. 1 is a block diagram showing an embodiment of the computer system according to the present invention, FIG. 2 is a front view showing a schematic configuration of a video storage device to which the computer system according to the present invention is applied, and FIG. 3 is a computer system according to the present invention. A flowchart showing the operation of
FIG. 4 is a block diagram showing a first embodiment of the clock generation circuit applied to the computer system of the present invention, FIG. 5 is a signal waveform diagram of each part of the clock generation circuit of FIG. 4, and FIG. 6 is the clock generation circuit of the present invention. FIG. 7 is a block diagram showing a second embodiment of the clock generation circuit applied to the computer system of FIG. 9... Width computer system, 20... Central processing unit, 21... ROM, 22... RAM
, 24...Interface circuit, 25...Battery power supply, 26...Clock generation circuit, 30-3
2...Inverter circuit.
Claims (1)
ら上記電源電圧の供給を受けて動作するコンピユ
ータシステムにおいて、 上記電源電圧の変動に応動して周波数が変化す
るクロツク信号を発生するクロツク発生回路を具
えたことを特徴とするコンピユータシステム。[Claims for Utility Model Registration] In a computer system that operates by receiving the power supply voltage from a power supply whose power supply voltage fluctuates over time, a clock signal whose frequency changes in response to fluctuations in the power supply voltage. A computer system characterized by comprising a clock generation circuit that generates a clock.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7112485U JPS61189327U (en) | 1985-05-13 | 1985-05-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7112485U JPS61189327U (en) | 1985-05-13 | 1985-05-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61189327U true JPS61189327U (en) | 1986-11-26 |
Family
ID=30608334
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7112485U Pending JPS61189327U (en) | 1985-05-13 | 1985-05-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61189327U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06202763A (en) * | 1992-12-28 | 1994-07-22 | Matsushita Electric Ind Co Ltd | Computer system |
-
1985
- 1985-05-13 JP JP7112485U patent/JPS61189327U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06202763A (en) * | 1992-12-28 | 1994-07-22 | Matsushita Electric Ind Co Ltd | Computer system |
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