JPH0249239U - - Google Patents
Info
- Publication number
- JPH0249239U JPH0249239U JP12907088U JP12907088U JPH0249239U JP H0249239 U JPH0249239 U JP H0249239U JP 12907088 U JP12907088 U JP 12907088U JP 12907088 U JP12907088 U JP 12907088U JP H0249239 U JPH0249239 U JP H0249239U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- mixer
- signals
- circuits
- pass filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims description 3
- 230000003321 amplification Effects 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Superheterodyne Receivers (AREA)
- Noise Elimination (AREA)
Description
第１図は本考案に係るダブルスーパチユーナの
ブロツク図、第２図は第１図のＲＦ増幅回路と１
ｓｔミキサ回路間の具体的回路図、第３図は第２
図の１ｓｔＩＦトラツプの他の実施例を示す回路
図、及び第４図は同じく１ｓｔＩＦトラツプの更
に別の実施例を示す回路図である。
１……ＵＨＦ入力端子、２……ＶＨＦ入力端子
、３，４……ローパスフイルタ回路、５，６……
入力同調回路、７，８……ＲＦ増幅回路、９……
１ｓｔＩＦトラツプ、１０……１ｓｔミキサ回路
、１２……２ｎｄミキサ回路、１４……２ｎｄ局
部発振回路、１５……１ｓｔ局部発振回路。
Fig. 1 is a block diagram of the double supertuner according to the present invention, and Fig. 2 shows the RF amplifier circuit of Fig. 1 and the
The specific circuit diagram between the st mixer circuits, Figure 3 is the 2nd
FIG. 4 is a circuit diagram showing another embodiment of the 1st IF trap, and FIG. 4 is a circuit diagram showing still another embodiment of the 1st IF trap. 1...UHF input terminal, 2...VHF input terminal, 3, 4...Low pass filter circuit, 5, 6...
Input tuning circuit, 7, 8...RF amplifier circuit, 9...
1st IF trap, 10...1st mixer circuit, 12...2nd mixer circuit, 14...2nd local oscillation circuit, 15...1st local oscillation circuit.
Claims (1)
それぞれ帯域信号に対するローパスフイルタ回路
、入力同調回路及びＲＦ増幅回路と、両帯域信号
に共通の第１及び第２ミキサ回路、及び第１及び
第２局部発振回路とを具備するダブルスーパヘテ
ロダイン方式のチユーナにおいて、第１中間周波
妨害トラツプを前記ＲＦ増幅回路と第１ミキサ回
路間に挿入したことを特徴とするダブルスーパチ
ユーナ。 A low-pass filter circuit, an input tuning circuit, and an RF amplification circuit for each band signal, first and second mixer circuits common to both band signals, and first and second local circuits, respectively, which handle signals of different frequency bands from two input terminals. 1. A double superheterodyne tuner comprising an oscillation circuit, wherein a first intermediate frequency interference trap is inserted between the RF amplifier circuit and the first mixer circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12907088U JPH0249239U (en) | 1988-09-30 | 1988-09-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12907088U JPH0249239U (en) | 1988-09-30 | 1988-09-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0249239U true JPH0249239U (en) | 1990-04-05 |
Family
ID=31383004
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12907088U Pending JPH0249239U (en) | 1988-09-30 | 1988-09-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0249239U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5776935A (en) * | 1980-10-29 | 1982-05-14 | Matsushita Electric Ind Co Ltd | Tuner |
-
1988
- 1988-09-30 JP JP12907088U patent/JPH0249239U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5776935A (en) * | 1980-10-29 | 1982-05-14 | Matsushita Electric Ind Co Ltd | Tuner |
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