KR0128563Y1 - Signal dividing circuit of tuner for satellite broadcasting - Google Patents

Signal dividing circuit of tuner for satellite broadcasting Download PDF

Info

Publication number
KR0128563Y1
KR0128563Y1 KR2019950037809U KR19950037809U KR0128563Y1 KR 0128563 Y1 KR0128563 Y1 KR 0128563Y1 KR 2019950037809 U KR2019950037809 U KR 2019950037809U KR 19950037809 U KR19950037809 U KR 19950037809U KR 0128563 Y1 KR0128563 Y1 KR 0128563Y1
Authority
KR
South Korea
Prior art keywords
tuner
circuit
trap
circuits
parallel
Prior art date
Application number
KR2019950037809U
Other languages
Korean (ko)
Other versions
KR970047711U (en
Inventor
임중현
Original Assignee
이형도
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이형도, 삼성전기주식회사 filed Critical 이형도
Priority to KR2019950037809U priority Critical patent/KR0128563Y1/en
Publication of KR970047711U publication Critical patent/KR970047711U/en
Application granted granted Critical
Publication of KR0128563Y1 publication Critical patent/KR0128563Y1/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J3/00Continuous tuning
    • H03J3/24Continuous tuning of more than one resonant circuit simultaneously, the circuits being tuned to substantially the same frequency, e.g. for single-knob tuning
    • H03J3/26Continuous tuning of more than one resonant circuit simultaneously, the circuits being tuned to substantially the same frequency, e.g. for single-knob tuning the circuits being coupled so as to form a bandpass filter
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J5/00Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
    • H03J5/24Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with a number of separate pretuned tuning circuits or separate tuning elements selectively brought into circuit, e.g. for waveband selection or for television channel selection
    • H03J5/242Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with a number of separate pretuned tuning circuits or separate tuning elements selectively brought into circuit, e.g. for waveband selection or for television channel selection used exclusively for band selection
    • H03J5/244Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with a number of separate pretuned tuning circuits or separate tuning elements selectively brought into circuit, e.g. for waveband selection or for television channel selection used exclusively for band selection using electronic means
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/50Tuning indicators; Automatic tuning control
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/20Adaptations for transmission via a GHz frequency band, e.g. via satellite

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Astronomy & Astrophysics (AREA)
  • General Physics & Mathematics (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)

Abstract

본 고안은 위성방송용 튜너의 신호분배회로에 관한 것으로, 특히 위성방송용 튜너에서 일부 증폭부와 신호분배회로의 기능을 동시에 수행하도록 함으로써, 튜너의 내부회로를 간략화함과 동시에 생산비를 절감토록하는 위성방송용 튜너의 신호분배회로에 관한 것이다.The present invention relates to a signal distribution circuit of a satellite broadcasting tuner, and in particular, a satellite broadcasting tuner performs a function of some amplification unit and a signal distribution circuit simultaneously, thereby simplifying the internal circuit of the tuner and reducing production costs. It relates to a signal distribution circuit of a tuner.

종래의 튜너에서는 고주파신호의 이득편차를 줄이기 위해서 레벨평탄화회로부를 사용하는데, 상기 레벨평탄화회로부는 그 특성이 이득을 대략 10[dB]정도로 줄이면서 평탄화시키므로, 후단에 2차RF증폭부로 부가하여 손실된 이득을 보상하게 구성되어 있었는데, 본 고안에 의한 신호분배회로는 2개의 트랩회로로 단간동조를 취하게 하는 단간동조회로를 2개를 구성하여 복동조를 취하게 하여 종래의 두가지 기능을 동시에 수용할 수 있게 한 것이다.In a conventional tuner, a level flattening circuit part is used to reduce the gain deviation of a high frequency signal. The level flattening circuit part flattens the characteristic by reducing the gain to about 10 [dB], so that it is added to the second RF amplifying part at the rear end. The signal distribution circuit according to the present invention consists of two single-step tuning circuits that take a single step tuning with two trap circuits to take a double tuning, and simultaneously accommodates two conventional functions. It was made possible.

Description

위성방송용 튜너의 신호분배회로Signal Distribution Circuit of Satellite Tuner

제1도는 종래 위성방송용 튜너 내부블록도.1 is a block diagram of a conventional tuner for satellite broadcasting.

제2도는 본 고안에 따른 위성방송용 튜너 내부 신호분배회로도.2 is a signal distribution circuit diagram of a tuner for satellite broadcasting according to the present invention.

제3도 (a)는 종래 레벨평탄화회로부(20)에서 출력되는 주파수대역 파형도이고,3 (a) is a frequency band waveform diagram output from the conventional level flattening circuit unit 20,

(b)는 본 고안에 따른 신호분배회로부(25)에서 출력되는 주파수대역 파형도이다.(b) is a frequency band waveform diagram output from the signal distribution circuit section 25 according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 1차RF증폭기 20 : 레벨평탄화회로부10: primary RF amplifier 20: level leveling circuit

25,30 : 신호분배회로부 40 : 2차RF증폭기25,30: signal distribution circuit 40: secondary RF amplifier

50 : 가변필터 60 : 3차RF증폭기50: variable filter 60: third-order RF amplifier

본 고안은 위성방송용 튜너의 신호분배회로에 관한 것으로, 특히 위성방송용 튜너에서 일부 증폭부와 신호분배회로의 기능을 동시에 수행하도록 함으로써, 튜너의 내부회로를 간략화함과 동시에 생산비를 절감토록하는 위성방송용 튜너의 신호분배회로에 관한 것이다.The present invention relates to a signal distribution circuit of a satellite broadcasting tuner, and in particular, a satellite broadcasting tuner performs a function of some amplification unit and a signal distribution circuit simultaneously, thereby simplifying the internal circuit of the tuner and reducing production costs. It relates to a signal distribution circuit of a tuner.

일반적으로, 위성방송은 적도상공의 정지위성으로부터 전송되는 SHF대(SHF:Super High Frequency, 대략 10GHz대)의 초고주파신호는 파라폴라안테나에서 집속된다. 상기 집속된 초고주파는 파라폴라안테나에 설치된 저잡음 주파수변환기(LNB:Low Noise Block downconverter)에서 UHF대(UHF:Ultra High Frequency, 대략 1GGHz대)의 고주파신호로 변환되어 위성방송용 튜너로 입력된다.In general, satellite broadcasting is focused on a parapolar antenna of the ultra high frequency signal of the SHF band (SHF: super 10 frequency band) transmitted from the stationary satellite over the equator. The focused ultra-high frequency is converted into a high frequency signal of a UHF band (UHF: Ultra High Frequency, approximately 1GGHz band) by a low noise block downconverter (LNB) installed in a parapolar antenna and input to a satellite broadcasting tuner.

상기한 바와같은 종래의 위성방송용 튜너에 대한 내부블록도가 제1도에 도시되어 있으며, 제1도를 참조하면, 주파수변환기가 설치된 안테나로부터 유입되는 고주파신호는 1차RF증폭기(10)에서 증폭된 다음에 레벨평탄화회로부(equalizer circuit)(20)에서 이득레벨이 평탄화되어 신호분배회로부(30)에서 일부는 다음블록인 2차RF증폭기(40)로 분배되고 다른 일부는 VCR의 튜너로 분배되며, 상기 분배된 고주파신호는 2차RF증폭기(40)에서 2차로 증폭된 다음에 가변필터(50)를 거쳐서 3차RF증폭기(60)에서 3차로 증폭되어 믹서로 출력된다.An internal block diagram of a conventional satellite broadcast tuner as described above is shown in FIG. 1, and referring to FIG. 1, a high frequency signal introduced from an antenna provided with a frequency converter is amplified by the primary RF amplifier 10. After that, the gain level is flattened in the level equalizer circuit 20 so that a part of the signal distribution circuit 30 is distributed to the second RF amplifier 40, which is the next block, and the other is distributed to the tuner of the VCR. The distributed high frequency signal is amplified second by the secondary RF amplifier 40 and then amplified by the tertiary RF amplifier 60 through the variable filter 50 in the third order and output to the mixer.

이와같은 종래의 튜너에서는 고주파신호의 이득편차를 줄이기 위해서 레벨평탄화회로부를 사용하는데, 상기 레벨평탄화회로부는 그 특성이 이득을 대략 10[dB]정도로 줄이면서 평탄화시키므로, 후단에 2차RF증폭기로 부가하여 손실된 이득을 보상하고 있는 관계로, 소형화가 바람직한 튜너의 회로가 복잡하고 차지면적이 커지며, 이로 인하여 생산비가 상승하게 되는 등과 같이 여러 가지 문제점이 있었다.In the conventional tuner, a level flattening circuit part is used to reduce the gain deviation of the high frequency signal, and the level flattening circuit part is flattened by reducing its gain to about 10 [dB], so that a second RF amplifier is added to the rear stage. As a result of compensating for the lost gain, the circuit of the tuner, which requires miniaturization, is complicated and occupies a large area, resulting in increased production costs.

또한, 제3도(a)에 도시한 바와같이 종래 레벨평탄화회로부(20)에서 출력되는 주파수대역 파형을 보면, 신호대역의 로우측과 하이측간의 레벨차(D)가 심하여 복조부 이후의 신호처리에 문제를 초래되었다.In addition, as shown in FIG. 3 (a), when the frequency band waveform is output from the conventional level flattening circuit section 20, the level difference D between the low side and the high side of the signal band is so great that the signal after the demodulation section is increased. Problems with the treatment.

본 고안은 상기한 문제점을 해결하기 위해 안출한 것이다.The present invention is devised to solve the above problems.

따라서, 본 고안의 목적은 위성방송용 튜너에서 일부 증폭부와 신호분배회로의 기능을 동시에 수행하도록 함으로써, 튜너의 내부회로를 간략화함과 동시에 생산비를 절감토록하는 위성방송용 튜너의 신호분배회로를 제공하는데 있다.Accordingly, an object of the present invention is to provide a signal distribution circuit of a satellite broadcasting tuner to simplify the internal circuit of the tuner and to reduce the production cost by allowing the tuner for satellite broadcasting to simultaneously perform the functions of some amplifiers and the signal distribution circuit. have.

상기한 목적을 달성하기 위한 기술적인 수단으로써, 본 고안의 위성방송용 튜너의 신호분배회로는 주파수변환기가 설치된 안테나로부터 유입되는 고주파신호를 1차로 증폭하는 1차RF증폭부와, 분배되는 고주파신호를 가변적으로 대역통과시키는 가변필터 및 상기 대역통과된 고주파신호를 2차로 증폭하여 믹서로 출력하는 2차RF증폭부를 포함하는 위성방송용 튜너에 있어서, 상기 1차RF증폭부에서 출력되는 고주파신호에 대해서 하나의 트랩포인트를 형성하는 제1병렬트랩회로와, 상기 제1병렬트랩회로에 직렬로 다른 하나의 트랩포인트를 형성시켜서 가변필터에 접속되는 제2병렬트랩회로와, 상기 제1,2병렬트랩회로의 접속점에 접지로 구성된 코일로 이루어진 제1단간동조회로; 상기 제1단간동조회로와 병렬로 접속하고, 상기 1차RF증폭부에서 출력되는 고주파신호에 대해서 또 하나의 트랩포인트를 형성하는 제3병렬트랩회로와, 상기 제3병렬트랩회로에 직렬로 또 다른 하나의 트랩포인트를 형성시켜서 VTR의 튜너로 접속되는 제4병렬트랩회로와, 상기 제3,4병렬트랩회로간의 접속점에서 접지로 구성된 코일로 이루어진 제2단간동조회로; 상기 제1단간동조회로와 제2단간동조회로에 의해서 복동조를 이루도록 상기 출력단간을 접속한 결합소자를 구비함을 특징으로 한다.As a technical means for achieving the above object, the signal distribution circuit of the satellite broadcast tuner of the present invention is a primary RF amplifier for amplifying the high frequency signal flowing from the antenna installed frequency converter first, and the high frequency signal to be distributed A satellite broadcasting tuner comprising a variable filter for variably band-passing and a second RF amplifier for amplifying the band-passed high-frequency signal secondly and outputting the second-frequency amplifier to a mixer, wherein one of the high-frequency signals output from the first RF amplifier is provided. A first parallel trap circuit forming a trap point of the second parallel trap circuit; a second parallel trap circuit connected to the variable filter by forming another trap point in series with the first parallel trap circuit; and the first and second parallel trap circuits. A first inter-phase tuning circuit composed of a coil configured as a ground at a connection point of the; A third parallel trap circuit connected in parallel with the first inter-step tuning circuit and forming another trap point for the high frequency signal output from the primary RF amplifier, and in series with the third parallel trap circuit; A second parallel tuning circuit comprising a fourth parallel trap circuit which forms another trap point and is connected to a tuner of the VTR, and a coil composed of ground at a connection point between the third and fourth parallel trap circuits; And a coupling element connected between the output stages so as to perform double-tuning by the first inter-step tuning circuit and the second inter-step tuning circuit.

이하, 본 고안을 첨부한 돔년을 참조하여 설명한다.It will be described below with reference to the dome year to which the present invention is attached.

본 고안에 참조된 도면들에서 실질적으로 동일한 구성과 기능을 가진 구성요소들은 동일한 부호를 사용할 것이다.In the drawings referred to in the present invention, components having substantially the same configuration and function will use the same reference numerals.

제2도는 본 고안에 따른 위성방송용 튜너내부 신호분배회로도이다.2 is a signal distribution circuit diagram of a tuner for satellite broadcasting according to the present invention.

제2도를 참조하면, 본 고안의 위성방송용 튜너내부 신호분배회로는 주파수변환기가 설치된 안테나로부터 유입되는 고주파신호를 1차로 증폭하는 1차RF증폭부(10)와, 상기 1차증폭된 고주파신호를 트랩회로를 이용해서 복동조시켜서 일부는 다음블록인 가변필터(50)으로 분배하고, 다른 일부는 VTR튜너로 분배?티는 신호분배회로부(25)와, 상기 분배되는 고주파신호를 가변적으로 대역통과시키는 가변필터(50) 및 상기 대역통과된 고주파신호를 2차로 증폭하여 믹서(도시생략)로 출력하는 2차RF증폭부(60)로 구성한다.Referring to FIG. 2, the signal distribution circuit in the tuner for satellite broadcasting according to the present invention includes a primary RF amplifier 10 for amplifying a high frequency signal flowing from an antenna provided with a frequency converter first, and the first amplified high frequency signal. Is distributed to the variable filter 50, which is the next block, and the other part is distributed to the VTR tuner. It consists of a variable filter 50 to pass through and a secondary RF amplifier 60 for amplifying the band-passed high-frequency signal secondly and outputting it to a mixer (not shown).

상기 신호분배회로부(25)는 상기 1차RF증폭부(10)에서 출력되는 고주파신호에 대해서 하나의 트랩포인트를 형성하는 제1병렬트랩회로(C1,L1)와, 상기 제1병렬트랩회로(C1,L1)에 직렬로 다른 하나의 트랩포인트를 형성시켜서 가변필터(50)에 접속되는 제2병렬트랩회로(C2,L2)와, 상기 제1,2병렬트랩회로(C1,L1)(C2,L2)의 접속점에서 접지로 구성된 코일(L5)로 이루어진 제1단간동조회로; 상기 제1단간동조회로와 병렬로 접속하고, 상기 1차RF증폭부(10)에서 출력되는 고주파신호에 대해서 또 하나의 트랩포인트를 형성하는 제3병렬트랩회로(C3,L3)와, 상기 제3병렬트랩회로(C3,L3)에 직렬로 또 다른 하나의 트랩포인트를 형성시켜서 VTR의 튜너로 접속되는 제4병렬트랩회로(C4,L4)와, 상기 제3,4병렬트랩회로(C3,L3)(C4,L4)의 접속점에서 접지로 구성된 코일(L6)로 이루어진 제2단간동조회로; 상기 제1단간동조회로와 제2단간동조회로에 의해서 복동조를 이루도록 상기 출력단간을 접속한 저항소자(R1)를 구성한다.The signal distribution circuit section 25 includes first parallel trap circuits C1 and L1 for forming one trap point for the high frequency signal output from the primary RF amplifier 10, and the first parallel trap circuit (1). Second parallel trap circuits C2 and L2 connected to the variable filter 50 by forming another trap point in series with C1 and L1, and the first and second parallel trap circuits C1 and L1 and C2. A first stage interlocking circuit comprising a coil L5 configured as a ground at a connection point of L2; A third parallel trap circuit (C3, L3) connected in parallel with the first inter-step tuning circuit and forming another trap point for the high frequency signal output from the primary RF amplifier (10); Four parallel trap circuits C4 and L4 connected to the tuner of the VTR by forming another trap point in series with the three parallel trap circuits C3 and L3, and the third and fourth parallel trap circuits C3 and L3. A second inter-stage tuning circuit comprising a coil L6 configured of ground at a connection point of L3) (C4, L4); The resistor R1 is connected between the output stages so as to perform double tuning by the first inter-step tuning circuit and the second inter-step tuning circuit.

제3도(a)는 종래 레벨평탄화회로부(20)에서 출력되는 주파수대역 파형도이고, (b)는 본 고안에 따른 신호분배회로부(25)에서 출력되는 주파수대역 파형도이다.Figure 3 (a) is a frequency band waveform diagram output from the conventional level flattening circuit section 20, (b) is a frequency band waveform diagram output from the signal distribution circuit section 25 according to the present invention.

이하, 본 고안에 따른 작용 및 효과를 첨부도면에 의거하여 상세히 설명한다.Hereinafter, the action and effect according to the present invention will be described in detail based on the accompanying drawings.

종래의 튜너에서는 고주파신호의 이득편차를 줄이기 위해서 레벨평탄화회로부를 사용하는데, 상기 레벨평탄화회로부는 그 특성이 이득을 대략 10[dB]정도로 줄이면서 평탄화시키므로, 후단에 2차RF증폭부로 부가하여 손실된 이득을 보상하게 구성되어 있었는데, 본 고안에 의한 신호분배회로는 2개의 트랩회로로 단간동조를 취하게 하는 단간동조회로 2개를 구성하여 복동조를 취하게 하여 종래의 두가지 기능을 동시에 수용할 수 있게 한 것이다.In a conventional tuner, a level flattening circuit part is used to reduce the gain deviation of a high frequency signal. The level flattening circuit part flattens the characteristic by reducing the gain to about 10 [dB], so that it is added to the second RF amplifying part at the rear end. The signal distribution circuit according to the present invention consists of two single-step tuning circuits that take two step tunings with two trap circuits to take a double tuning and simultaneously accommodates two conventional functions. It was made possible.

제2도 및 제3도를 참조하여 보다 구체적으로 설명하면, 주파수변환기가 설치된 안테나로부터 유입되는 고주파신호를 1차RF증폭부(10)에서 1차로 증폭하고, 상기 1차 증폭된 고주파신호는 신호분배회로(25)에서 복동조되어서 일부는 다음 블록인 가변필터(50)로 분배되고, 다른 일부는 VTR 튜너로 분배된다.In more detail with reference to FIGS. 2 and 3, the first RF amplifier 10 amplifies a high frequency signal flowing from an antenna provided with a frequency converter in a first order, and the first amplified high frequency signal is a signal. Double-modulated in the distribution circuit 25, part of which is distributed to the next filter variable filter 50, and part of which is distributed to the VTR tuner.

상기 신호분배회로부(25)는 상기 1차RF증폭부(10)에서 출력되는 고주파신호에 대해서 제1병렬트랩회로(C1,L1)에서는 제3도(b)에 도시한 트랩포인트(T1)을 형성시키고, 제2병렬트랩회로(C2,L2)에서는 제3도(b)에 도시한 트랩포인트(T2)을 형성시켜서 제3도(b)의 A부분과 같은 파형으로 단간동조를 취하게 되고, 또한 제3병렬트랩회로(C3,L3)에서는 제3도(b)에 도시한 트랩포인트(T3)을 형성시키고, 제4병렬트랩회로(C4,L4)에서는 제3도(b)에 도시한 트랩포인트(T4)을 형성시켜서 제3도(b)에 도시한 B부분과 같은 파형으로 단간동조를 취하게 된다.The signal distribution circuit 25 receives the trap point T1 shown in FIG. 3 (b) in the first parallel trap circuit C1 and L1 with respect to the high frequency signal output from the primary RF amplifier 10. In the second parallel trap circuits C2 and L2, a trap point T2 shown in FIG. 3 (b) is formed to perform step tuning in the same waveform as part A of FIG. In addition, in the third parallel trap circuits C3 and L3, the trap point T3 shown in FIG. 3B is formed, and in the fourth parallel trap circuits C4 and L4, it is shown in FIG. 3B. One trap point T4 is formed to perform single step tuning with the same waveform as the portion B shown in FIG.

상기와 같이 각각의 단간동조된 파형은 저항(R1)에 의해서 파형이 결합되므로, 결국 본 고안의 신호분배회로(25)에 의해서 고주파신호가 큰 신호손실 없이 복동조가 취해지게 되는 것이다.As described above, since the waveforms are combined by the resistor R1, the single-tuned waveforms are double-tuned without high signal loss by the signal distribution circuit 25 of the present invention.

상술한 바와같은 본 고안은 위성방송용 튜너에서 일부 증폭부와 신호분배회로의 기능을 동시에 수행하도록 함으로써, 튜너의 내부회로를 간략화함과 동시에 생산비를 절감토록하는 특별한 효과가 있는 것이다.The present invention as described above has a special effect to simplify the internal circuit of the tuner and reduce the production cost by allowing the tuner for satellite broadcasting to perform the functions of some of the amplifier and the signal distribution circuit at the same time.

이상의 설명은 본 고안의 일실시예에 대한 설명에 불과하며, 본 고안은 그 구성의 범위내에서 다양한 변경 및 개조가 가능하다.The above description is only a description of an embodiment of the present invention, and the present invention is capable of various changes and modifications within the scope of its configuration.

Claims (1)

주파수변환기가 설치된 안테나로부터 유입되는 고주파신호를 1차로 증폭하는 1차RF증폭부(10)와, 분배되는 고주파신호를 가변적으로 대역통과시키는 가변필터(50) 및 상기 대역통과된 고주파신호를 2차로 증폭하여 믹서로 출력하는 2차RF증폭부(60)를 포함하는 위성방송용 튜너에 있어서, 상기 1차RF증폭부(10)에서 출력되는 고주파신호에 대해서 하나의 트랩포인트를 형성하는 제1병렬트랩회로(C1,L1)와, 상기 제1병렬트랩회로(C1,L1)에 직렬로 다른 하나의 트랩포인트를 형성시켜서 가변필터(50)에 접속되는 제2병렬트랩회로(C2,L2)와, 상기 제1,2병렬트랩회로(C1,L1)(C2,L2)의 접속점에 접지로 구성된 코일(L5)로 이루어진 제1단간동조회로; 상기 제1단간동조회로와 병렬로 접속하고, 상기 1차RF증폭부(10)에서 출력되는 고주파신호에 대해서 또 하나의 트랩포인트를 형성하는 제3병렬트랩회로(C3,L3)와, 상기 제3병렬트랩회로(C3,L3)에 직렬로 또 다른 하나의 트랩포인트를 형성시켜서 VTR의 튜너로 접속되는 제4병렬트랩회로(C4,L4)와, 상기 제3,4병렬트랩회로(C3,L3)(C4,L4)의 접속점에서 접지로 구성된 코일(L6)로 이루어진 제2단간동조회로; 상기 제1단간동조회로와 제2단간동조회로에 의해서 복동조를 이루도록 상기 출력단간을 접속한 결합소자(R1)를 구비함을 특징으로 위성방송용 튜너의 신호분배회로.The primary RF amplifier 10 amplifies the high frequency signal flowing from the antenna provided with the frequency converter first, the variable filter 50 for variably band-passing the high frequency signal to be distributed, and the band pass high frequency signal to the second A satellite broadcasting tuner including a secondary RF amplifier 60 for amplifying and outputting a mixer, the first parallel trap forming one trap point for a high frequency signal output from the primary RF amplifier 10. Second parallel trap circuits C2 and L2 connected to the variable filter 50 by forming another trap point in series with the circuits C1 and L1 and the first parallel trap circuits C1 and L1; A first inter-stage tuning circuit comprising a coil (L5) configured as a ground at a connection point of the first and second parallel trap circuits (C1, L1) (C2, L2); A third parallel trap circuit (C3, L3) connected in parallel with the first inter-step tuning circuit and forming another trap point for the high frequency signal output from the primary RF amplifier (10); Four parallel trap circuits C4 and L4 connected to the tuner of the VTR by forming another trap point in series with the three parallel trap circuits C3 and L3, and the third and fourth parallel trap circuits C3 and L3. A second inter-stage tuning circuit comprising a coil L6 configured of ground at a connection point of L3) (C4, L4); And a coupling element (R1) connected between the output stages so as to perform double-tuning by the first and second stage tuning circuits.
KR2019950037809U 1995-12-01 1995-12-01 Signal dividing circuit of tuner for satellite broadcasting KR0128563Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019950037809U KR0128563Y1 (en) 1995-12-01 1995-12-01 Signal dividing circuit of tuner for satellite broadcasting

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019950037809U KR0128563Y1 (en) 1995-12-01 1995-12-01 Signal dividing circuit of tuner for satellite broadcasting

Publications (2)

Publication Number Publication Date
KR970047711U KR970047711U (en) 1997-07-31
KR0128563Y1 true KR0128563Y1 (en) 1999-03-20

Family

ID=19431739

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019950037809U KR0128563Y1 (en) 1995-12-01 1995-12-01 Signal dividing circuit of tuner for satellite broadcasting

Country Status (1)

Country Link
KR (1) KR0128563Y1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100560000B1 (en) * 2004-07-15 2006-03-13 세리플랫폼 주식회사 circuits of tuner for satellite broadcasting

Also Published As

Publication number Publication date
KR970047711U (en) 1997-07-31

Similar Documents

Publication Publication Date Title
JPH09162766A (en) Satellite broadcasting reception tuner
KR0128563Y1 (en) Signal dividing circuit of tuner for satellite broadcasting
US4491809A (en) Matching circuit for a pre-amplifier of SHF band television signal receiver
US6734761B2 (en) Radio-frequency input stage
JPS6214122B2 (en)
JP3476663B2 (en) Signal selection circuit
JP2993001B2 (en) UHF tuner and its equipment
KR20070052422A (en) Radio frequency receiver
KR20020030379A (en) Double conversion type tuner for using trap circuit
KR890004653Y1 (en) Midium frequency circuits for catv tuner
JPH087705Y2 (en) IF interference signal suppression circuit for high frequency receiver
KR100337081B1 (en) Wide band filter of digital tuner
JPH0964769A (en) Tuner for television
KR960008159Y1 (en) Band width switching circuit for receiving tuner
KR200218578Y1 (en) Uninterrupted Circuit of TV Tuner
JPH0349471Y2 (en)
KR900006075Y1 (en) I.f. amplifier using tuner's double tuning
JPS62283721A (en) All band tuner
KR100337082B1 (en) Wide band filter of digital tuner
JP3107503B2 (en) Double superheterodyne AM radio receiver
KR19990003858U (en) Double conversion tuner
KR200147285Y1 (en) Combination capacitor patterning structure of a television tuner
KR950012950B1 (en) Stabilization circuit of input signal for ic tunor
JPH0336126Y2 (en)
JPH098679A (en) High-frequency input circuit device

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20010718

Year of fee payment: 4

LAPS Lapse due to unpaid annual fee