JPH0246759A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPH0246759A JPH0246759A JP19833288A JP19833288A JPH0246759A JP H0246759 A JPH0246759 A JP H0246759A JP 19833288 A JP19833288 A JP 19833288A JP 19833288 A JP19833288 A JP 19833288A JP H0246759 A JPH0246759 A JP H0246759A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- circuit
- power supply
- control
- battery backup
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 238000004806 packaging method and process Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
Landscapes
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Semiconductor Integrated Circuits (AREA)
- Electronic Switches (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体集積回路に関し、特にデコード回路、ラ
ッチ回路、クロスポイントスイッチ回路、制御回路とで
回路を構成した交換回路切換え等に使用される半導体集
積回路に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor integrated circuit, and is particularly used for switching switching circuits configured with a decoding circuit, a latch circuit, a cross-point switch circuit, a control circuit, etc. Regarding semiconductor integrated circuits.
従来、この種の半導体集積回路は、デコード回路、ラッ
チ回路、クロスポイントスイッチ回路。Conventionally, this type of semiconductor integrated circuit has been used for decoding circuits, latch circuits, and crosspoint switch circuits.
制御回路とで回路を構成し、共通電源端子およびバッテ
リーバックアップ電源端子の2系統の電源端子を持った
半導体集積回路がなかっな。There is no semiconductor integrated circuit that forms a circuit with a control circuit and has two systems of power supply terminals: a common power supply terminal and a battery backup power supply terminal.
上述した従来の半導体集積回路は、クロスポイントスイ
ッチ回路の自己保持用バッテリーバックアップ端子がな
かったなめに、クロスポイントスッチ回路の接続状態を
自己保持するためには、デコード回路、ラッチ回路、ク
ロスポイントスイッチ回路、制御回路の全ての回路に対
しバッテリー等でDC電源を供給しなければならなかっ
たなめに、高消費電力を要していた。The conventional semiconductor integrated circuit described above did not have a battery backup terminal for self-maintenance of the cross-point switch circuit, but in order to self-maintain the connection state of the cross-point switch circuit, it required a decoding circuit, a latch circuit, and a cross-point switch circuit. Since DC power had to be supplied to all the circuits and control circuits using batteries, etc., high power consumption was required.
本発明の半導体の集積回路の構成は、デコード回路、ラ
ッチ回路、クロスポイントスイッチ回路、制御回路とで
回路を構成し、共通電源端子およびバッテリーバックア
ップ電源端子の2系統の電源端子を設けて同一パッケー
ジ化することにより、低消費電力により前記クロスポイ
ントスイッチ回路の接続状態を自己保持出来る様にした
事を特徴とする。The structure of the semiconductor integrated circuit of the present invention includes a decoding circuit, a latch circuit, a cross-point switch circuit, and a control circuit, and has two systems of power terminals, a common power terminal and a battery backup power terminal, and is packaged in the same package. The cross-point switch circuit is characterized in that the connection state of the cross-point switch circuit can be maintained by itself with low power consumption.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の半導体集積回路のブロック
図であり、1はデコード回路、2はラッチ回路、3はク
ロスポイントスイッチ回路、4は制御回路、5は共通電
源(VCC)ライン、6はバッテリーバックアップ電源
(WBC) ライン、7はアドレスラインAO〜Ax、
8はストロウブライン(So)、9はデータR/Wライ
ン(R/W)、10はリセットライン(R3T)、11
はステータスデータライン(SdO〜5dx)、12〜
14は制御ライン、15はLINE系インタフェースラ
イン(■10〜l1x)、16はHO3T系インタフェ
ースライン(IhO〜IhX)を示す。FIG. 1 is a block diagram of a semiconductor integrated circuit according to an embodiment of the present invention, in which 1 is a decoding circuit, 2 is a latch circuit, 3 is a cross-point switch circuit, 4 is a control circuit, and 5 is a common power supply (VCC) line. , 6 is a battery backup power supply (WBC) line, 7 is an address line AO to Ax,
8 is a strobe line (So), 9 is a data R/W line (R/W), 10 is a reset line (R3T), 11
is the status data line (SdO~5dx), 12~
14 is a control line, 15 is a LINE system interface line (10 to l1x), and 16 is a HO3T system interface line (IhO to IhX).
本実施例の半導体集積回路の使用装置の稼働時には、共
通電源端子5にVCCを、又、バッテリにバックアップ
電源端子6にVBCを供給して使用すし、使用装置の非
稼働時には、バッテリバックアップで電源端子6のみに
VBCを供給して、クロスポイントスイッチの接続状態
を自己保持する。When the device using the semiconductor integrated circuit of this embodiment is in operation, VCC is supplied to the common power supply terminal 5, and VBC is supplied to the battery backup power terminal 6. When the device is not in operation, the battery backup is used for power supply. VBC is supplied only to terminal 6 to maintain the connection state of the crosspoint switch.
クロスポイントスイッチ回路3の接続制御は、アドレス
端子(A o〜Ax)7、ストロラブ端子(So)8、
データR/W端子(R/W)9(7)制御にて行う。Connection control of the cross point switch circuit 3 is performed using address terminals (A o to Ax) 7, stroke love terminals (So) 8,
This is done under data R/W terminal (R/W) 9 (7) control.
クロスポイントスイッチ回路3の接続状態のリードは、
アドレス端子(A a −、−A x ) 7 、スト
ロラブ端子(So)8、データR/W端子(R/W)9
、ステータスデータ端子(SdO〜5dX)11の制御
にて行う。The connected leads of cross point switch circuit 3 are as follows:
Address terminals (A a -, -A x ) 7, Strolab terminal (So) 8, Data R/W terminal (R/W) 9
, is controlled by the status data terminals (SdO to 5dX) 11.
クロスポイントスイッチ回路の一括リセットは、リセッ
ト端子(R9T)10の制御にて行う。The collective reset of the cross-point switch circuits is performed under the control of the reset terminal (R9T) 10.
又、実施例の半導体集積回路の非稼働(VBCのみ供給
)から稼働(VCC,VBC供給)時には、ラッチ回路
2で自己保持されている接続状態に自動的にクロスポイ
ントスイッチ回路を接続する。Further, when the semiconductor integrated circuit of the embodiment changes from non-operating (only VBC is supplied) to operating (VCC, VBC is supplied), the cross-point switch circuit is automatically connected to the connection state that is self-maintained by the latch circuit 2.
以上説明した様に本発明は、デコード回路、ラッチ回路
、クロスポイントスイッチ回路とで回路を構成し、共通
電源端子およびバッテリーバックアップ電源端子の2系
統の電源端子を設けることにより、低消費電力により、
クロスポイントスイッチ回路の接続状態を自己保持出来
る効果がある。As explained above, the present invention comprises a circuit including a decoding circuit, a latch circuit, and a cross-point switch circuit, and provides two systems of power supply terminals, a common power supply terminal and a battery backup power supply terminal, thereby achieving low power consumption.
This has the effect of self-maintaining the connection state of the crosspoint switch circuit.
ライン(R/W) 、10・・・・・・リセットライン
(R3T)、11・・・・・・ステータスデータライン
、12〜14・・・・・・制御ライン、15・・・・・
・LINE系インタフェースライン(I io 〜I
ix)、16・・・・・・HO3T系インタフェースラ
イン(Iho〜I hx)。Line (R/W), 10...Reset line (R3T), 11...Status data line, 12-14...Control line, 15...
・LINE interface line (I io ~ I
ix), 16...HO3T system interface line (Iho to Ihx).
Claims (1)
路、制御回路とで回路を構成し、共通電源端子およびバ
ッテリーバックアップ電源端子の2系統の電源端子を設
けて同一パッケージ化することにより、低消費電力によ
り前記クロスポイントスイッチ回路の接続状態を自己保
持出来る様にした事を特徴とする半導体集積回路。The circuit consists of a decoding circuit, a latch circuit, a crosspoint switch circuit, and a control circuit, and by providing two systems of power supply terminals, a common power supply terminal and a battery backup power supply terminal, and packaging them in the same package, the cross-point switch circuit can reduce power consumption. A semiconductor integrated circuit characterized by being able to self-maintain the connection state of a point switch circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19833288A JPH0246759A (en) | 1988-08-08 | 1988-08-08 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19833288A JPH0246759A (en) | 1988-08-08 | 1988-08-08 | Semiconductor integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0246759A true JPH0246759A (en) | 1990-02-16 |
Family
ID=16389351
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19833288A Pending JPH0246759A (en) | 1988-08-08 | 1988-08-08 | Semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0246759A (en) |
-
1988
- 1988-08-08 JP JP19833288A patent/JPH0246759A/en active Pending
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