JPH0246264U - - Google Patents

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Publication number
JPH0246264U
JPH0246264U JP12365588U JP12365588U JPH0246264U JP H0246264 U JPH0246264 U JP H0246264U JP 12365588 U JP12365588 U JP 12365588U JP 12365588 U JP12365588 U JP 12365588U JP H0246264 U JPH0246264 U JP H0246264U
Authority
JP
Japan
Prior art keywords
output
circuit
target
subtracter
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12365588U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12365588U priority Critical patent/JPH0246264U/ja
Publication of JPH0246264U publication Critical patent/JPH0246264U/ja
Pending legal-status Critical Current

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  • Image Processing (AREA)
  • Closed-Circuit Television Systems (AREA)
  • Image Analysis (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案による微小目標検出装置の一
実施例の構成図、第2図は中心画素Tの5×5近
傍領域を示す図、第3図はこの考案による微小目
標検出装置の出力例を示す図、第4図は従来の微
小目標検出装置の構成図、第5図はラプラシアン
オペレータの説明図、第6図は従来の微小目標検
出装置の出力例を示す図である。 図において、1はラインメモリ、2は近傍処理
回路、3は2値化回路、5は中心画素Tの3×3
近傍領域、6はラプラシアンの重み関数、7は4
段ラインメモリ、8はレジスタ、9は減算器、1
0は比較器、11は対象物判定回路である。なお
、各図中同一符号は同一または相当部分を示す。
Fig. 1 is a block diagram of an embodiment of the micro target detection device according to this invention, Fig. 2 is a diagram showing a 5×5 neighborhood area of the central pixel T, and Fig. 3 is an example of the output of the micro target detection device according to this invention. 4 is a configuration diagram of a conventional minute target detection device, FIG. 5 is an explanatory diagram of a Laplacian operator, and FIG. 6 is a diagram showing an example of output of the conventional minute target detection device. In the figure, 1 is a line memory, 2 is a neighborhood processing circuit, 3 is a binarization circuit, and 5 is a 3×3 central pixel T.
Neighborhood area, 6 is Laplacian weight function, 7 is 4
Stage line memory, 8 is a register, 9 is a subtracter, 1
0 is a comparator, and 11 is an object determination circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 画像データを記憶するメモリ回路と、上記メモ
リ回路の出力を受けて画素間の濃度差を演算する
減算器と、上記減算器の出力と予め設定したしき
い値とを比較する比較器と、上記比較器の出力に
基づき対象物か否かを判定する対象物判定回路と
、上記対象物判定回路の出力から目標の位置を検
出する位置検出回路とを備えたことを特徴とする
微小目標検出装置。
a memory circuit that stores image data; a subtracter that receives the output of the memory circuit and calculates a density difference between pixels; a comparator that compares the output of the subtracter with a preset threshold; A micro target detection device comprising: an object determination circuit that determines whether or not it is a target object based on the output of a comparator; and a position detection circuit that detects the position of the target from the output of the object determination circuit. .
JP12365588U 1988-09-21 1988-09-21 Pending JPH0246264U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12365588U JPH0246264U (en) 1988-09-21 1988-09-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12365588U JPH0246264U (en) 1988-09-21 1988-09-21

Publications (1)

Publication Number Publication Date
JPH0246264U true JPH0246264U (en) 1990-03-29

Family

ID=31372703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12365588U Pending JPH0246264U (en) 1988-09-21 1988-09-21

Country Status (1)

Country Link
JP (1) JPH0246264U (en)

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