JPH0245987A - Semiconductor laser device - Google Patents

Semiconductor laser device

Info

Publication number
JPH0245987A
JPH0245987A JP19685288A JP19685288A JPH0245987A JP H0245987 A JPH0245987 A JP H0245987A JP 19685288 A JP19685288 A JP 19685288A JP 19685288 A JP19685288 A JP 19685288A JP H0245987 A JPH0245987 A JP H0245987A
Authority
JP
Japan
Prior art keywords
insulating film
electrode
contact
laser chip
semiconductor laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19685288A
Other languages
Japanese (ja)
Inventor
Hitoshi Watanabe
渡辺 斉
Yuji Okura
大倉 裕二
Masatoshi Fujiwara
正敏 藤原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP19685288A priority Critical patent/JPH0245987A/en
Publication of JPH0245987A publication Critical patent/JPH0245987A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching
    • H01S5/2277Buried mesa structure ; Striped active layer mesa created by etching double channel planar buried heterostructure [DCPBH] laser

Abstract

PURPOSE:To reduce capacity without applying a stress to a laser chip by laminating an insulating film and an electrode alternately in multilayer structure on an upper surface of the laser chip excepting an area whereon a contact is formed and by forming an electrode which is in contact with a contact surface in insulation from other electrodes. CONSTITUTION:A first insulating film 3 is formed on a surface of a laser chip 1 which is provided with a mesa by the side of an active layer 2 excepting an area whereon a contact is formed, and a first insulating film 3 is formed thereon. Then a second insulating film 5 is formed on a surface excepting the area whereon the contact is formed without exposing the first electrode 4. Lastly, a second electrode 6 is formed all over the upper surface to acquire multilayer structure. In this MIS structure, the first electrode 4 is inserted between the first insulating film 3 and the second insulating film 6; therefore, capacity is connected in series. Capacity of the two-layer MIS structure can be reduced in this way.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、半導体レーザ装置に係り、特にレーザチッ
プのストレスを除去した絶縁膜と電極との多層構造に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a semiconductor laser device, and particularly to a multilayer structure of an insulating film and an electrode that eliminates stress from a laser chip.

(従来の技術) 第3図は従来の半導体レーザ装置のレーザチップの断面
図で、活性層の両脇にメサが形成された構造における絶
縁膜と電極の構造の一例である。
(Prior Art) FIG. 3 is a cross-sectional view of a laser chip of a conventional semiconductor laser device, showing an example of the structure of an insulating film and electrodes in a structure in which mesas are formed on both sides of an active layer.

この図で、1はレーザチップ、2は活性層、3は絶縁膜
、4は電極、7はブロック層である。この半導体レーザ
装置は、レーザチップ1の活性層2の両脇にメサを形成
した後、バターニングによりコンタクトを形成する面以
外に絶縁膜3を形成し、さらに、コンタクトを形成する
面を含む全面に電極4を形成したものである。
In this figure, 1 is a laser chip, 2 is an active layer, 3 is an insulating film, 4 is an electrode, and 7 is a block layer. In this semiconductor laser device, after mesas are formed on both sides of an active layer 2 of a laser chip 1, an insulating film 3 is formed on the surface other than the surface where the contact is to be formed by patterning, and then the entire surface including the surface where the contact is to be formed is formed. An electrode 4 is formed on the surface.

次に動作について説明する。Next, the operation will be explained.

この構造では、活性層2の両脇にメサが形成されている
ためメサの内側のみに電流が流れ、メサの外側とは電気
的に分離される。したがって、メサの外側に直流電流が
流れることはない。一方、高周波変調を行った場合には
、メサの内側では比較的容量の大きなpnpn構造によ
るブロック層7を介して電流が流れ、メサの外側では比
較的容量の小さなレーザチップ1表面、絶縁膜3.電極
4とからなるMIS構造を介して電流が流れる。
In this structure, since mesas are formed on both sides of the active layer 2, current flows only inside the mesa and is electrically isolated from the outside of the mesa. Therefore, no direct current flows outside the mesa. On the other hand, when high frequency modulation is performed, a current flows inside the mesa through the block layer 7 having a relatively large capacitance and has a pnpn structure, and outside the mesa, a current flows through the surface of the laser chip 1 and the insulating film 3, which have a relatively small capacitance. .. A current flows through the MIS structure consisting of the electrode 4.

したがって、メサを形成することによりレーザチップ1
の容量は、面積の大部分を占める比較的容量の小さなM
IS構造に依存するため、全体の容量を低減化できる。
Therefore, by forming the mesa, the laser chip 1
The capacity of M is relatively small and occupies most of the area.
Since it depends on the IS structure, the overall capacity can be reduced.

さらに、絶縁膜3の膜厚を厚くすることにより、容量の
低減化が可能となる。
Furthermore, by increasing the thickness of the insulating film 3, the capacitance can be reduced.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、上記のような従来の半導体レーザ装置の
容量の低減化には、第3図の絶縁膜3はできる限り厚く
する方が良いが、絶縁膜3を厚くし過ぎると絶縁膜3の
応力が活性層2を含むレーザチップ1にストレスを与え
、レーザの寿命に悪影響を与えるという問題点があった
However, in order to reduce the capacitance of the conventional semiconductor laser device as described above, it is better to make the insulating film 3 in FIG. There is a problem in that stress is applied to the laser chip 1 including the active layer 2, which adversely affects the life of the laser.

この発明は、上記のような問題点を解決するためになさ
れたもので、レーザチップにストレスを与えることなく
、容量を低減化することができる半導体レーザ装置を得
ることを目的とする。
The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a semiconductor laser device whose capacity can be reduced without applying stress to the laser chip.

(課題を解決するための手段) この発明に係る半導体レーザ装置は、コンタクトを形成
する面以外のレーザチップの上面に絶縁膜と電極を交互
に多層構造に積層するとともに、コンタクト面と接触す
る電極を他の電極と絶縁して形成したものである。
(Means for Solving the Problems) A semiconductor laser device according to the present invention has an insulating film and an electrode laminated alternately in a multilayer structure on the upper surface of the laser chip other than the surface on which the contact is formed, and an electrode that is in contact with the contact surface. The electrode is insulated from other electrodes.

〔作用〕[Effect]

この発明における多層構造に積層した絶縁膜と電極はそ
れぞれが容量の役割をなし、それらが直列に接続された
ものになっている。したがって、全体として容量を低減
化でき、しかも各絶縁膜の応力は比較的柔らかな電極で
緩和されるため、レーザチップにストレスを与えること
がない。
In this invention, the insulating films and electrodes laminated in a multilayer structure each serve as a capacitor, and are connected in series. Therefore, the capacitance can be reduced as a whole, and the stress in each insulating film is alleviated by the relatively soft electrodes, so no stress is applied to the laser chip.

〔実施例〕〔Example〕

以下、この発明の一実施例を図面について説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図はこの発明の半導体レーザ装置の一実施例を示す
断面図である。この図で、第3図と同一符号は同一構成
部分を示すが、ここでは絶縁膜3を第1の絶縁膜といい
、電極4を第1の電極という。5は前記第1の電極4上
に形成された第2の絶縁膜、6は前記第2の絶縁膜5上
に形成された第2の電極である。
FIG. 1 is a sectional view showing an embodiment of a semiconductor laser device of the present invention. In this figure, the same reference numerals as in FIG. 3 indicate the same constituent parts, but here the insulating film 3 is referred to as a first insulating film, and the electrode 4 is referred to as a first electrode. 5 is a second insulating film formed on the first electrode 4, and 6 is a second electrode formed on the second insulating film 5.

次に、この発明の製造プロセスを第2図(a)〜(C)
について説明する。
Next, the manufacturing process of this invention is shown in FIGS. 2(a) to (C).
I will explain about it.

まず、第2図(a)において、活性層2の脇にメサを形
成したレーザチップ1の表面上に、第2図(b)に示す
ように、バターニングによりコンタクトを形成する面以
外に第1の絶縁膜3とその上面に第1の電極4を形成す
る。次に、第2図(C)に示すように、バターニングに
よりコンタクトを形成する面以外に第1の電極4が露出
しないようにして第2の絶縁膜5を形成する。最後に、
上面全面に第2の電極6を形成し、第1図のような多層
構造を得る。
First, in FIG. 2(a), on the surface of the laser chip 1 with a mesa formed on the side of the active layer 2, as shown in FIG. A first insulating film 3 and a first electrode 4 are formed on its upper surface. Next, as shown in FIG. 2C, the second insulating film 5 is formed by patterning so that the first electrode 4 is not exposed on any surface other than the surface where the contact is to be formed. lastly,
A second electrode 6 is formed on the entire upper surface to obtain a multilayer structure as shown in FIG.

次に動作について説明する。Next, the operation will be explained.

この構造では、活性層2の両脇にメサが形成されている
ために、メサの内側のみに電流が流れ、メサの外側とは
電気的に分離される。したがって、メサの外側に直流電
流が流れることはない。
In this structure, since mesas are formed on both sides of the active layer 2, current flows only inside the mesa and is electrically isolated from the outside of the mesa. Therefore, no direct current flows outside the mesa.

一方、高周波変調を行った場合には、メサの内側では比
較的容量の大きなpnpn構造によるブロック層7を介
して電流が流れ、メサの外側ではレーザチップ1表面、
第1の絶縁膜3.第1の電極4、第2の絶縁膜5および
第2の電極6とからなる2層のMIS構造を介して電流
が流れる。このMIS構造では第1の電極4を第1の絶
縁膜3と第2の絶縁膜6との間に挿入することにより、
容量を直列に接続した構造となっている。したがつて、
この2層のMIS構造の容量が低減化され、しかも、こ
の2層のMIS構造の領域はレーザチップ1の上面の面
積の大部分を占めるため、全体の容量が低減化される。
On the other hand, when high frequency modulation is performed, a current flows inside the mesa through the blocking layer 7 having a relatively large capacity pnpn structure, and outside the mesa, the current flows through the surface of the laser chip 1,
First insulating film 3. A current flows through a two-layer MIS structure consisting of a first electrode 4, a second insulating film 5, and a second electrode 6. In this MIS structure, by inserting the first electrode 4 between the first insulating film 3 and the second insulating film 6,
It has a structure in which capacitors are connected in series. Therefore,
The capacitance of the two-layer MIS structure is reduced, and since the region of the two-layer MIS structure occupies most of the area of the upper surface of the laser chip 1, the overall capacitance is reduced.

〔発明の効果〕〔Effect of the invention〕

以上説明したようにこの発明は、コンタクトを形成する
面以外のレーザチップの上面に絶縁膜と電極を交互に多
層構造に積層するとともに、コンタクト面と接触する電
極を他の電極と絶縁して形成したので、半導体レーザ装
誼の容量を低減化できるとともに、絶縁膜の応力による
ストレスをレーザチップに与えることがなくなり、長寿
命の半導体レーザ装置を得ることができる。
As explained above, the present invention involves laminating insulating films and electrodes alternately in a multilayer structure on the top surface of a laser chip other than the surface on which contacts are formed, and forming electrodes that are in contact with the contact surface insulated from other electrodes. Therefore, the capacitance of the semiconductor laser device can be reduced, and stress due to the stress of the insulating film is not applied to the laser chip, so that a semiconductor laser device with a long life can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例による半導体レーザ装置を
示す断面図、第2図はこの発明の半導体レーザ装置の製
造プロセスを示す断面図、第3図は従来の半導体レーザ
装置を示す断面図である。 図において、1はレーザチップ、2は活性層、3は第1
の絶縁膜、4は第1の電極、5は第2の絶縁膜、 6は第2の電極、 7はブロック層であ る。 なお、 各図中の同一符号は同一または相当部分を示す。
FIG. 1 is a cross-sectional view showing a semiconductor laser device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view showing the manufacturing process of the semiconductor laser device of the present invention, and FIG. 3 is a cross-sectional view showing a conventional semiconductor laser device. It is. In the figure, 1 is a laser chip, 2 is an active layer, and 3 is a first laser chip.
4 is a first electrode, 5 is a second insulating film, 6 is a second electrode, and 7 is a block layer. Note that the same reference numerals in each figure indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] メサ型のレーザチップのコンタクトを形成する面以外の
上面に、絶縁膜と電極を交互に多層構造に積層するとと
もに、コンタクト面と接触する電極を他の電極と絶縁し
て形成したことを特徴とする半導体レーザ装置。
The feature is that an insulating film and an electrode are alternately laminated in a multilayer structure on the upper surface of a mesa-type laser chip other than the surface on which the contact is formed, and the electrode in contact with the contact surface is insulated from other electrodes. Semiconductor laser equipment.
JP19685288A 1988-08-06 1988-08-06 Semiconductor laser device Pending JPH0245987A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19685288A JPH0245987A (en) 1988-08-06 1988-08-06 Semiconductor laser device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19685288A JPH0245987A (en) 1988-08-06 1988-08-06 Semiconductor laser device

Publications (1)

Publication Number Publication Date
JPH0245987A true JPH0245987A (en) 1990-02-15

Family

ID=16364730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19685288A Pending JPH0245987A (en) 1988-08-06 1988-08-06 Semiconductor laser device

Country Status (1)

Country Link
JP (1) JPH0245987A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04223387A (en) * 1990-12-25 1992-08-13 Matsushita Electron Corp Semiconductor light emitting element and manufacture thereof
JP2006324427A (en) * 2005-05-18 2006-11-30 Mitsubishi Electric Corp Semiconductor laser

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04223387A (en) * 1990-12-25 1992-08-13 Matsushita Electron Corp Semiconductor light emitting element and manufacture thereof
JP2006324427A (en) * 2005-05-18 2006-11-30 Mitsubishi Electric Corp Semiconductor laser

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