JPH0245906Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION BACKGROUND OF THE INVENTION The present invention relates to a television receiver that reliably clamps an external video signal to a zero level during horizontal and vertical retrace periods.

2. Description of the Related Art In general, external primary color video signals supplied from an external device such as a personal computer to a television receiver are often binary logic signals having a peak value of about 0 to 5 volts. For this reason, it is necessary to prevent the image brightness from changing when switching the connection of the television receiver from the normal broadcast signal receiving state to a personal computer, etc. For example, it is necessary to adjust the signal level of the external primary color video signal. Possible countermeasures include connecting a level control circuit for this purpose to an input circuit for external primary color video signals.

The television receiver 1 shown in FIG.
An input circuit 2 consisting of oven collector type AND gate circuits 2r, 2g, 2b corresponding to each primary color video signal is connected via a level control circuit 3.
It is connected to the RGB switching interface circuit 4. The RGB switching interface circuit 4 selectively supplies either the primary color video signal that the video chroma circuit 5 separates and generates from the composite video signal or the external primary color video signal from the input circuit 2 to the video output circuit 6. The video signal passing through the video output circuit 6 is supplied directly to the picture tube 7 regardless of the video source.

By the way, the level control circuit 3 connects a π-type connection circuit of resistors R ₁ , R ₂ , R ₃ to the respective output terminals of each AND gate circuit 2r, 2g, 2b, and connects the resistor R ₃ to the power supply circuit 3a. It is connected and configured. The power supply circuit 3a has a transistor _Q0 whose collector is connected to the power supply V _CC1 , and an electrolytic capacitor _C0 for a filter is connected to the emitter of this transistor _Q0 , and the power supply voltage supplied to the resistor _R3 is connected to the emitter of the transistor Q0. It has stabilized. Well, transistor
The base of Q ₀ is connected to the power supply V _CC1 via a variable resistor R _V. Here, each external primary color video signal seen at the output terminal of the level control circuit 3 has _a black level of
R ₂ /R ₂ +R ₃ E ₀ , and the white level is R ₁ +R ₂ /R ₁ +R ₂ +R ₃ E ₀
It has a waveform as shown below.

Therefore, by changing the resistance value of the variable resistor R _V , which is the base resistance of the transistor Q ₀ , and changing the output voltage E ₀ , it is possible to change both the white level and the black level, which are related to the brightness of the image. . What is more important is that the black level of the external primary color video signal supplied to the video output circuit 6 via the RGB switching interface circuit 4 is not zero volts, but a DC voltage of R ₂ /R ₂ +R ₃ E _0. By including a bias signal, the video output transistor in the video output circuit 6 can be operated in the active region at all times, and the waveform of the cathode current of the picture tube 7 can be prevented from slowing down. This is accompanied by the effect that a sharp image can be obtained.

As described above, the television receiver 1 having the above configuration has advantages such as being able to adjust the image brightness using an external primary color video signal and improving the operating characteristics of the video output circuit 6. As a countermeasure against erasure, as shown in the figure, a transistor is connected to the gate signal input terminal of each AND gate circuit 2r, 2g, 2b of the input circuit 2, which is made conductive by the blanking pulse output from the blanking circuit 8.
Assume that the configuration is such that the respective outputs are set to a low level by connecting Q ₁ and opening the AND gate circuits 2r, 2g, and 2b during the horizontal and vertical retrace periods. In this case, even if video information is superimposed on the horizontal and vertical retrace periods, the level can be lowered to the black level during the retrace period, but the black level seen at the output terminal of the level control circuit 3 As already explained, the level is R ₂ /R ₂ +R ₃ E ₀ , which is not zero volts.

For this reason, when the television receiver 1 is connected to a personal computer, if a signal is superimposed on the horizontal or vertical retrace period of the external primary color video signal, this signal will adversely affect the image. As a result, there was a problem that a clear image could not be obtained.

Disclosure of the invention The invention solves the above problems,
The power supply circuit that supplies the power supply voltage to the level control circuit of the external primary color video signal is configured to cut off the supply of the power supply voltage during the horizontal and vertical retrace periods,
It is an object of the present invention to provide a television receiver in which the signal level of an external primary color video signal during the horizontal and vertical retrace periods can be reliably clamped to zero volts.

In order to achieve this object, the present invention provides an input circuit into which an external primary color video signal is input, a video output circuit connected to the picture tube, a video output circuit provided between the video output circuit and the input circuit, and an external primary color video signal. Consisting of a level control circuit that applies a DC bias signal to the video signal, and a blanking circuit that is connected to the level control circuit and clamps the output of the level control circuit to zero level during the horizontal and vertical retrace periods. This is a summary of what was done.

According to the present invention, a level control circuit is provided between the input circuit of the external primary color video signal and the video output circuit, and a DC bias signal is added to the external primary color video signal, thereby controlling the operation of the video output transistor in the video output circuit. In addition, since the output of the level control circuit is clamped to zero level during the horizontal and vertical retrace periods, the external primary color video signal with the signal superimposed during the retrace period can be improved. Even when supplied, it is possible to effectively prevent these unnecessary signals from having an adverse effect on the picture tube screen, and this improves the operating characteristics of the video output circuit and sharpens the image by blanking. It has excellent effects such as being able to achieve the desired results.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, an embodiment of the invention will be described with reference to FIG. 2. FIG. 2 is a schematic circuit diagram showing an embodiment of the television receiver of the present invention.
In FIG. 2, the same components as in FIG. 1 are given the same reference numerals.

In FIG. 2, the television receiver 11 has the base of the transistor _Q0 in the power supply circuit 3a grounded via the shunt transistor Q, and the base of the shunt transistor Q grounded through the blanking circuit 12. The configuration is such that it is connected to a flyback transformer (not shown). Therefore, when a blanking pulse is output from the blanking circuit 12 during the horizontal and vertical retrace periods, the shunt transistor Q becomes conductive. As a result, the base of the transistor _Q0 is grounded and becomes non-conductive, and the output voltage of the level control circuit 3 is clamped to zero volts.

As a result, even if the output level or peak value of the external primary color video signal is adjusted by varying the resistors R ₁ , R ₂ , R ₃ , etc. in the level control circuit 3, the horizontal and vertical retrace periods are Since the external primary color video signal can always be clamped to zero volts, even if signals unrelated to video information are superimposed during the horizontal and vertical flyback periods, these unnecessary signals will completely disappear. , clear images without interference from unnecessary signals can be obtained.

As explained above, the television receiver 11
According to , a level control circuit 3 is provided between an input circuit 2 for an external primary color video signal and a video output circuit 6, and a DC bias signal is added to the external primary color video signal, thereby controlling the video output transistor in the video output circuit 6. Moreover, since the output of the level control circuit 3 is clamped to zero level during the horizontal and vertical retrace periods, the external primary color signal superimposed during the retrace period can be improved. Even when a video signal is supplied, it is possible to effectively prevent these unnecessary signals from having an adverse effect on the screen of the picture tube 7, so that the video output circuit 6
It is possible to improve the operating characteristics of the image and to sharpen the image by blanking.

[Brief explanation of the drawing]

FIG. 1 is a schematic circuit diagram showing an example of a television receiver on which the present invention is based, and FIG. 2 is a schematic circuit diagram showing an embodiment of the television receiver of the present invention. 11...Television receiver, 2...Input circuit, 3...Level control circuit, 6...Video output circuit, 12...Blanking circuit.

Claims (1)

[Scope of utility model registration request] an input circuit into which an external primary color video signal is input; a video output circuit connected to the picture tube; and a level control circuit provided between the video output circuit and the input circuit and applying a DC bias signal to the external primary color video signal. and a blanking circuit connected to the level control circuit and clamping the output of the level control circuit to zero level during horizontal and vertical retrace periods.