JPH0244701A - Thin film resistor and manufacture thereof - Google Patents

Thin film resistor and manufacture thereof

Info

Publication number
JPH0244701A
JPH0244701A JP63194470A JP19447088A JPH0244701A JP H0244701 A JPH0244701 A JP H0244701A JP 63194470 A JP63194470 A JP 63194470A JP 19447088 A JP19447088 A JP 19447088A JP H0244701 A JPH0244701 A JP H0244701A
Authority
JP
Japan
Prior art keywords
thin film
resistor
film resistor
resistance value
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63194470A
Other languages
Japanese (ja)
Inventor
Yuko Sekino
祐子 関野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP63194470A priority Critical patent/JPH0244701A/en
Publication of JPH0244701A publication Critical patent/JPH0244701A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To trim a resistance value by a simple and inexpensive method of annealing by forming a thin film resistor using a thin film of tungsten nitride. CONSTITUTION:An insulating film (SiO2 film) 2 is formed on a semiconductor substrate 1 made of Si, GaAs, etc., and a thin film resistor 3 made of a thin film of tungsten nitride (WN) is placed thereon. The resistor 3 is connected at its both ends with electrode wirings 4, and covered with a protective film 5 together with the wirings 4 to be protected. Nitride silicide (SiN) is employed as the film 5. The resistance value of the resistor 3 is trimmed by annealing. Thus, a simple and inexpensive trimming can be performed.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、IC上に搭載される薄膜抵抗器およびその
製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a thin film resistor mounted on an IC and a method for manufacturing the same.

(従来の技術) 薄膜抵抗器は安定性や温度特性の優れた抵抗器であり、
従来、NiCr 、 5iCr 、 Ta 、 SnO
2などで形成されている。この薄膜抵抗器において、抵
抗値のトリミングには、従来、レーザ・トリミングが広
く用いられている。レーザ・トリミングとは、例えば米
山寿−r A/Dコンバータ入門」オーム社P165に
開示されるように、抵抗の一部を焼損して抵抗値をトリ
ピングする方法である。
(Conventional technology) Thin film resistors are resistors with excellent stability and temperature characteristics.
Conventionally, NiCr, 5iCr, Ta, SnO
It is formed by 2 etc. Conventionally, laser trimming has been widely used to trim the resistance value of this thin film resistor. Laser trimming is a method of tripping the resistance value by burning out a part of the resistor, as disclosed, for example, in Toshi Yoneyama's "Introduction to A/D Converters" Ohmsha P165.

(発明が解決しようとする課題) しかるに、レーザ・トリミング法は高価であり、IC製
造におけろコストを上げるという問題点があった。
(Problems to be Solved by the Invention) However, the laser trimming method is expensive and has the problem of increasing costs in IC manufacturing.

この発明は、簡便かつ安価なトリミング法とし得る4膜
抵抗器およびその製造方法を提供することを目的とする
An object of the present invention is to provide a four-film resistor that can be trimmed simply and inexpensively, and a method for manufacturing the same.

(課題を解決するための手段) この発明では、窒化タングステン薄膜により薄膜抵抗器
を形成する。また、トリミングは、アニールにより行う
(Means for Solving the Problems) In the present invention, a thin film resistor is formed from a tungsten nitride thin film. Further, trimming is performed by annealing.

(作  用) 上述のように、薄膜抵抗器を窒化タングステン薄膜で形
成した場合は、次にアニールし、その濃度および時間を
*J御する乙とにより、薄膜抵抗器の抵抗値が調整され
る。
(Function) As mentioned above, when a thin film resistor is formed from a tungsten nitride thin film, it is then annealed and the resistance value of the thin film resistor is adjusted by controlling the concentration and time. .

(実 施 例) 以下この発明の一実施例を図面を参照して説明する。(Example) An embodiment of the present invention will be described below with reference to the drawings.

第1図はこの発明の一実施例の薄膜抵抗器をIC上に搭
載した状態を示し、(alは断面図、(blは平面図で
ある。これらの図において、1はSiあるいはGaAs
などからなる半導体基板で、表面には絶縁膜(Sin2
膜)2が形成され、その上に窒化タングステン(WN)
の薄膜からなる薄膜抵抗u3が搭載される。この薄膜抵
抗器3は、両端に′:4極配線4が接続される。また、
乙の薄膜抵抗器3は、前記電極配線4などとともに保護
膜5で覆われ、保護されている。保XI[5としては窒
化シリサイド(SiN)が用いられている。
FIG. 1 shows a state in which a thin film resistor according to an embodiment of the present invention is mounted on an IC, where (al is a cross-sectional view, and (bl is a plan view.
A semiconductor substrate made of materials such as
A film) 2 is formed on which tungsten nitride (WN) is formed.
A thin film resistor u3 made of a thin film is mounted. This thin film resistor 3 is connected to both ends thereof with 4-pole wiring 4 . Also,
The thin film resistor 3, along with the electrode wiring 4 and the like, is covered and protected by a protective film 5. Silicide nitride (SiN) is used as the material XI[5.

以上のような構造は次のようにして製造される。The structure described above is manufactured as follows.

まず、SiあるいはGaAsなとの半導体基板1上に絶
縁gff 2として5in2膜を約4000人化学気相
成長させる。このS i O2膜は、その上に形成され
る薄膜抵抗器と半導体基板1とを絶縁する目的で用いる
。絶縁膜として窒化シリコン膜(SiN膜)も知られて
いるが、薄膜抵抗器のWNとの密着性が悪いため、用い
ることはできない。
First, on a semiconductor substrate 1 made of Si or GaAs, a 5in2 film as an insulating GFF 2 is grown by chemical vapor deposition using about 4000 people. This S i O 2 film is used for the purpose of insulating the semiconductor substrate 1 from the thin film resistor formed thereon. Although a silicon nitride film (SiN film) is also known as an insulating film, it cannot be used because of its poor adhesion to the WN of the thin film resistor.

次に、絶縁膜(S10□膜)2上にWNを反応性スパッ
タリング法にて蒸着する。ここで、ターゲットにタング
ステン(W)を用い、基板1はあらかじめ150℃に加
熱しておき、Ar分圧5mTorr。
Next, WN is deposited on the insulating film (S10□ film) 2 by reactive sputtering. Here, tungsten (W) is used as a target, the substrate 1 is preheated to 150° C., and the Ar partial pressure is 5 mTorr.

N2分圧1〜10 mTo r rの混合雰囲気中、直
流電源300Wの反応性スパッタリングを行うことによ
り、WN4膜は均一に蒸着される。次に、このWN薄膜
を、六フッ化硫黄ガス(SF6)による反応性イオンエ
ツチング法にて抵抗器パターンに加工することにより、
薄膜抵抗@3を形成する。
The WN4 film is uniformly deposited by performing reactive sputtering with a DC power source of 300 W in a mixed atmosphere with a N2 partial pressure of 1 to 10 mTorr. Next, this WN thin film was processed into a resistor pattern using reactive ion etching using sulfur hexafluoride gas (SF6).
Form a thin film resistor @3.

続イテ、Ti、 PtおよびAuの電子ビーム蒸着とパ
ターニングにより、薄膜抵抗PJ3の両端に接続される
ようにして電極配線4を形成する。
Subsequently, by electron beam evaporation and patterning of Ti, Pt, and Au, electrode wiring 4 is formed so as to be connected to both ends of the thin film resistor PJ3.

以上で一応WN薄膜抵抗N3と電極配線4が形成された
わけだが、WN薄膜の抵抗値やその温度係数は、反応性
スパッタリング蒸着におけろN2分圧に大きく依存する
。第2図に、WJ]i抵抗のシート抵抗値の温度係数と
、スパッタリング蒸着におけるN2分圧の関係を示す。
Although the WN thin film resistor N3 and the electrode wiring 4 have been formed in the above manner, the resistance value of the WN thin film and its temperature coefficient largely depend on the N2 partial pressure even in reactive sputtering deposition. FIG. 2 shows the relationship between the temperature coefficient of the sheet resistance value of the WJ]i resistance and the N2 partial pressure during sputtering deposition.

ただし、スパッタ時間は1〜4分、膜厚は100〜40
0人である。
However, the sputtering time is 1 to 4 minutes, and the film thickness is 100 to 40 minutes.
There are 0 people.

第2図より、温度係数とN2分圧の対数はほぼ直線関係
にあることがわかる。たとえば、温度係数を零に近づけ
たいときは、N2分圧を1mTorrとすれば、±20
0 ppm7℃以内の温度係数が得られろ。そのとき、
比抵抗は約0.17Ω・傭となるので、膜厚340人と
すれば、50Ω/口のシート抵抗となる。
From FIG. 2, it can be seen that the temperature coefficient and the logarithm of the N2 partial pressure have a substantially linear relationship. For example, if you want the temperature coefficient to be close to zero, if the N2 partial pressure is 1 mTorr, the temperature coefficient will be ±20
Obtain a temperature coefficient within 0 ppm 7°C. then,
The specific resistance is approximately 0.17Ω·min, so if the film thickness is 340 people, the sheet resistance will be 50Ω/mouth.

ところで、WN薄膜の抵抗値は、WNスパッタ前の表面
状態に大きく依存する。通常のICプロセスでは、絶&
i膜を化学気相成長した後、その下にある配線とのコン
タクトをとるため絶縁膜にスルーホールを形成する。と
ころが、スルーホール形成用レジストの除去に酸素アッ
シングを用いると、絶縁膜の表面状態が変質し、その上
にスパッタリング蒸着したWN#膜の抵抗値は、化学気
相成長後何も施さない所謂アズ・デボ(as−depo
)と称される絶縁膜上と比較して約3倍となる。また、
抵抗値の面内均一性も悪くなる。アズ・デボの絶縁膜上
と同等の抵抗値を得るためには、レジストは、酸素アッ
シングではなく、リムーバを用いて化学的にかつ完全に
取り除かなくてはならない。あるいは、酸素アッシング
の後、絶縁膜表面を5%程度の薄いフッ酸でスライドエ
ツチングする必要がある。このようにすれば、WNf4
膜の抵抗値はアズ・デボの絶縁膜上と同等であり、面内
5%以内の均一性を持つ。
Incidentally, the resistance value of the WN thin film largely depends on the surface condition before WN sputtering. In normal IC process,
After chemical vapor deposition of the i-film, through-holes are formed in the insulating film to make contact with the underlying wiring. However, when oxygen ashing is used to remove the resist for forming through-holes, the surface condition of the insulating film changes, and the resistance value of the WN# film deposited by sputtering on top of the insulating film changes compared to that of the so-called as-assembled film, in which no treatment is performed after chemical vapor deposition.・as-depo
) is approximately three times as large as that on an insulating film. Also,
The in-plane uniformity of the resistance value also deteriorates. In order to obtain a resistance value equivalent to that on the as-deposited insulating film, the resist must be chemically and completely removed using a remover rather than oxygen ashing. Alternatively, after oxygen ashing, it is necessary to slide-etch the insulating film surface with a dilute hydrofluoric acid of about 5%. If you do this, WNf4
The resistance value of the film is equivalent to that on the as-deposited insulating film, and the in-plane uniformity is within 5%.

さて、上述のようにしてWN4膜抵抗器3と電極配線4
を形成したならば、次に、WN薄膜抵抗器3の抵抗値調
整(トリミング)を行う。この抵抗値の調整は、アニー
ルによって行う。第3図は、N2分圧5mTorrの条
件で240人反応性スパッタリング蒸看全行フたWN薄
膜抵抗路3に対して、N2雰囲気中380℃のアニール
を行った時の抵抗値とアニール時間の関係図である。抵
抗値はアニール時間に対し、1分当り0.68%の割合
で増加する。誤差は3%以内である。したがって、たと
えば45ΩのWN4膜抵抗器3を50Ωに調整する場合
は、16分20秒のアニールを行えばよい。
Now, the WN4 film resistor 3 and the electrode wiring 4 are connected as described above.
Once formed, the resistance value of the WN thin film resistor 3 is then adjusted (trimmed). This resistance value is adjusted by annealing. Figure 3 shows the resistance value and annealing time when the WN thin film resistor path 3 was annealed at 380°C in an N2 atmosphere under the condition of a N2 partial pressure of 5 mTorr and 240 reactive sputtering vaporizers. It is a relationship diagram. The resistance value increases at a rate of 0.68% per minute with respect to the annealing time. The error is within 3%. Therefore, for example, when adjusting a 45Ω WN4 film resistor 3 to 50Ω, annealing may be performed for 16 minutes and 20 seconds.

このようにしてWN薄膜抵抗器3のトリミングを行った
ならば、最後に、抵抗器3等の保護膜5として窒化シリ
サイド(SiN)を化学気相成長させる。この保護膜5
の形成工程および形成後の400℃以下のアニールによ
る薄膜抵抗!!#3の抵抗値変動はない。
After trimming the WN thin film resistor 3 in this way, finally, nitride silicide (SiN) is grown in a chemical vapor phase as a protective film 5 for the resistor 3 and the like. This protective film 5
Thin film resistance through the formation process and annealing at 400°C or less after formation! ! There is no resistance value change in #3.

なお、以上の方法で、温度係数が一600〜500pp
m(1!J差±200 ppm/℃)の任意の値、抵抗
値が10〜100Ω/口(誤差±3%)の任意の値であ
る薄膜抵抗器3が容易に得られる。
In addition, with the above method, the temperature coefficient is 1600 to 500 pp.
A thin film resistor 3 having an arbitrary value of m (1!J difference ±200 ppm/°C) and an arbitrary resistance value of 10 to 100 Ω/unit (error ±3%) can be easily obtained.

(発明の効果) 以上説明したように、この発明によれば、窒化タングス
テンの薄膜により薄膜抵抗器を形成したので、アニール
という簡便かつ安価な方法で抵抗値調整(トリミング)
を行うことができる。したがって、薄膜抵抗器の抵抗値
調整がIC製造におけろコストアップの原因となること
を防止できる。
(Effects of the Invention) As explained above, according to the present invention, since a thin film resistor is formed from a thin film of tungsten nitride, the resistance value can be adjusted (trimmed) by a simple and inexpensive method called annealing.
It can be performed. Therefore, adjusting the resistance value of the thin film resistor can be prevented from increasing costs in IC manufacturing.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図ないし第3図はこの発明の薄膜抵抗器およびその
製造方法の一実施例を説明するための図で、第1図はこ
の発明の一実施例の薄膜抵抗器をIC上に搭載した断面
図および平面図、第2図はWN薄膜抵抗の抵抗値温度係
数と反応性スパッタリング蒸着におけるN2分圧の関係
図、第3図はWN薄膜抵抗の抵抗値とアニール時間の関
係図である。 3・・WN薄膜抵抗器。 ≦ 才6一才1で、イ’L (Q)
1 to 3 are diagrams for explaining an embodiment of a thin film resistor of the present invention and a method for manufacturing the same, and FIG. 1 shows a thin film resistor of an embodiment of the present invention mounted on an IC. 2 is a diagram showing the relationship between the temperature coefficient of resistance of the WN thin film resistor and N2 partial pressure in reactive sputtering deposition, and FIG. 3 is a diagram showing the relationship between the resistance value of the WN thin film resistor and annealing time. 3. WN thin film resistor. ≦ 61 years old, 1 year old, I'L (Q)

Claims (2)

【特許請求の範囲】[Claims] (1)窒化タングステンの薄膜からなる薄膜抵抗器。(1) A thin film resistor made of a thin film of tungsten nitride. (2)アルゴンおよび窒素混合ガス雰囲気中での反応性
スパッタリング蒸着により窒化タングステン薄膜を形成
し、 この窒化タングステン薄膜を抵抗器としてパターニング
し、 その後、アニールにより窒化タングステン薄膜抵抗器の
抵抗値調整を行うようにした薄膜抵抗器の製造方法。
(2) Form a tungsten nitride thin film by reactive sputtering deposition in an argon and nitrogen mixed gas atmosphere, pattern this tungsten nitride thin film as a resistor, and then adjust the resistance value of the tungsten nitride thin film resistor by annealing. A method for manufacturing a thin film resistor.
JP63194470A 1988-08-05 1988-08-05 Thin film resistor and manufacture thereof Pending JPH0244701A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63194470A JPH0244701A (en) 1988-08-05 1988-08-05 Thin film resistor and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63194470A JPH0244701A (en) 1988-08-05 1988-08-05 Thin film resistor and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH0244701A true JPH0244701A (en) 1990-02-14

Family

ID=16325084

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63194470A Pending JPH0244701A (en) 1988-08-05 1988-08-05 Thin film resistor and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH0244701A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH084883A (en) * 1994-06-24 1996-01-12 Aisin Chem Co Ltd Resin-made pulley, its manufacture and device
US6025632A (en) * 1996-12-16 2000-02-15 Matsushita Electronics Corp. Semiconductor integrated circuit with tungston silicide nitride thermal resistor
US7406891B2 (en) 2003-06-02 2008-08-05 Enplas Corporation Injection molded resin gear and injection molded resin rotating body

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH084883A (en) * 1994-06-24 1996-01-12 Aisin Chem Co Ltd Resin-made pulley, its manufacture and device
US6025632A (en) * 1996-12-16 2000-02-15 Matsushita Electronics Corp. Semiconductor integrated circuit with tungston silicide nitride thermal resistor
US6329262B1 (en) 1996-12-16 2001-12-11 Takeshi Fukuda Method for producing semiconductor integrated circuit
US7406891B2 (en) 2003-06-02 2008-08-05 Enplas Corporation Injection molded resin gear and injection molded resin rotating body

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