JPH0244428U - - Google Patents
Info
- Publication number
- JPH0244428U JPH0244428U JP12264188U JP12264188U JPH0244428U JP H0244428 U JPH0244428 U JP H0244428U JP 12264188 U JP12264188 U JP 12264188U JP 12264188 U JP12264188 U JP 12264188U JP H0244428 U JPH0244428 U JP H0244428U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- clock counter
- temporarily stopping
- counting
- scale integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Electronic Switches (AREA)
Description
第１図は、本考案の一実施例の構成図、第２図
は、本考案によるＬＳＩ内部タイマを外部から制
御しオーバフロ時間を変化させる一例を示す説明
図、第３図は、従来のタイマの一例を示す説明図
である。
１……ＬＳＩ内部カウンタ、３……内部カウン
タロード入力、５……内部カウンタイネーブル入
力、６……内部カウンタ起動信号、７……内部タ
イマ制御信号、８……ＬＳＩ入力端子、１２……
ＬＳＩ内部タイマ、１３……外部タイマ。
FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram showing an example of externally controlling an LSI internal timer of the present invention to change the overflow time, and FIG. 3 is a diagram of a conventional timer. It is an explanatory diagram showing an example. 1...LSI internal counter, 3...Internal counter load input, 5...Internal counter enable input, 6...Internal counter start signal, 7...Internal timer control signal, 8...LSI input terminal, 12...
LSI internal timer, 13...external timer.
Claims (1)
いて、該刻時計数器の計数を一時停止させるため
の信号入力端子を設けるとともに、該刻時計数器
の計数を一時停止させる回路を設け、該大規模集
積回路内の前記時刻計数器の計数動作を外部より
制御可能とするよう構成したことを特徴とする集
積回路。 In a large-scale integrated circuit having a clock counter inside, a signal input terminal for temporarily stopping counting of the clock counter is provided, and a circuit is provided for temporarily stopping counting of the clock counter, An integrated circuit characterized in that a counting operation of the time counter in the large-scale integrated circuit is configured to be externally controllable.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12264188U JPH0244428U (en) | 1988-09-21 | 1988-09-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12264188U JPH0244428U (en) | 1988-09-21 | 1988-09-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0244428U true JPH0244428U (en) | 1990-03-27 |
Family
ID=31370758
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12264188U Pending JPH0244428U (en) | 1988-09-21 | 1988-09-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0244428U (en) |
-
1988
- 1988-09-21 JP JP12264188U patent/JPH0244428U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0244428U (en) | ||
| JPS5920732U (en) | timer circuit | |
| JPS639658U (en) | ||
| JPS60146891U (en) | Clock with alarm function | |
| JPS6133118U (en) | power control device | |
| JPH0273255U (en) | ||
| JPS62135989U (en) | ||
| JPH02108102U (en) | ||
| JPS6223349U (en) | ||
| JPS62151603U (en) | ||
| JPS6430495U (en) | ||
| JPS62105546U (en) | ||
| JPS5886598U (en) | timer time setting device | |
| JPS6418348U (en) | ||
| JPS60124136U (en) | Control device | |
| JPS6095595U (en) | time or time display device | |
| JPS62135987U (en) | ||
| JPH03116424U (en) | ||
| JPS6223336U (en) | ||
| JPS62179282U (en) | ||
| JPS58101233U (en) | Standby mode control device | |
| JPH0262818U (en) | ||
| JPH01123230U (en) | ||
| JPS61133850U (en) | ||
| JPH044320U (en) |