JPH024146B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a field effect semiconductor device, and more particularly to a bias application structure for a depression mode field effect semiconductor device.

(b) Prior art and problems A depletion mode field effect transistor (hereinafter abbreviated as D-type MES FET), which is used as an amplification element in a monolithic integrated circuit made of GaAs or the like, especially in the case of a linear amplifier, has a source S When grounded and a positive voltage applied to the drain D,
In order to provide a predetermined drain current, it is necessary to apply an appropriate negative bias to the gate.

For example, the DC bias method for GaAs MES FETs includes a so-called dual power supply method (Figure 1a) that supplies this positive drain voltage and negative gate voltage from the outside.
One power supply method ((first Figure b).

This I power supply method has the great advantage that the power supply only needs to be of one polarity, but the source resistance R and the RF signal bypass capacitance C that must be placed in parallel with R are quite large depending on the signal frequency. Not only does this require a capacitance value and therefore a considerably large pattern area, which significantly reduces the area efficiency of the chip in monolithic integrated circuit devices, but the capacitance C has the risk of being short-circuited due to pinholes in the insulating film, etc., which reduces yield. This is a factor that increases costs, such as lowering the cost. It is not necessarily easy to monolithically realize such a self-biasing field effect semiconductor device, and for this reason conventionally it has been fabricated using a hybrid method.

(c) Object of the Invention The object of the present invention is to solve the above-mentioned problems and realize a monolithic depreciation field effect semiconductor device of a single power supply self-bias type that is easy to manufacture.

(d) Structure of the Invention The present invention is characterized by a depletion field effect semiconductor element having a gate electrode, a source electrode, and a drain electrode formed on the same surface of a semiconductor substrate, and a depletion type field effect semiconductor element having a gate electrode, a source electrode, and a drain electrode formed on the same surface of a semiconductor substrate; and a resistor or inductance inserted between the gate electrode and the reference potential.

(e) Embodiment of the Invention An embodiment of the D-type MES FET according to the present invention will be described below with reference to the drawings.

FIG. 2 is a circuit configuration diagram showing the configuration of the above-described embodiment. As seen in the figure, in this embodiment, the normal D
A shotgun barrier diode D was inserted between the source S and the ground terminal of the type GaAs MES FET. Here, the anode side of the shotgun barrier diode is connected to the source S, and the cathode side is connected to the ground terminal. Furthermore, a resistor R _G for gate bias supply is inserted between the gate G and the ground terminal. Although not shown, an inductance may be used instead of R _G. Note that in this embodiment, the above-mentioned ground terminal potential was used as a reference potential.

As shown in Figure 3a, the forward voltage-current characteristics of the shovel barrier diode are as follows:
When V _F exceeds a certain threshold voltage (approximately 0.7V), a large forward current I _F suddenly flows, and the terminal voltage becomes almost constant. In the FET of this embodiment in which a shot barrier diode having such characteristics is inserted between the source S and the ground terminal, when a positive voltage is applied to the drain D, the source potential becomes positive by the above threshold voltage, and the Tsute Gate G
The potential of is biased negatively by the above threshold voltage with respect to the source potential.

Figure 3b is an equivalent circuit diagram of the above-mentioned shotgun barrier diode in the radio frequency (RF) region.
R _S is the series resistance of the semiconductor layer, and is generally small, several ohms or less. Furthermore, R _P is the differential resistance in the RF region of the Schottky junction, which is extremely small as shown by the following formula R _P =0.028/I _F [Ω]. For example, when the forward current I _F is 10, 28, and 50 [mA], R _P is 2.8, respectively.
1.0, 0.56 [Ω]. Comparing Figure 1b and Figure 3b, the sum of the above two resistances (R _S +R _P ) corresponds to R, but as mentioned above, (R _S +R _P ) is smaller than R, so RF loss is small.

C _P is the capacitance of the Schottky junction in the forward biased state, and the relative dielectric constant ε _r of GaAs is large, approximately 13, and the width of the depletion layer is several times larger when the forward bias is applied.
Silicon dioxide (SiO ₂ , relative dielectric constant ε _r ≒
4) or silicon nitride (Si ₃ N ₄ , relative dielectric constant ε _r ≒ 6)
A larger capacitance can be obtained than a parallel plate capacitor using a parallel plate capacitor, and therefore the loss against RF can be sufficiently reduced.

As described above, the GaAs MES FET of this embodiment has a reduced loss during operation compared to the conventional one.

FIG. 4 is a cross-sectional view and a top view of a main part showing the GaAs MES FET of this example, and FIG. 5 is a cross-sectional view and a top view of a main part showing a conventional device for comparison. Note that a in Figures 4 and 5 is the respective figure b.
A section taken in the direction of the arrow and a section taken in the direction of the arrow are shown.

In Figures 4 and 5, 1 is a semi-insulating substrate made of GaAs, 2 and 2' are active layers made of n-type GaAs, and 3 and 4 are made of gold/germanium/gold (AuGe/Au), etc. source and drain electrodes in ohmic contact with type GaAs;
5 and 6 are gate electrodes made of titanium/platinum/gold (Ti/Pt/Au) and in short contact with the active layer 2, and the anodes of the above-mentioned short barrier diodes; 7 is a silicon dioxide (SiO ₂ ) film; and 8 is an active electrode. Ohmic electrode for layer 2', consisting of AuGe/Au. 9 is a gate bias supply resistor R _G ,
Reference numerals 10 and 11 are electrodes at both ends of the gate bias supply resistor _RG . Further, 12 is an electrode of a bypass capacitor (C in FIG. 1B), 13 is a source resistor (R in FIG. 1B), and 14 and 15 are electrodes of the source resistor R.

As is clear from both figures, according to this embodiment, the source resistor 13 in the conventional device is unnecessary, and the area of the shot barrier diode is smaller than the capacitor C, so the element can be miniaturized and the integrated circuit device can be made more sophisticated. Can be densified.

For example, in the conventional device shown in Figure 5, the drain current is
When the current is 10 [mA] and the gate bias is 0.7 [V],
A source resistor 13 (R in FIG. 1b) and an electrode 14,
The area of 15 is about 7000 [μm ² ], and the area of bypass capacitor C has a cutoff frequency of about 30,300 μm 2 .
In the case of 1000 [MHz], approximately 1×10 ⁶ and 1×
10 ⁵ , 3×10 ⁴ [μm ² ].

On the other hand, in this embodiment shown in FIG. 4, the area of the shotgun barrier diode is approximately 1300 [μm ² ] when the drain current is 10 [mA] as described above.
Even including the electrode part, it is approximately 3300 [μ
m ² ].

Therefore, the area of the shot barrier diode of this embodiment is smaller than the area of the source resistor and bypass capacitor of the conventional device when the cutoff frequency is 30, 300, 300,
In the case of 1000 [MHz], approximately 1/326.1/35, respectively.
It is good that it is small at 1/12.

As described above, in this embodiment, by disposing a shot barrier diode in place of the source resistor R and bypass capacitor C of the conventional device, it is possible to significantly miniaturize the element and reduce the loss during operation. A single power supply type GaAs field effect semiconductor device with good area efficiency and operating characteristics can be obtained. Note that each part of the above shot barrier diode can be formed at the same time as each part of the CaAs field effect semiconductor device is formed. Therefore, when manufacturing the semiconductor device of this embodiment, it is only necessary to partially change the pattern of the photomask, and no change is required in the manufacturing process.

Furthermore, it is easy to understand that the field effect semiconductor device of the present invention is not limited to GaAs explained in the above embodiment, but can be implemented using silicon (Si) or the like, for example.

(f) Effects of the Invention As described above, the present invention provides a depletion mode field effect semiconductor device having an improved bias application structure using a single power supply system. It goes without saying that the present invention can be applied to both individual semiconductor devices and integrated circuit devices.

[Brief explanation of drawings]

Figures 1a and b are circuit diagrams showing the configurations of conventional two-power supply system and single-power supply system GaAs MES FETs, Figure 2 is a circuit diagram showing the configuration of an embodiment of the present invention, and Figures 3a and b are Fig. 2 is a curve diagram and an equivalent circuit diagram showing the forward characteristics of the shot barrier diode D, Fig. 4 is a sectional view and top view of the main part of the above embodiment, and Fig. 5 is a conventional example shown for comparison. FIG. 2 is a sectional view and a top view of main parts of the device. In the figure, 1 is a semi-insulating substrate, 2 and 2' are active layers, 3 and 4 are source and drain electrodes that make ohmic contact with active layer 2, and 5 and 6 are in shot contact with active layers 2 and 2', respectively. The gate electrode and the electrode of the shot barrier diode are shown.

Claims (1)

[Claims] 1. A depletion field effect semiconductor device formed on the same surface of a semiconductor substrate and provided with a gate electrode, a source electrode, and a drain electrode, and a shot barrier interposed between the source electrode and a reference potential. - A field effect semiconductor device comprising: a diode; and a resistor or inductance inserted between the gate electrode and a reference potential.