JPH0239542A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the high-speed performance and obtain high output by reducing the composition ratio of a constituent element in the second semiconductor layer from the side of the third semiconductor layer to the first semiconductor layer gradually, and by enlarging the forbidden band width of the second semiconductor layer gradually and making the electron affinity smaller gradually. CONSTITUTION:An undoped GaAs layer 2 being the first semiconductor layer, an undoped InxGa1-xAs layer 3 being the second semiconductor layer, an undoped Al0.3Ga0.7As layer 4 being the fourth semiconductor layer, a 2X10<18>cm<-3> Si-doped Al0.3Ga0.7As layer 5 being the third semiconductor layer, and a 2X10<18>cm<-3> Si-doped GaAs layer 6 being the fifth semiconductor layer are grown continuously on a semi-insulating GaAs substrate 1. And, the In composition ratio (x) in the undoped InxGa1-xAs layer 3 is decreased gradually, from the value 0.3 at the heterojunction phase boundary with the undoped Al0.3Ga0.7As layer 4 to the value 0.05 at the heterojunction phase boundary with the undoped GaAs layer 2. Then, photoresists are removed by etching, and a gate electrode G is formed after the source electrode S and drain electrode D are formed through a normal method.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor device, and more particularly to a high-output semiconductor device 2, such as a high-mobility transistor, with excellent high-speed operation.

(Prior Art) In general, silicon is an indirect transition type semiconductor, whereas many compound semiconductors are direct transition type semiconductors, and are characterized by high carrier mobility. Furthermore, since two types of semiconductor mixed crystals can be artificially produced by changing the composition ratio of multi-component compound semiconductors, it is possible to form a heterojunction that can achieve lattice matching between different semiconductor crystals. Such heterojunctions can be used to create ultra-high-speed semiconductor devices such as high electron mobility transistors that utilize modulation doping, various optoelectronic devices such as light-emitting diodes and semiconductor lasers, and even new devices that utilize superlattice structures. is being developed.

Conventionally, the most common structure of high electron mobility transistors (hereinafter abbreviated as IEMT) using two-dimensional electron gas is AlGaAs/Ga as shown in Figure 2.
As-based 11EMT has been reported. This HEMT heterostructure was formed on a semi-insulating GaAs substrate 1.

Undoped GaAs layer 2. Undoped AlGaAs layer 1
4. Si-doped AlGaAs layer 15. and a Si-doped GaAs layer 16.

Undoped GaAs layer 2 and undoped AlGaAs layer 1
2 on the undoped GaAs layer 2 side at the heterojunction interface with 4.
A dimensional electron gas E is formed. Si-doped GaAs
A source electrode S and a drain electrode are formed on the layer 16, and a gate electrode G is formed on the Si-doped AlGaAs layer 15, which is a two-electron supply layer. Then, the concentration N of the two-dimensional electron gas E under the gate electrode G is changed by the voltage applied to the gate, so that the transistor operates as a field effect transistor.

In order to improve the device characteristics of such IIEMT.

It is necessary to increase the mutual conductance g, and efforts have been made to increase the concentration N5 of the two-dimensional electron gas and increase the drift velocity of electrons.

In recent years, InGaAs, which has a higher carrier drift velocity than GaAs, has been used as an electron transport layer.For example, an AlGaAs layer as shown in FIG.
MT has been proposed (IEEE ELECTRO
N DEVICE LETTER3, VOL.

EDL-6NO, 12, DECEMBER 1985).

This HEMT heterostructure consists of a semi-insulating GaAs substrate 1
formed on top.

Undoped GaAs layer 2. Undoped Ino, +5G
ao, e5As layer 23. Undoped Alo, r s
Gao0gsAs layer 24. Si-doped 8 o, +5
Gao, asAs layer 25. and Si-doped GaAs
Consisting of layer 26, undoped Ino, +5Gao,
asAs layer 23 and undoped A1°, 1sGao,
Undoped In at the heterojunction interface with the B5As layer 24
o, +5Gao, as8 A two-dimensional electron gas E is formed on the S layer 23 side. Si-doped GaAsFi26
A source electrode S and a drain electrode are formed on the .

Si-doped AIO, 1scao, which is an electron supply layer
A gate electrode G is formed on the 5As layer 25.

and.

The concentration N of the two-dimensional electron gas E under the gate electrode G is changed by the voltage applied to the gate, and the transistor operates as a field effect transistor.

InGaAs has a smaller forbidden band width and higher electron affinity than GaAs, so the AlGaAs layer and InGaAs
Conduction band discontinuity width ΔE at the heterojunction interface with the As layer
c is.

This is larger than the conduction band discontinuity width at the heterojunction interface between the AlGaAs layer and the GaAs layer. Also, AlGaAs
The two-dimensional electron gas concentration N in the /InGaAs system can be thicker than that in the AlGa^s/GaAs system. Therefore, the AlGaAs layer shown in FIG.
The aAs-based HEMT is made of AlGaAs/
It is expected that the mutual conductance g is larger than that of a GaAs-based HEMT.

(Problems to be Solved by the Invention) However, in a HEMT as shown in FIG.
This is because there is a difference in lattice constant between the aAs layer and the InGaAs layer.

When the thickness of the InGaAs layer exceeds a certain critical layer thickness hc,
Misfit dislocations occur within the InGaAs layer, significantly degrading device characteristics. Therefore, there is a constraint that the thickness of the InGaAs layer must be less than or equal to the critical layer thickness.

In such a HEMT, in order to further increase the mutual conductance g, by increasing the Tnil composition ratio in InGaAsJil, AlGaA
However, it is conceivable to increase the conduction band discontinuity width ΔEc at the heterojunction interface between the s layer and the InGaAs layer.

If the In composition ratio in the InGaAs layer is increased (then,
Lattice mismatch between InGaAs layer and GaAs layer and A
The lattice mismatch between the lGaAs layer and the InGaAs layer becomes even thicker.

The critical layer thickness hc of the InGaAs layer becomes smaller. Therefore, it is necessary to further reduce the thickness of the InGaAs layer.

Figure 4 shows the relationship between the InMi composition ratio and the critical layer thickness of the InGaAs layer (IEEE IEDM, 418.1987
). For example, if the In composition ratio in the InGaAs layer is set to 0,
．． 4, the critical layer thickness is approximately 50 people.

Within the potential formed in such a very narrow InGaAs layer, 1 with a spread of, for example, about 100 2
When a dimensional electron gas is confined, a problem arises in that two-dimensional electrons leak into the AlGaAs layer or GaAs layer adjacent to the InGaAs layer (see Figure 5, IEEE
IEDM, 418.1987). It is difficult to control the concentration of these seeped two-dimensional electrons by applying a bias to the gate. In addition, since the two-dimensional electrons ejected from i8 travel through the AlGaAs layer or GaAs layer, which has a lower drift speed than the InGaAs layer,
The average drift velocity of carriers across the device is reduced, resulting in a decrease in the transconductance g of the IIEMT.

will decrease.

The present invention solves the above-mentioned conventional problems, and its purpose is to improve mutual conductance and efficiently confine highly concentrated two-dimensional electron gas, thereby achieving excellent high-speed operation. An object of the present invention is to provide a semiconductor device 5 for high output, such as a high electron mobility transistor.

(Means for Solving the Problems) A semiconductor device of the present invention includes a first semiconductor layer on a semiconductor substrate, which has a narrower forbidden band width and a higher carrier drift velocity than the first semiconductor layer. A second semiconductor layer formed above the first semiconductor layer has a larger forbidden band width and a lower electron affinity than the second semiconductor layer. and a third semiconductor layer formed above, the composition ratio of constituent elements in the second semiconductor layer being from the third semiconductor layer side to the first semiconductor layer side. Towards this, the forbidden band width of the second semiconductor layer gradually increases and the electron affinity gradually decreases.

Thereby, the above objective is achieved.

In the semiconductor device of the present invention, by increasing the composition ratio of the constituent elements of the second semiconductor layer at the interface on the third semiconductor layer side, the conduction band discontinuity width at the interface is increased. Therefore, the concentration of the two-dimensional electron gas formed near the interface of the second semiconductor layer increases. Moreover, if the composition ratio of the constituent elements in the second semiconductor layer is gradually decreased from the third semiconductor layer side toward the first semiconductor layer side.

The critical layer thickness at which misfit dislocations begin to occur in the second semiconductor layer increases. As a result, the thickness of the second semiconductor layer can be made sufficiently large, and the two-dimensional electron gas can be efficiently confined within the second semiconductor layer.

A fourth semiconductor layer may be provided between the second semiconductor layer and the third semiconductor layer in the semiconductor device of the present invention as a spacer layer for these semiconductor layers. The thickness of this fourth semiconductor layer is preferably 100 layers or less. Furthermore, a fifth semiconductor layer doped with an impurity may be provided on the third semiconductor layer, and has a higher carrier mobility than the third semiconductor layer at the same impurity concentration.

(Example) Examples of the present invention will be described below.

FIG. 1 shows AlGaAs/In, which is an embodiment of the present invention.
FIG. 2 is a cross-sectional view of a GaAs-based +1EMT. HE like this
MT is produced as follows.

First, as shown in FIG. 6, on a semi-insulating GaAs substrate 1, an undoped GaAs layer 2 (thickness 1 μm) which is a first semiconductor layer and an undoped TnxG layer which is a second semiconductor layer are formed.
a (-XAS layer 3 (thickness 200, x = 0.0
5 → 0.3).

undoped A10.3Gao, which is the fourth semiconductor layer;
7AS layer 4 (20 layers thick), the third semiconductor layer 2
XIO"cm-'Si-doped Alo, 3Gao, J
S layer 5 (500 layers thick) and the fifth semiconductor layer 2
E) It was grown continuously by the method.

Here, the In composition ratio X in the undoped InxGa + -xAs layer 3 is undoped Alo, 3Gao,
7 to 0.3 at the heterojunction interface with the S layer 4 to 0 at the heterojunction interface with the undoped GaAs layer 2.
．． The value gradually decreases to 05.

Next, the active region was electrically isolated by etching into a mesa shape using the photoresist as an etching mask, and then the photoresist used as the etching mask was removed.

2. After forming a source electrode S and a drain electrode using normal process technology, a photoresist pattern M for gate formation as shown in FIG. The gate part is etched into a recessed shape.

Finally, deposit two gate metals (eg, AI).

A gate electrode G was formed by removing the photoresist pattern M. In this way, an AlGaAs/InGaAs HEMT as shown in FIG. 1 was fabricated.

The thus obtained 81GaAs/InGaA
In the s-based 11EMT, the second semiconductor layer is undoped InXGa 1-, the As layer 3 and the fourth semiconductor layer is undoped 81°, 3Gao, tAslE!
Undoped In at the heterojunction interface with 4, Ga+-,
A two-dimensional electron gas E is formed on the As layer 3 side. Undoped In, Ga, −, at the cough heterojunction interface
Since the In composition ratio X of the As layer 3 is increased to 0.3, the conduction band discontinuity width ΔEc at the cough heterojunction interface is
This is larger than that of a conventional HEMT in which the In composition ratio is 0.15. Therefore, such conventional HEMT
A two-dimensional electron gas concentration N, which is about 1.3 times higher than that of the previous one, was obtained.

Moreover, as is clear from Fig. 4, In, Ga+-x
When the In composition ratio X in the AsAs layer 3 is 0.3, the critical layer thickness is about 90 layers. On the other hand, Al of this example
In GaAs/InGaAs HEMT, InXG
ap-XAsAs layer 3 In! Since the composition ratio
We were able to reduce the thickness of the sAs layer to 200. Therefore,
This I
It became possible to effectively confine the material within the nXGap- and As layers.

For the reasons mentioned above, the AlGaAs/I
The nGaAs-based HEMT has improved mutual conductance g1 by about 50 m5/+++m compared to the conventional 81GaAs/InGaAs-based HEMT having a uniform In composition ratio.

(Effects of the Invention) According to the present invention, as described above, a semiconductor device 3 such as a high electron mobility transistor is provided in which mutual conductance is improved and highly concentrated two-dimensional electron gas is efficiently (confined). Such a semiconductor device has excellent high-speed operation performance and can obtain high output.Therefore, the semiconductor device of the present invention can be widely applied as a high-output semiconductor device in the microwave region, for example.

-1-ヱ1 Older version ■ Round plate Figure 1 shows an embodiment of the present invention, AlGaAs/
Cross-sectional view of HEMT to T nGa8S, Figure 2 is the conventional A
Cross-sectional view of lGaAs/GaAs HEMT, 3rd
The figure shows a conventional AlGaAs/InGaAs-based IEM
4 is a diagram showing the relationship between the In composition ratio and the critical layer thickness of the TnGaAs layer, and FIG. 5 is a cross-sectional view of the AlGaAs/In
6 and 7 are cross-sectional views of the AlGaAs/InGaAs HEMT shown in FIG. 1 during its manufacture.

l... Semi-insulating GaAs substrate, 2... Undoped G
aAs layer.

3...Undoped In, Ga+-x As layer (x=
o, 05→0.3) 4...Undoped Si-doped Alo. :+Gao. Js layer, 6
-2 XIO"cm-' Si-doped GaAs layer, S
... Source electrode, D... Drain electrode. G...Gate electrode. E...2-dimensional electron gas.

Figure 1 that's all

Claims (1)

[Claims] 1. On a semiconductor substrate, a first semiconductor layer, which has a smaller forbidden band width and a higher carrier drift velocity than the first semiconductor layer, and is formed above the first semiconductor layer. a second semiconductor layer formed above the second semiconductor layer, which has a larger forbidden band width and smaller electron affinity than the second semiconductor layer, is doped with impurities, and is formed above the second semiconductor layer; A semiconductor device comprising: a composition ratio of constituent elements in the second semiconductor layer that increases from the third semiconductor layer side to the first semiconductor layer side; A semiconductor device whose forbidden band width gradually increases and electron affinity gradually decreases.