JPH0232981B2 - - Google Patents

Info

Publication number
JPH0232981B2
JPH0232981B2 JP57047761A JP4776182A JPH0232981B2 JP H0232981 B2 JPH0232981 B2 JP H0232981B2 JP 57047761 A JP57047761 A JP 57047761A JP 4776182 A JP4776182 A JP 4776182A JP H0232981 B2 JPH0232981 B2 JP H0232981B2
Authority
JP
Japan
Prior art keywords
layer
nonwoven fabric
fibers
bag
present
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57047761A
Other languages
Japanese (ja)
Other versions
JPS58163649A (en
Inventor
Shozo Hasegawa
Michio Arai
Toshinori Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DAINITSUKU KK
KARITASU KOGYO GIJUTSU KAIHATSU SENTAA KK
NIPPON SANMO SENSHOKU KK
Original Assignee
DAINITSUKU KK
KARITASU KOGYO GIJUTSU KAIHATSU SENTAA KK
NIPPON SANMO SENSHOKU KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by DAINITSUKU KK, KARITASU KOGYO GIJUTSU KAIHATSU SENTAA KK, NIPPON SANMO SENSHOKU KK filed Critical DAINITSUKU KK
Priority to JP57047761A priority Critical patent/JPS58163649A/en
Publication of JPS58163649A publication Critical patent/JPS58163649A/en
Publication of JPH0232981B2 publication Critical patent/JPH0232981B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Packaging Of Annular Or Rod-Shaped Articles, Wearing Apparel, Cassettes, Or The Like (AREA)
  • Wrappers (AREA)
  • Laminated Bodies (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、静電気防止性、ほこり防止性および
衝撃防止性を兼ね備えたIC包装用袋に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an IC packaging bag that has anti-static properties, anti-dust properties and anti-shock properties.

従来の技術 IC(集積回路)包装用の封筒は、静電気を帯び
ないこと、ほこりが出ないことが絶対条件となる
が、厳しくこの条件を満たす包装材料は未だ見当
らない状態にある。
Prior Art Envelopes for packaging ICs (integrated circuits) must not be charged with static electricity or generate dust, but packaging materials that strictly meet these requirements have not yet been found.

発明が解決しようとする課題 本発明者らは、制電性繊維を含有する不織布で
作つた袋がこの目的に適当ではないかと考えて検
討したが、この不織布は帯電防止性すぐれている
ものの、繊維のほぐれに基く微細な繊維ぼこりの
発生を完全にはなくすことができないため、IC
包装用のように高度の静電気防止性とほこり防止
性を要求される用途には不満足であることが判明
した。
Problems to be Solved by the Invention The present inventors considered that a bag made of a non-woven fabric containing anti-static fibers might be suitable for this purpose, and although this non-woven fabric has excellent anti-static properties, IC
It has been found that it is unsatisfactory for applications that require a high degree of antistatic and dustproof properties, such as packaging.

本発明は、このような状況に鑑み、制電性繊維
を含有する不織布を使用しながらも、上記のよう
な問題点を有しないIC包装用袋を提供すること
を目的になされたものである。
In view of this situation, the present invention was made for the purpose of providing an IC packaging bag that does not have the above-mentioned problems even though it uses a nonwoven fabric containing antistatic fibers. .

課題を解決するための手段 本発明のIC包装用袋は、制電性繊維を含有す
る不織布1の片面には金属薄層を含有する非繊維
系の内面層2を設け、他面にはプラスチツク層ま
たは紙層よりなる外面層3を設けた積層物の製袋
物からなることを特徴とするものである。
Means for Solving the Problems In the IC packaging bag of the present invention, a non-woven fabric 1 containing antistatic fibers is provided with a non-fibrous inner layer 2 containing a thin metal layer on one side, and a plastic layer on the other side. It is characterized by being made of a laminate bag having an outer layer 3 made of a layer or a paper layer.

以下本発明を詳細に説明する。 The present invention will be explained in detail below.

不織布1は、制電性繊維単独または制電性繊維
と通常の繊維とを繊維材料として、常法の不織布
製造法により取得される。繊維材料中の制電性繊
維の割合は0.1〜100%まで変化しうるが、0.1%
未満というように極端に少なくなると、静電気防
止効果が現れないようになる。
The nonwoven fabric 1 is obtained by a conventional nonwoven fabric manufacturing method using antistatic fibers alone or antistatic fibers and normal fibers as fiber materials. The proportion of antistatic fibers in the textile material can vary from 0.1 to 100%, but 0.1%
If the amount is extremely low, such as less than 20%, the antistatic effect will not be exhibited.

ここで制電性繊維としては、銅吸着繊維、金属
メツキ繊維、炭素複合繊維、金属蒸着繊維および
金属細線があげられ、特に最初の三者が好まし
い。
Examples of antistatic fibers include copper adsorption fibers, metal-plated fibers, carbon composite fibers, metal-deposited fibers, and thin metal wires, with the first three being particularly preferred.

不織布1の片面に積層する金属薄層を含有する
非繊維系の内面層2としては、たとえば、アルミ
ニウム箔、アルミニウム蒸着プラスチツクフイル
ム、ポリオレフイン被覆アルミニウム箔などがあ
げられる。
Examples of the non-fibrous inner layer 2 containing a thin metal layer laminated on one side of the nonwoven fabric 1 include aluminum foil, aluminum vapor-deposited plastic film, and polyolefin-coated aluminum foil.

不織布1の他面に積層するプラスチツク層また
は紙層よりなる外面層3としては、ポリオレフイ
ン、ポリアミド、ポリエステル、ポリ塩化ビニ
ル、ポリ塩化ビニリデン、ポリビニルアルコー
ル、エチレン―ビニルアルコール共重合体、ポリ
スチレン、ABS樹脂、セロハンをはじめとする
種々のプラスチツクの層または/および紙の層が
あげられる。
The outer layer 3 made of a plastic layer or a paper layer laminated on the other side of the nonwoven fabric 1 includes polyolefin, polyamide, polyester, polyvinyl chloride, polyvinylidene chloride, polyvinyl alcohol, ethylene-vinyl alcohol copolymer, polystyrene, and ABS resin. , various plastic layers including cellophane, and/or paper layers.

不織布1に対する内面層2および外面層3の積
層は、接着剤あるいはヒートシールにより貼り合
わせ法、溶融押出法、溶液または分散液コーテイ
ング法などによりなされる。
The inner layer 2 and the outer layer 3 are laminated onto the nonwoven fabric 1 by a bonding method using an adhesive or heat sealing, a melt extrusion method, a solution or dispersion coating method, or the like.

本発明のIC包装用袋は、内面層2/不織布
1/外面層3の層構成を有する積層物を製袋する
ことにより作製される。袋とは封筒状の薄手の袋
を言う。この袋にIC(LSIを含む)チツプやそれ
を実装した基板を収容する。
The IC packaging bag of the present invention is produced by bag-making a laminate having a layered structure of inner layer 2/nonwoven fabric 1/outer layer 3. A bag is a thin, envelope-like bag. This bag accommodates IC (including LSI) chips and boards on which they are mounted.

第1図は、このようにして作製されたIC包装
用袋における層配列を示した斜視図であり、一部
を切り欠き表示してある。
FIG. 1 is a perspective view showing the layer arrangement of the IC packaging bag produced in this manner, with a portion thereof being cut away.

作用および発明の効果 本発明のIC包装用袋にあつては、制電性繊維
を含有する不織布1が積層物の中間層を形成して
いて表面には現れていないにもかかわらず、良好
な静電気防止効果を発揮する。これは不織布を構
成する制電性繊維が、伝導による静電気防止作用
を有するだけでなく、無数にある繊維先端から自
己放電により瞬間的に静電気を逃がす作用を有す
るためであると考えられ、その作用は不織布表面
が他の層で覆われていてもそれほどは妨げられな
いのであると思われる。
Function and Effects of the Invention In the IC packaging bag of the present invention, although the nonwoven fabric 1 containing antistatic fibers forms the intermediate layer of the laminate and does not appear on the surface, it has good properties. Demonstrates static electricity prevention effect. This is thought to be because the antistatic fibers that make up the nonwoven fabric not only have an antistatic effect through conduction, but also have the ability to instantly release static electricity from the countless fiber tips through self-discharge. It seems that this is not hindered much even if the surface of the nonwoven fabric is covered with another layer.

また、本発明のIC包装用袋における静電気防
止効果は、周囲の雰囲気湿度が低い場合でもほと
んど低下しない。
Further, the antistatic effect of the IC packaging bag of the present invention hardly decreases even when the surrounding atmospheric humidity is low.

加えて本発明のIC包装用袋は、不織布の両面
が他の層で覆われているため、これらの層により
不織布1に起因する繊維ぼこりは完全に抑えられ
る。被覆層として紙層を用いた場合でも、外面層
3として使用したときは、繊維ぼこりの発生は問
題となるほどではない。
In addition, in the IC packaging bag of the present invention, since both sides of the nonwoven fabric are covered with other layers, fiber dust caused by the nonwoven fabric 1 can be completely suppressed by these layers. Even when a paper layer is used as the covering layer, when it is used as the outer surface layer 3, the generation of fiber dust does not become a problem.

さらに本発明のIC包装用袋は、不織布1を積
層単位として含んでいるためクツシヨン性を有
し、運搬時や貯蔵時の物理的衝激からも、収容物
であるICを有効に保護する。
Furthermore, since the IC packaging bag of the present invention includes the nonwoven fabric 1 as a laminated unit, it has cushioning properties and effectively protects the ICs contained therein from physical impact during transportation and storage.

このように本発明のIC包装用袋は、製造容易
な簡単な層構成を有しながらも、静電気防止性、
ほこり防止性および衝撃防止性を全て兼ね備えて
おり、IC保護の目的が効果的に達成できる。
As described above, the IC packaging bag of the present invention has a simple layer structure that is easy to manufacture, and has antistatic properties and
It has both anti-dust and anti-shock properties, effectively achieving the purpose of IC protection.

実施例 次に実施例をあげて本発明をさらに説明する。Example Next, the present invention will be further explained with reference to Examples.

実施例 1 ニツケルメツキ繊維5%、レイヨン50%、ポリ
エステル繊維45%よりなる繊維混合物から目付け
75g/m2の不織布1を製造した。
Example 1 Fabric weight from a fiber mixture consisting of 5% nickel fiber, 50% rayon, and 45% polyester fiber
A nonwoven fabric 1 of 75 g/m 2 was produced.

この不織布1の片面にアルミニウム箔を接着剤
を用いて貼合することにより内面層2を形成し、
他面には厚み20μのポリエチレンフイルムを接着
剤を用いて貼合することにより外面層3を形成し
た。
An inner layer 2 is formed by bonding aluminum foil to one side of the nonwoven fabric 1 using an adhesive,
On the other side, an outer layer 3 was formed by laminating a 20 μm thick polyethylene film using an adhesive.

このようにして得られた3層構成の積層物を裁
断、貼合して20cm×20cmの大きさの封筒を作成
し、この封筒を用いてMOS型IC製造ラインにお
ける半導体の包装に供したところ、静電気障害、
ほこりの付着および物理的衝撃によるICの不良
品率は1ケ月の平均で0.01%以下と極めて低かつ
た。この不良品率は、現行の通常の不良品率より
格段に小さいものである。
The thus obtained three-layered laminate was cut and pasted together to create an envelope measuring 20cm x 20cm, and this envelope was used to package semiconductors on a MOS IC manufacturing line. , static electricity hazard,
The rate of defective ICs due to dust adhesion and physical shock was extremely low, averaging less than 0.01% per month. This defective product rate is much smaller than the current normal defective product rate.

実施例 2 外面層3としてポリエチレンフイルムに代えて
坪量60g/m2の紙を用いたほかは実施例1と同様
にして3層構成の積層物を得、封筒を作成した。
Example 2 A three-layer laminate was obtained and an envelope was made in the same manner as in Example 1, except that paper with a basis weight of 60 g/m 2 was used as the outer layer 3 instead of the polyethylene film.

この封筒を用いてMOS型IC製造ラインにおけ
る半導体の包装に供したが、ICの不良品率は1
ケ月の平均で約0.01%と小さいものであつた。
This envelope was used to package semiconductors on a MOS IC manufacturing line, but the defective rate of ICs was 1.
The monthly average rate was small at about 0.01%.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明のIC包装用袋における層配
列を示した斜視図であり、一部を切り欠き表示し
てある。 1…不織布、2…内面層、3…外面層。
FIG. 1 is a perspective view showing the layer arrangement in the IC packaging bag of the present invention, with a portion thereof being cut away. 1... Nonwoven fabric, 2... Inner layer, 3... Outer layer.

Claims (1)

【特許請求の範囲】[Claims] 1 制電性繊維を含有する不織布1の片面には金
属薄層を含有する非繊維系の内面層2を設け、他
面にはプラスチツク層または紙層よりなる外面層
3を設けた積層物の製袋物からなるIC包装用袋。
1. A laminate in which a non-woven fabric 1 containing antistatic fibers is provided with a non-fibrous inner layer 2 containing a thin metal layer on one side, and an outer layer 3 made of a plastic layer or paper layer on the other side. IC packaging bags made of bag-made products.
JP57047761A 1982-03-24 1982-03-24 Laminated structure Granted JPS58163649A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57047761A JPS58163649A (en) 1982-03-24 1982-03-24 Laminated structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57047761A JPS58163649A (en) 1982-03-24 1982-03-24 Laminated structure

Publications (2)

Publication Number Publication Date
JPS58163649A JPS58163649A (en) 1983-09-28
JPH0232981B2 true JPH0232981B2 (en) 1990-07-24

Family

ID=12784348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57047761A Granted JPS58163649A (en) 1982-03-24 1982-03-24 Laminated structure

Country Status (1)

Country Link
JP (1) JPS58163649A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58169706A (en) * 1982-03-30 1983-10-06 鍛治 静枝 Conductive structure
JP2014168609A (en) * 2013-03-05 2014-09-18 Hitachi Systems Ltd Electronic equipment package

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5241084A (en) * 1975-09-27 1977-03-30 Toray Industries Container of composite material
JPS5634449A (en) * 1979-08-30 1981-04-06 Mitsubishi Rayon Co Electromagnetic shielding material

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5241084A (en) * 1975-09-27 1977-03-30 Toray Industries Container of composite material
JPS5634449A (en) * 1979-08-30 1981-04-06 Mitsubishi Rayon Co Electromagnetic shielding material

Also Published As

Publication number Publication date
JPS58163649A (en) 1983-09-28

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