JPH02326A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve durability and reliability by setting the average voltage of conductor joined with an insulating layer with respect to the average potential of conductor joined with a semiconductor layer, in the direction to block the carrier supply from the conductor to the semiconductor layer. CONSTITUTION:A semiconductor device is constituted of a first wiring layer 101, an insulating layer 102, an I-type semiconductor layer 108, an N<+> type semiconductor layer 104 and a second wiring layer 110. By making the average voltage of the wiring layer 101 higher than the average voltage of the wiring layer 110, the carrier supply from the wiring layer 101 to the semiconductor layer 103 is blocked. By this constitution, the semiconductor layer 103 contributes to insulation together with the insulating layer 102, and the thickness of the insulating layer is effectively thickened. As a result, even if the insulating layer 102 locally becomes thin, intense electric field is not generated there, so that the insulation between both conductors and durability are improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to semiconductor devices such as optical sensors, and particularly to improving the insulation between conductors laminated with semiconductor layers interposed therebetween.

[Conventional technology]

In recent years, multiple thin film semiconductor elements' (i-V
Technology has been developed to achieve this. For this reason, a plurality of intersections are required for wiring between elements.

In particular, liquid crystal displays use thin film transistors (TPTs).
) Gold 1 (LO00 pieces or more, 8 sensor elements per piece for A4 reading size pear line sensor, that is 172
It is necessary to form eight original sensor elements and TFTs corresponding to each sensor element on the same substrate.

For this reason, more intersections are required for wiring between elements. For example, when matrix wiring is employed to reduce the number of TPTs and downsize the device Th, the number of intersections becomes 10,000 or more.

To form such a large number of intersections, in order to simplify the process and reduce costs, it is possible to use the semiconductor layer or insulating layer that constitutes the device without removing the dedicated insulating gold film. A configuration in which the intersections are insulated is preferably adopted.

FIG. 5 (4) is a schematic plan view of an example of a semiconductor device;
Figure (B) is a schematic sectional view taken along the line I-I, and for convenience of explanation, some of the other attached parts are also shown.

Since the present invention is suitably used in a contact type photoelectric conversion device using a photoconductive line sensor that uses electrons as carriers, it will be explained based on an example of the device shown in FIG. Here, IJ wiring is used for the signal readout system. As shown, a common wiring M4 is placed on the board l.
and a shield wiring lit, on which an insulating layer 5,
An intrinsic semiconductor layer (hereinafter referred to as "one layer") 6 and an n-layer 7 for ohmic contact are laminated.

Then, an individual electrode wiring 8 from the optical sensor 9 is formed, and a connection metal is made through the common wiring 1fij4 and the contact hole 10bt''.

In such matrix wiring, the shield arrangement
A constant positive voltage W is applied to by the power supply Va. This is to prevent crosstalk caused by capacitive coupling between the common lines 4.

Further, the common wiring 4 is connected to a current-voltage conversion circuit (not shown) composed of an operational amplifier or the like, and the photocurrent from the photocell 9 is converted into a voltage and output to the outside. Note that the common wiring 4 in this configuration is set to the ground potential and all reference potentials.

[Problem to be solved by the invention]

However, as a result of numerous experiments conducted by the present inventors, it has been found that the above semiconductor device has the following problems.

FIG. 6 is a schematic cross-sectional view taken along n-us in FIG. 5(4).

As described above, the shield arrangement 11 is supplied with a positive voltage by the t source Va, and the individual electrode arrangement IR8 is connected to the common wiring 4, so that the reference voltage is approximately the ground voltage. That is, in FIG. 6, the shield arrangement +! 1111
is at a higher potential than the individual electrode wiring 8.

In this state, since the individual electrode wiring +18 has a lower potential than the shield wiring 11, electrons can be supplied from here to the first layer 6 through the entire first layer 7, and the electrons pass through the third layer 7 and the first layer 6 to the insulating layer side. Move to.

For this reason, if the insulating layer 5 has defects or is locally thinned due to variations in the manufacturing process, the electric field in that area will become stronger, potentially causing dielectric breakdown during operation. In addition, the electric field between arrows A in the figure also becomes stronger, and if impurity ions, water, etc. are present on the side surface of the insulating layer 5 and the surface of the arrangement s11, the lower layer arrangement l
It has been found that there is a problem in that the possibility of wire breakage due to melting of the wire increases.

In addition, since the insulation depends on the thickness of the insulating layer 5, over-etching 19 during manufacturing tends to cause a drop in electrical withstand voltage, leading to a reduction in yield and reliability. It also had

Such a problem occurs not only at the intersection of the shield wiring 11 and the individual electrode wiring 8, but also at the wiring to which positive electric current is applied by the power supply vb! This also occurs at the intersection 22' of the wire 22 and the grounded wiring 22' (see FIG. 5 (4)).

[Means to solve all problems]

In the semiconductor device according to the present invention, two conductors face each other with a laminate consisting of an insulating layer and a semiconductor layer sandwiched therebetween, and a second conductor connected to the insulating layer has an average potential of a first conductor connected to the semiconductor layer. The first conductor is characterized in that the average potential of the conductor is in a direction that blocks the supply of carriers that can be supplied from the first conductor to the semiconductor layer.

However, the semiconductor device according to the present invention includes a plurality of charge conversion elements each having a semiconductor layer for photoelectric conversion on a substrate and an individual electrode electrically connected to the semiconductor layer for photoelectric conversion, and a plurality of charge conversion elements having an electrical connection to the charge conversion element. In the entire semiconductor device, the intersecting portions of the matrix wiring connected to each other, the wiring provided between the matrix wirings and held at a constant potential, and the individual electrodes and the wiring held at a constant potential are It is characterized in that the semiconductor layer and the insulating layer are completely provided, and the average potential of the individual electrodes is a potential that completely blocks the supply of carriers that can be supplied to the semiconductor layer.

[Effect]

In the present invention, by setting the average potential of the first and second conductors as described above, the semiconductor layer also contributes to insulation together with the insulating layer, and the layer that functions as the insulating layer can be made substantially thicker. can.

For this reason, even if the insulating layer is locally thin, no strong electric field is generated there, and the insulation and durability between both conductors are significantly improved compared to before, making it possible to create highly reliable semiconductor devices. can be provided.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

First, embodiments of the present invention will be described.

One of the preferred embodiments of the present invention has a conductive layer forming two wirings that are tangential to each other through a laminate consisting of an insulating layer and a semiconductor layer, and each conductive layer has an average potential of at least one There is a semiconductor device configured such that the direction prevents the supply of carriers to the semiconductor layer.

For example, as shown in FIG. 1 (4), the first
The arrangement 1R1o1. insulating layer 102, l-type semiconductor layer 103,
n-type semiconductor layer 104, second layer Ml as a conductive layer
In the case of a semiconductor device having the entire configuration of 10, the potential is set to be lower than that of the first wiring 1O1t and the second wiring 110.

Note that if the semiconductor layer 104 is a P+ type layer, the first
The wiring 101 may be set at a higher potential than the second wiring 110.

As shown in FIG. 1(B), the first arrangement! It has a structure consisting of a p+1% insulating layer p+2, an l-type semiconductor layer p+3, and a second wiring 210, and the second wiring 210 is made of At or Cr and acts as a shield barrier against i/il p+3.
In the case of a semiconductor device to be formed, the first wiring p+1 may be set at a higher potential than the entire second wiring 210.

As explained above, the average potential of the conductive layer can be appropriately selected depending on the structure, conductivity type, carrier concentration, etc. of the semiconductor layer.

Next, one of the most preferred embodiments to which the present invention is applied will be described in detail with reference to the drawings.

FIG. 2(4) is a schematic plan view of one embodiment of the semiconductor device according to the present invention, and FIG. 2(B) is a schematic sectional view of the I-ILIS thereof.

This embodiment is a contact type photoelectric conversion device, in which a plurality of photoconductive sensors used as electron carriers are all used as line sensors arranged vertically in the plane of the paper in FIG. 4 (4). However, in the figure, only the configuration for 2 bits is shown for simplification.

[Preparation of Sample 1] As shown in each figure, 0.1 μm of AA/Cr was deposited on a cleaned glass plate 1 as a transparent insulating substrate by vacuum deposition, and then a resist pattern was completely formed by photolithography. Wet etching is performed to form the light-shielding layer 2 in which the illumination window 3 is present, the wiring 22' for fixing the light-shielding layer 2 to the ground potential, and the matrix individual electrode wiring 23, and then 5IH4 using plasma CVD method is etched thereon. NH,
A transparent insulating layer 5't' made of silicon nitride was formed to a thickness of 0.3 μm by RF glow discharge using gas as a film forming raw material.

Subsequently, a layer 6 of a-St or the like, which will become a photoconductive layer, was formed to a thickness of 1 μm as a raw material for forming a 5IH4 gas gold film.

Furthermore, an n layer of 7'kO for ohmic contact was laminated to a thickness of 1 μm as a raw material for forming a gold film using 5IH4 gas and PH3 gas.Then, photolithography was used to form resist turns, and reactive etching was performed using dry etching using CF4 gas gold. Ion etching was performed to partially remove the n-soil layer 7, layer 6, and insulating layer 5 to form contact holes 10b and 10e'i.

Thereafter, At'k was deposited to a thickness of 1.0 μm using a vacuum deposition method, and then a resist layer was deposited using photolithography.
4 turns were formed and wet etching was performed to partially remove the Ati. Further, the n layer was removed by dry etching to form upper layer wirings 4, 11, 8, 22, etc. Furthermore, each element was separated independently by dry etching similar to the above.

Finally, a transparent protective film 15 made of polyimide and epoxy resin was formed to complete the process.

In this way, a photoelectric conversion device according to the present invention was created.

This photoelectric conversion device includes electrodes 8 at both terminals of the optical sensor 9, and wiring 22 for supplying positive voltage from the power source vb to the optical sensor 9.
, a matrix common wiring 4, and a shield wiring 11, and a positive voltage is applied to the shield wiring 11 from a power source Va to prevent crosstalk.

Further, the individual electrode wiring [23 from each optical sensor 9 is connected to the common wiring 4 through the entire contact hole 10b to form a matrix wiring.

Further, the insulating layer 5, 1 layer 6 and n+ layer 7 between the common wiring 1R4 and the shield wiring 11 are etched away.

[Preparation of Sample 2] Sample 2 was prepared using the same method as Sample 1 described above. Sample 2 is a photoelectric conversion device shown in FIG. 5 as described above, and sample 1 is different from sample 1 in that the matrix common wiring 4, shield wiring 11, individual 1m wiring 23, and wiring 22, 22' are all upside down. All layers were formed using the same film formation and etching methods as Sample 1.

Here, the operation of the contact type image sensor will be briefly explained with reference to FIG. 2(B).

The present embodiment is brought into close contact with a document 17 to be read using a roller 16 or the like, and an illumination window 3 is illuminated from a light source (not shown).
The original is irradiated onto the original 17 through the entire process.

When the reflected light enters the optical sensor 9, the resistance value of one layer 6 of the optical sensor 9 changes according to the strength of the incident light, and the signal of the direction of the original 17 is converted into an electrical signal.

The output signal of the optical sensor 9 appears on the common wiring 4 through the gate wiring 23t-, and is output to the outside through a current-voltage conversion circuit (not shown).

[Experiment I]

As an example of a case where the voltage applied to the shield wiring is constant and the positions of the shield wiring and the individual electrode wiring are different, the following experiment was conducted on the prepared plural samples 1 and plural samples 2.

First, at an environmental temperature of 80°C and an environmental humidity of 85%, 5V was applied to each shield wiring 911 of Sample 1 and Sample 2.
While observing the intersection 23' with a full microscope with a full voltage of 3V applied across the individual electrodes Iw23, the Samples or Rano output signals were observed even when light was input to photoelectric conversion.

As a result, in Sample 2, corrosion occurred in all of Sample 2 150 hours after the start of the experiment, and the output signal was disturbed.

However, in Sample 1, disturbances in the output signal due to corrosion were first observed after 500 hours had elapsed.

[Experiment■]

Next, another experiment was conducted using a plurality of samples 2 prepared as an example in which the positions of the shield wiring and the individual electrode arrangement were the same.

First, under an environment temperature of 80° C. and an environment humidity of 85%, a voltage of 3V is applied between the individual electrodes @ 23, and the voltage values i0V and 3V are applied to the shield wiring 11.

5V, the output signal was observed while observing the intersection 23'.

The results are shown below.

As described above, good results were obtained for Sample 2-1 and Sample 2-2 according to the present invention.

[Experiment■]

Furthermore, another experiment was conducted using the plurality of prepared samples 2. All withstanding voltage tests were conducted by changing the direction of the voltage applied to the individual electrode wiring 23 and the shield wiring 11.

As a result, the potential between the individual electrodes a23 changes to the shield wiring 11.
The withstand voltage was 30V when the potential was higher than that of .

On the other hand, when the potential of the individual electrode wiring 23 was lower than the potential of the shield wiring 11, the withstand voltage was 250V.

The contact type photoelectric conversion device according to the present embodiment described above is suitably used in, for example, a facsimile machine.

FIG. 3 is a schematic configuration diagram of a facsimile machine using the photoelectric conversion device according to the above embodiment.

In the figure, when transmitting a document, a document 1p+5 is pressed onto a contact image sensor 1p+1 as a photoelectric conversion device by a platen roller 12-03, and is moved in the direction of the arrow by a platen roller 1p+3 and a feeding roller 1p+4. The surface of the original is a xenon lamp 1p+, which is the light source.
2, the reflected light enters the sensor 1p+1, is converted into an electrical signal corresponding to the image information of the document, and is transmitted.

Also, when receiving, the recording paper 1p+6 is placed on the platen roller 1.
The thermal head 1p+8 reproduces an image corresponding to the received signal.

The entire device is controlled by a controller on a system control board 1p+9, and power is supplied to each of the percussion systems and each circuit from a power source 121O.

The photoelectric conversion device according to the present invention is added to the facsimile machine described above.
As a result of image communication with all the devices installed, the communication images were maintained well even when used for a long time.

Hereinafter, the operation according to the present invention in the fixation type photoelectric conversion device of the present embodiment described above will be explained.

FIG. 4 is an enlarged schematic cross-sectional view of the shield wiring 110 portion in FIG. 2(B).

According to this embodiment, as described above, the shield wiring 11
A positive voltage is applied from @@Va. Also,
The individual electrode wiring 23 is a wiring through which the output signal of the optical sensor passes, and its reference potential is set to the ground potential. Therefore, the average potential of the individual electrode wiring 23 is lower than that of the shield wiring 11.

For this reason, layer 1 6 becomes depleted of electrons, and even if holes are generated, they cannot move between the n+10 layer and layer 1 6, so layer 1 6 functions as an insulator. That is, the substantial thickness of the insulating layer in this example is the insulating layer 5 and the first layer 6.
This results in a total thickness of 1.5 mm, and both insulation properties and durability are significantly improved compared to conventional ones. In other words, to give an example, even if the insulating layer 5 is over-etched during manufacturing or is formed thin locally, the withstand voltage due to the over-etched portion 19 is There is no decline, -! It is possible to completely prevent dielectric breakdown caused by electric field concentration on the thin portion 24.

Furthermore, since the actual insulating layer is thicker, the electric field between the arrows 8 in the figure becomes weaker than before, and as a result, the promotion of electrolysis on the side surfaces of the insulating layer 5 and the first layer 6 is suppressed. This can prevent the wiring 23 from melting. Similarly, since the intersection of the wires 22 and 22' in FIG. 2(4) has the same structure, the insulation and durability between the rain wires can be improved. Therefore, even if there are a large number of wiring intersections throughout the device, such as in such a photoelectric conversion device, high reliability can be obtained according to the present invention.

Although this embodiment has the configuration shown in FIG. 2, it is not limited thereto. As mentioned above, for example, even if the shield wiring 11 and the individual electrode wiring 8 have an intersection shown in FIG. 5, if the polarity of the power supply V& can be reversed in the circuit configuration, If a low average potential is applied to the wiring 8, the layer 6 becomes depleted of electrons, which are carriers, and even if holes are generated, they cannot move between the n+10 layer and the 1st layer 6, so the 1st layer 6 becomes It functions as an insulator, and the same effect as this example can be obtained.

Furthermore, as mentioned above, if an ohmic contact layer 7p+ layer is formed all around the optical sensor that uses holes as carriers, the relationship of the potential with the counter electrode at the wiring intersection will be as shown in Figure 5. When the relationship between the shield arrangement ll and the individual electrode wiring 8 is as shown in FIG.
Since no movement is possible between the middle layer and the first layer, the first layer 6 functions as an insulator, and the same effect as in this embodiment can be obtained.

As mentioned above, if a material that forms a Schottky barrier between the first layer 6 and at least one carrier of electrons or holes is used as the entire electrode, the n+ layer and p layer will be unnecessary. By setting the average potential between the electrode and the counter electrode in such a direction as to completely block the supply of carriers that can be supplied to all five layers, the same effect as in this embodiment can be obtained.

Further, in this embodiment, the structure includes iN gold, but the present invention is not limited to this. In summary, if the average potential of the counter electrode for any semiconductor layer is in a direction that blocks the supply of carriers that could be supplied to some or all of the semiconductor layers, at least The layer whose supply is completely blocked functions as an insulator, and the same effects as in this embodiment are obtained, thereby achieving the object of the present invention.

Further, in this embodiment, a direct current voltage is applied to the shield wiring 11, but the invention is not limited to this; it has a similar laminated structure, and a pulsed voltage is applied to the wiring in the upper and lower layers. Even in this case, if the average potential is set as described above, the same effect as that of this embodiment can be obtained.

Further, the present invention is particularly preferably applicable to a contact type photoelectric conversion device such as the present embodiment, but is not limited thereto, and the present invention is applicable to general semiconductor devices having a multilayer structure that requires an insulating region. In other words, by applying the present invention to an information processing device such as a facsimile machine, it is possible to improve yield at low cost and realize a highly reliable information processing device.

〔Effect of the invention〕

As explained in detail above, the semiconductor device according to the present invention has
By setting the average potential of the first and second conductors in a direction that blocks the supply of carriers that could be supplied from the first conductor to the semiconductor layer, the semiconductor layer as well as the insulating layer contributes to the insulation. The thickness increases substantially.

For this reason, even if the insulating layer becomes locally thin, no strong electric field is generated there, and the insulation and durability between both conductors are significantly improved compared to before, making the device highly reliable and durable. Become.

[Brief explanation of the drawing]

FIG. 1(4)(B) is a schematic cross-sectional view showing a preferred embodiment of the present invention. FIG. 2(4) is a schematic plan view of one embodiment of the semiconductor device according to the present invention, and FIG. 2(B) is a schematic cross-sectional view along m-mm. FIG. 3 is a schematic configuration diagram of a facsimile machine using the photoelectric conversion device according to the above embodiment. FIG. 4 is a schematic cross-sectional view showing an enlarged portion of the shield wiring 11 in FIG. 2(B). Figure 5 is a schematic plan view of an example of a semiconductor device.
B) is a schematic cross-sectional view of I-1#j. FIG. 6 is a schematic cross-sectional view taken along n-us in FIG. 5(4). 101. p+1: first wiring, 102. p+2: insulating layer, 103. p+3: i-type semiconductor layer, 1o4: n-type semiconductor layer, 110.210: second wiring.

Claims (11)

[Claims] (1) The average potential of the second conductor bonded to the insulating layer with respect to the average potential of the first conductor bonded to the semiconductor layer, where the conductors face each other with a laminate consisting of an insulating layer and a semiconductor layer interposed therebetween. is in a direction that blocks the supply of carriers that can be supplied from the first conductor to the semiconductor layer. (2) The semiconductor device according to claim 1, wherein the semiconductor layer has an i layer and an n^+ ohmic contact layer, and the average potential of the first conductor is higher than the average potential of the second conductor. (3) The semiconductor device according to claim 1, wherein the semiconductor layer has an i-layer and a p^+ ohmic contact layer, and the average potential of the first conductor is lower than the average potential of the second conductor. (4) The semiconductor device according to claim 1, wherein the first conductor forms a Schottky barrier with respect to the semiconductor layer. (5) The semiconductor device according to claim 1, wherein the semiconductor layer is made of hydrogenated amorphous silicon. (6) A plurality of photoelectric conversion elements having a semiconductor layer that performs photoelectric conversion on a substrate, an individual electrode electrically connected to the semiconductor layer that performs photoelectric conversion, and a matrix wiring electrically connected to the charging conversion element. , a wiring provided between the matrix wirings and held at a constant potential, in which a portion where the individual electrode and the wiring held at a constant potential intersect is provided with a semiconductor layer and an insulating layer sandwiched therebetween. A semiconductor device, wherein the average potential of the individual electrodes is a potential that prevents the supply of carriers that can be supplied to the semiconductor layer. (7) The intersecting portion includes the individual electrode, the semiconductor layer provided on the individual electrode via the insulating layer, and the wiring provided on the semiconductor layer via the n^+ layer. 7. The semiconductor device according to claim 6, wherein the average potential of the individual electrodes is lower than the potential of the wiring. (8) The intersecting portion includes the individual electrode, the semiconductor layer provided on the individual electrode via the insulating layer, and the wiring provided on the semiconductor layer via the p^+ layer. 7. The semiconductor device according to claim 6, wherein the average potential of the individual electrodes is higher than the potential of the wiring. (9) The intersecting portion is between the wiring, the semiconductor layer provided on the wiring via the insulating layer, and the n^+
7. The semiconductor device according to claim 6, further comprising the individual electrodes provided through layers, and the average potential of the individual electrodes is higher than the potential of the wiring. (10) The intersecting portion is between the wiring and the semiconductor layer provided on the wiring via the insulating layer, and the p^
7. The semiconductor device according to claim 6, further comprising the individual electrodes provided through a + layer, and the average potential of the individual electrodes is lower than the potential of the wiring. (11) The semiconductor device according to claim 6, wherein the semiconductor layer is made of hydrogenated amorphous silicon.