JPH02312278A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To easily improve a semiconductor device of this design in degree of integration without being restricted by a resolution limit and the performance of transistors by a method wherein a groove is used, a source.drain region is formed in a self-aligned manner, and the transistors are three-dimensionally arranged. CONSTITUTION:A well is formed on an Si substrate 1, then two or more grooves 8 are provided, and an SiO2 film 3 is formed on the side walls 8a of the grooves 8 respectively. A source.drain region 4 is formed on the part between the grooves 8 and the base of the groove 8 which are not covered with the SiO2 film 3, the SiO2 film 3 is removed from the side wall 8a, and the gate oxide film 5 is formed. Then, a gate electrode 6 is formed by patterning on the gate oxide film 5 in the direction vertical to the groove 8. Next, when data are written in the memory array concerned, a photoresist 7 is formed on the surface of the memory array, an opening is provided to the photoresist 7 on an object transistor, and then ions are implanted. By this setup, a semiconductor device of this design can be improved in degree of integration free of the photo resolution and the performance of transistors.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a method for manufacturing a semiconductor device, and particularly to a technique for increasing integration.

<Prior art> In a method of manufacturing semiconductor devices such as memories, in order to increase the degree of integration, first a plurality of source/drain regions are formed in parallel, and a plurality of gate electrodes are formed perpendicularly to the source/drain regions. Therefore, a method has been adopted in which transistors are arranged in a grid pattern. FIG. 2 shows a cross-sectional structure of a semiconductor device manufactured by this method, and FIG. 3 shows its A-A' cross-sectional structure. A plurality of source/drain regions 4 are formed in parallel on the St-based Fi+, a gate oxide film 5 is formed on the surface, and a plurality of parallel gate electrodes 6 are formed thereon in a direction perpendicular to the source/train regions 4. It is formed.

<Problem to be solved by the invention> In the conventional method of increasing the integration of semiconductor devices,
The miniaturization of patterns is limited by the resolution of the photo and the ability of the transistor, and it has been impossible to miniaturize the pattern beyond the resolution limit of the photo.

Means for Solving the Problems> In order to solve the problem L, in the method for manufacturing a semiconductor device according to the present invention, a plurality of grooves are formed in a semiconductor substrate, a protective film is formed on the side surface of the grooves, Source/drain regions are formed between the trenches and at the bottom of the trenches, a gate oxide film is formed on the source/drain regions, and a gate electrode is formed on the gate oxide film so as to be orthogonal to the trenches. It is characterized by

<Operation> In the method for manufacturing a semiconductor device according to the present invention, a plurality of grooves are formed in parallel on the surface of a semiconductor substrate, and then a protective film is formed on the side surfaces of the grooves, and then the grooves are formed in a self-aligned manner. By forming a source/drain region between the source and drain regions and at the bottom of the trench, and by forming a plurality of gate electrodes perpendicular to the gate electrode, the side wall of the trench is used as a gate region, and transistors are arranged three-dimensionally. High integration is possible without increasing photo resolution or reducing transistor performance.

<Example> FIG. 1 shows a cross-sectional structure at each stage of the manufacturing method of the present invention. In the figure, 1 is a silicon substrate, 2 is a well, and 3 is a silicon substrate.
4 is a SiO□ film, 4 is a source/drain region, 5 is a gate oxide film, 6 is a gate electrode, 7 is a photoresist I·, and 8 is a groove.

(For Al, after forming a well 2 to a depth of 1.5 μm or more on a Si substrate 1, grooves 8 having a width and depth of about 1.0 μm are formed at intervals of 0.5 to 1.0 μm.

In (b), 5iozJI layer 3 is formed on the side surface 8a of the groove 8 using chemical vapor deposition and anisotropic etching. This SiO□ film 3 forms a protective film against ion implantation in a later process.

(In C1, the source/drain regions 4 are formed by ion implantation between the trenches 8 not covered with the S + 02 film 3 and at the bottom of the trenches 8, and the
After removing the film 3, a gate oxide film 5 is formed in a high temperature oxygen atmosphere.

(In dl, the gate electrode 6 is patterned and formed on the gate oxide film 5 in the direction perpendicular to a8 using photolithography and etching techniques. (el is the [3-13' cross-sectional structure at the stage of (dl) It shows.

A memory cell array is completed through the above steps.

After that, when writing information to this memory cell array, as shown in ff), a photoresist is formed on the surface, and a photoresist 7 is formed on the target transistor.
After forming an opening using photolithography, ions are implanted.

<Effects of the Invention> As explained above, in the present invention, source/drain regions can be formed in a self-aligned manner by using grooves, and photolithography solutions can be improved by arranging transistors three-dimensionally. High integration can be easily achieved without being limited by image limits or reducing transistor performance.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a cross-sectional structure of an embodiment of the present invention, and FIGS. 2 and 3 are diagrams showing a cross-sectional structure of a conventional example. 1...Si substrate 2...well 3...5iOz film 4...source/drain region 5...gate oxide film 6...gate electrode 7...photoresist 8...groove

Claims (1)

[Claims] A plurality of trenches are formed in a semiconductor substrate, a protective film is formed on the side surfaces of the trenches, source/drain regions are formed between the trenches and at the bottom of the trenches, and a gate oxide film is formed on the source/drain regions. A method of manufacturing a semiconductor device, comprising forming a gate electrode on a gate oxide film so as to be perpendicular to the groove.