JPH02312090A - Synchronous operating device for tape equipment - Google Patents

Abstract

PURPOSE:To perform synchronous operation with stable accuracy by decoding time codes from an equipment for a master tape and a slave tape equipment and performing variable speed control over the slave tape equipment so that their start positions match coincide with each other. CONSTITUTION:The time code signal 1a outputted by the master tape equipment 1 and the time code signal 2b outputted by the slave tape equipment 2 are inputted to the synchronous operating device 3. The signals 1a and 2a are decoded by decoding circuits 4 and 7 in the operating device 3 into pieces of time information. Then, an arithmetic circuit 6 performs time difference arithmetic including a synchronism offset value between both the equipments 1 and 2 and output advance or delay control signals 6a and 6b. Those signals 6a and 6b are passed through a variable speed control circuit 7 to generate a variable speed control signal 7a, thereby controlling the tape speed of the equipment 2. The accuracy of the synchronous operation between the equipments 1 and 2 is reached in the minimum time unit of time codes and the synchronous operation is performed with stable accuracy.

Description

[Detailed description of the invention] [Industrial application field]

This invention provides a digital audio tape recorder,
The present invention relates to a synchronous operation device for tape devices for synchronously operating a plurality of tape devices such as video tape recorders.

[Conventional technology]

FIG. 6 is a block diagram showing a conventional synchronized operation device for a tape device. In the figure, 1 is a master tape device, la is a time code signal reproduced from the master tape of the master tape device 1, and 2 is a slave tape. 2a is a time code signal reproduced from the slave tape of slave tape device 2; 3 is a synchronous operation device; 4 and 5 are decoding circuits for decoding each time code signal 1a, 2a;
6 is an arithmetic circuit to which the decoded time code is added; 6a is an advance speed control signal obtained from the arithmetic circuit 6;
Similarly, b is a lagging speed control signal, 7 is a variable speed control circuit to which leading and lagging speed control signals 6a and 6b are applied, 7a
is a variable speed control signal that is output from the variable speed control circuit 7 and controls the speed of the slave tape of the slave tape device 2. FIG. 7 shows the data format of the time code signals 1a and Lb. One block consists of 80 bits, and a synchronization mark is placed at the beginning. Hereinafter, the time is 9 minutes 2 seconds,
Data indicating frames and the like are each arranged with a predetermined number of bits. Next, the operation will be explained. Time code signal 1 output from master tape device 1 when both master tape device 1 and slave tape device 2 are in playback operation state.
a and the time code signal 2a output from the slave tape device 2 are input to the synchronous operation device 3. Each time code signal 1a. 2a is decoded into time information as shown in FIG. 7 by the decoding circuits 4 and 5 in the synchronized operation device 3, and then the calculation circuit 6 performs time difference calculation including the synchronization offset value between the two modulators. , the advance speed control signal 6a as its output signal.
Alternatively, the delayed speed control signal 6b is output. This advance speed control signal 6a or lag speed control signal 6b is passed through a variable speed control circuit 7 as a variable speed control signal 7a to control the tape speed of the slave tape device 2. in this case,
The synchronized operation accuracy of both devices reaches the minimum time unit of time code (1 time code bit).

[Problem to be solved by the invention]

Conventional synchronized operation devices for tape devices are configured as described above, so the difference in time codes from both devices cannot be recognized below the minimum time unit (time code bit) of the time code, so the synchronized operation The accuracy is limited to one time code bit, and the time code includes time fluctuations due to tape running, so there are problems such as the inability to stably perform synchronized operation with less than the sample clock signal cycle accuracy. There was a point. This invention was made in order to solve the above-mentioned problems, and it provides a synchronized operation device for tape equipment that can stably perform synchronized operation with less than the sample clock signal cycle accuracy. The object of the present invention is to obtain a synchronous operation device for tape equipment capable of synchronous operation with an accuracy of .

[Means to solve the problem]

The synchronous operation device for tape devices according to claim 1 of the present invention includes variable speed control that is performed based on time code signals from the master tape device and the slave tape device so that the time difference value between the two devices becomes zero. , synchronized operation is performed using a reproduction synchronization signal and a sample clock signal from both tape devices that do not involve time fluctuations. The synchronous operation device for tape devices according to claim 2 of the present invention includes variable speed control that is performed based on time code signals from the master tape device and the slave tape device so that the time difference value between both devices becomes zero. , using a detection signal with a cycle shorter than the minimum time unit (timecode bit) cycle in the two timecode signals, the start point of the timecode bit from the master tape device and the time from the slave tape device are detected. The phase difference with the starting point of the code bit is detected, and the slave tape device is controlled at variable speed based on the phase difference.

[Function] The synchronous operation device for tape equipment according to the invention of claim 1 has the following features:
For example, the start point position of the playback synchronization signal from the master tape device is set within a window area that is less than or equal to l sample clock signal period, which is set around the start point position shifted by the sample offset value from the start point of the playback synchronization signal from the slave tape device. Perform variable speed control on the slave tape device to match. The synchronous operation device for tape equipment according to the invention of claim 2 includes:
For example, the phase difference is detected at less than l time code bits, and the slave tape device is controlled at variable speed so that the time difference and phase difference are minimized.

【Example】

A first embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, parts corresponding to those in FIG. 6 are denoted by the same reference numerals, and explanations thereof will be omitted. In FIG. 1, 1b is a reproduction synchronization signal obtained from, for example, reproduction data on the master tape device side, IC is a sample clock signal for reproducing data recorded on the master tape, which is applied from master tape device 1 to slave tape device 2, and 2b 2c is a sample clock signal for reproducing data recorded on the slave tape from the slave tape device 2, and 8 is a reproduction synchronization signal 2b and a sample clock signal obtained from the playback data on the slave tape device side.
Window generation circuit 8a to which clock signal 2c is applied
is the sample offset instruction value N given to the window generation circuit 8, 8b is the window signal output from the window generation circuit 8, and 9 is the wind signal 8b and the reproduction synchronization signal 1.
9a is an advance speed control signal obtained from the phase difference detection circuit 9 for less than 1 time code bit, and 9b is a delay speed control signal for less than 1 time code bit. . Leading speed control signals 6a, 9a and lagging speed control signals 6b, 9b are applied to the variable speed control circuit 7. Figure 2 shows reproduction synchronization signals 1b, 2b and wind signal 8b.
3 is a timing chart showing a phase difference detection operation according to FIG. Next, the operation will be explained. When the master tape device 1 and the slave tape device 2 are in the reproduction operation state, the time code signal 1a output from the master tape device 1 and the time code signal 2a output from the slave tape device 2 are input to the synchronized operation device 3. . Each time code signal 1a, 2a is decoded by the decoding circuits 4 and 5 in the synchronized operation device 3 into time information as shown in FIG. A time difference calculation is performed, and an advancing speed control signal 6a or a lagging speed control signal 6b is output as an output signal. This advance speed control signal 6a or lag speed control signal 6b is passed through a variable speed control circuit 7 as a variable speed control signal 7a.
Controls the tape speed of the slave tape device 2. As a result, the precision of synchronous operation of both devices reaches the minimum time unit of time code (1 time code bit). After the synchronization accuracy reaches within the minimum time unit of the time code as described above, the reproduction synchronization signal 2b output from the slave tape device 2 is transmitted to the window generation circuit 8 as shown in FIGS. ), for example, 48 KH from slave tape device 2 as shown in (C).
Based on the sample clock signal 2c for data reproduction of z and the sample offset instruction value N8a, the Nth sample clock signal 2c designated as the sample offset value N from the start point of this reproduction synchronization signal 2b.
The phase is shifted to the starting point position. Furthermore, it is output as a window signal 8b having a window width of 1/T of one sample clock signal period (approximately 20 μ5 ec) centered on this phase-shifted signal starting point position, and becomes an input to the phase difference detection circuit 9. On the other hand, the playback synchronization signal tb output from the master tape device 1 also becomes an input to the phase difference detection circuit 9, and the phase difference detection circuit 9 generates the wind signal 8b and the playback synchronization signal 1.
b is compared in phase. If Fig. 2 (D), (E
), if the area of the wind signal 8b generated from the playback synchronization signal 2b of the slave tape device 2 lags behind the starting point position of the playback synchronization signal 1b of the master tape device I, one time code. An advance speed control signal 9a in bits or less is output to the variable speed control circuit 7. Conversely, as shown in FIGS. 2(F) and 2(G), if the region of the wind signal 8b is ahead of the starting point position of the reproduction synchronization signal 1b, the delay speed is less than l time code bits. The control signal 9b is output to control the speed of the slave tape device 2, and bring both devices into a synchronous operating state. Then, as shown in FIG. 2(G), the wind signal 8b
By matching the start point position of the reproduction synchronization signal 1b within the region of /T accuracy and synchronized operation with master tape device l. Therefore, T=1 results in synchronous operation with an accuracy of ±1 sample clock cycle, and by setting T greater than 1, the synchronization accuracy can be made equal to or less than the sample clock cycle. After that, the playback synchronization signal 1 from the master tape device
By fixing the slave tape device 2 in a synchronous operation state using the sample clock signal 1c or the sample clock signal 1c, the synchronous operation can be maintained with an accuracy of 1/T of the sample clock signal period. In the first embodiment described above, the sample offset value N was explained as a fixed value, but by sequentially changing the sample offset value N in the synchronous operation state, the assumed sample and offset value N can be changed for each sample clock signal period. By moving the window signal 8b in the region of 1/T of the clock signal period, it is possible to dynamically perform synchronized operation with sample clock signal period accuracy. Also, by setting T greater than 1, the sample offset value interval approaches one sample clock period. Next, a second embodiment of the invention will be described with reference to the drawings. In FIG. 3, 10a is a time code/bit signal from the master tape device side from the decoding circuit 4, 10b is a time code/bit signal from the decoding circuit 5 from the slave tape device side, and 10c is a signal Sn for phase difference detection. ,
10 is a phase comparison circuit to which time code bit signals 10a, 10b and signal 5nlOc are applied; 10d is an advance speed control signal for less than 1 time code bits output from the phase comparison circuit IO; 10e is also a 1 time code bit signal. This is a delayed speed control signal in bits or less. FIG. 4 is a timing chart showing the operation of detecting a phase difference within one time code bit. Next, the operation will be explained. After the same operation as described above is performed and the synchronized operation accuracy reaches within the minimum time unit of the time code, the time code bit signals 10a and 10b output from the decoding circuits 4 and 5 are sent to the phase comparator circuit 1.
0, their phase difference is detected by a signal 5nlOc having a period l/M times shorter than the time code bit period. As a result, as shown in FIGS. 4(A) to 4(D), if the time code bit signal 10b on the slave tape device side lags the time code bit signal 10a on the master tape device side by four cycles of the signal Sn. If so, advance control value 4 below l timecode bits.
The advance speed control signal 10d is output to the variable speed control circuit 7. Conversely, as shown in the fourth circle (E) to (H),
When the time code bit signal 10b is ahead of the time code bit signal 10a by two periods of the signal Sn, a delay speed control signal 10e with a delay control value of 2 less than or equal to l time code bits is output. In this way, the leading or lagging speed control signals 6a, 6b from the arithmetic circuit 6 and the leading or lagging speed control signals 10d, 10e from the phase comparator circuit 10 are added in the variable speed control circuit 7, and the variable speed control signal 7a is Variable speed control is applied to the tape of the slave tape device 2, whereby the duplexer maintains a synchronous operation state with an accuracy of 1/M of the time code bit period. In the second embodiment, the phase difference between the starting points of both time code bits was detected using the signal Sn in the time code bit phase comparison operation from both tape devices. As shown in the third embodiment of the present invention, one of the time code bit signals 10b is shifted to the phase shift circuit 1 by considering an offset of an integral multiple of the period of the signal Sn.
1, the phase is compared with the other time code bit signal 10a in addition to the phase comparator circuit 10, and the slave tape device 2 is controlled at variable speed based on the phase difference. A synchronous operation device capable of offset synchronous operation in units of time (time code bits) or less can be obtained. In addition, in the second embodiment described above, in order to detect a phase difference below a time code bit, a signal Sn having a period 1/M times shorter than the minimum time unit (one time code bit) period of the time code is used. Although we have explained the case using a sample of digital data stored on tape,
By using a clock signal (for example, 48 KHz), a synchronous operation device can be obtained in which the synchronization accuracy and offset value specification interval is the data sample clock signal period. Furthermore, in the first and second embodiments described above, the synchronous operation device 3 was explained as an independent device, but the same applies when performing synchronous operation with a device configuration in which the synchronous operation function is implemented in the slave tape device 2. You can get the following effect. Furthermore, it is also possible to operate a plurality of slave tape devices synchronously with one master tape device.

【Effect of the invention】

As described above, according to the invention of claim 1, in addition to the variable speed control that decodes the time code from the master tape device and the slave tape device so that the time difference value between both devices becomes zero, For example, the start point of the playback synchronization signal obtained from the playback data is phase-shifted to a predetermined sample offset position without any time fluctuation, and the playback synchronization from the master tape device is performed within a window region of, for example, one sample clock signal period or less. Since the slave tape device is configured to perform variable speed control so that the starting points 1 of the signals coincide with each other, it is possible to perform stable synchronous operation with an accuracy equal to or less than the sample clock signal period. Further, according to the invention of claim 2, in addition to the variable speed control that decodes the time code from the master tape device and the slave tape device so that the time difference value between the two devices becomes zero, for example, the time code in the time code signal is Using a detection signal Sn having a cycle 1/M shorter than the minimum time unit (timecode bit) cycle, the start point of the timecode/focus signal from the master tape device and the timecode/bit signal from the slave tape device are detected. The system is configured to detect the phase difference between the start point and the slave tape device and use that phase difference to control the slave tape device at variable speed. This enables synchronized operation with an accuracy of 1/M of the time code bit period. By using a sample signal of digital data as Sn, it is possible to obtain a synchronous operation device whose synchronization accuracy is the period of the sample signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a synchronous operation device for tape equipment according to a first embodiment of the present invention, FIG. 2 is a timing chart showing the operation of the same device, and FIG. 3 is a block diagram showing a synchronous operation device for a tape device according to a first embodiment of the present invention. FIG. 4 is a block diagram showing a synchronous operation device for a tape device; FIG. 4 is a timing chart showing the operation of the device; FIG. 5 is a block diagram showing a synchronous operation device for a tape device according to a third embodiment of the present invention. FIG. 6 is a block diagram showing a conventional synchronous operation device for a tape device, and FIG. 7 is a configuration diagram showing a data format of a time code signal. 1 is the master tape device, 2 is the slave tape device, l
a, 2a are time code signals, Ib, 2b are playback synchronization signals, 3 is a synchronous operation device, 6 is an arithmetic circuit, 7 is a variable speed control circuit, 7a is a variable speed control signal, 8 is a window generation circuit, 8b is a window 9 is a phase difference detection circuit, 10 is a phase comparison circuit, 9a and lOd are advance speed control signals, 9b
, 10e is a delay speed control signal, 10a and 10b are time code bit signals, and 10c is a detection signal Sn. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Patent applicant: Mitsubishi Electric Corporation (2 others) 1rIIJ la, 2a: Timeco-No. 141 8a: Dimension Far Off T Soto/LN9b: Prefectural remote control No. 4S Fig. 3

Claims (2)

[Claims] (1) A tape device which obtains a variable speed control signal for the slave tape based on a time code signal played from a master tape of a master tape device and a time code signal played from a slave tape of a slave tape device. In the synchronous operation device, a window generator that shifts the phase of the start point of the reproduction synchronization signal reproduced from the slave tape by a predetermined sample offset value and generates a wind signal having a predetermined width centered on the phase-shifted start point. and a phase difference detection circuit that detects a phase difference between the reproduction synchronization signal reproduced from the master tape and outputs an advance speed control signal or a delay speed control signal of the slave tape. Synchronous operation device for tape equipment. (2) A tape device that obtains a variable speed control signal for the slave tape based on a time code signal played from a master tape of a master tape device and a time code signal played from a slave tape of a slave tape device. In the synchronous operation device, the phase difference between the two time code bit signals respectively extracted from the two time code signals is detected based on a detection signal having a predetermined period, and the advance speed control signal of the slave tape is generated. Alternatively, a synchronous operation device for a tape device, characterized in that it is provided with a phase comparison circuit that outputs a delayed speed control signal.