JPH0230A - Interchangeable lens with data transmitting function - Google Patents

Abstract

PURPOSE:To perform properly camera operation corresponding to the specification of a mounted interchangeable lens by making the number of kinds of data stored on a ROM according to whether the transmitting function for specific data is provided or not. CONSTITUTION:The interchangeable lens 5 sends data characteristic to the interchangeable lens 5 from the ROM 50 to a camera main body 1 in synchronism with a clock supplied from the central controller 10 of the camera main body 1, the data in the ROM 5 includes data indicating whether or not the sending function for the specific data is provided to this interchangeable lens, and the number of the kinds of data stored in said ROM 5 is made different according to whether or not the sending function is provided. Here, the camera main body 1 discriminates whether or not there is the data by the central controller 10 to supply electric power, reference clock pulses, address data, a reset signal, etc., to a data output device for accessories 2, 3, 4, etc., thereby performing properly the camera operation corresponding to the specification of the mounted interchangeable lens.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is characterized in that multiple types of lens-specific data are stored in a storage device on the interchangeable lens side, and predetermined operations of the camera are controlled using these data. Regarding the camera system.

Conventional technology In this type of camera system, for example, Japanese Patent Application Laid-Open No. 54-10
As shown in No. 8628, the number of types of data stored in the storage device on the interchangeable lens side is uniquely determined by the specifications of the camera system, which determines what kind of operation is performed in the camera body.

Problems to be Solved by the Invention When considering a system upgrade in which photographing distance data is added to the data applied to conventional systems and new camera operations are performed using this photographing distance data, new and old It is necessary to consider compatibility so that both lenses can be attached to new and old camera bodies. In other words, for old lenses, the original specifications will continue to function regardless of whether they are attached to a new or old camera body, and for new lenses, care must be taken to ensure that they function according to the new specifications when attached to a new camera body. It won't happen.

The present invention aims to provide a camera system that does not lose compatibility even when the system is upgraded as described above.

Means for Solving the Problems The present invention provides an interchangeable lens in which the data stored in a ROM storing a plurality of types of data unique to the interchangeable lens is serially sent to the camera body in synchronization with a clock given from the camera body. , the data in the ROM includes data indicating whether or not the interchangeable lens has a specific data sending function, and the types of data stored in the ROM depending on whether or not the interchangeable lens has the specific data sending function. With the above configuration, whether or not the interchangeable lens attached to the camera body has a specific data transmission function, that is, the interchangeable lens is designed to improve the system. The ROM of the above-mentioned interchangeable lens contains data indicating whether or not this data exists, and the number of types of data stored in the ROM differs depending on the presence or absence of this data, and the camera body responds depending on the presence or absence of this data. All you have to do is operate the camera.

Embodiment FIG. 1 is a block diagram showing the entire photographic system using the present invention. (1) is a camera body, inside which is provided a central control circuit (lO) that outputs address data to accessories attached to or connected to the camera body and inputs data from the accessories. There is.

(2) is an electric drive accessory (motor drive)
A data output device (20) for outputting data specific to the motor drive is provided inside the drive. (
3) is an accessory (strobe) for flash photography, and a data output device (30) for outputting data specific to the strobe is provided inside. (4) is a lens accessory such as an intermediate ring or a bellows, and a data output device 1 (40) for outputting data specific to the lens accessory is provided inside this lens accessory. (5) is an interchangeable lens, and a data output device (50) for outputting data specific to the interchangeable lens is provided inside this lens. Camera body (1) and accessories (2), (3),
(4) and accessories (4) and (5) are electrically connected by terminals (a) to (f), respectively. Here, as described later, the terminals (a), (b
), (C), and (d) from the camera body (1) to the data output device of each accessory, respectively.
A reference clock pulse, address data, and a reset signal are supplied. Further, data unique to each accessory is supplied to the camera body (1) from the data output device of each accessory via the terminal (e). Terminal Co is a ground terminal.

FIG. 2 is a block diagram of the central control circuit (lO) of the camera body (1). (l l) is a power supply control circuit which supplies power from a terminal (a) to a data output device (50) of an accessory such as an interchangeable lens (5). (SWI) is a switch that is closed when the lens (5) is attached to the camera body (1). (SW2) is a release switch for starting exposure control operation, and (SW3) is a photometry switch for starting photometry operation. For example, when the release button is pressed in the first step, the photometry switch (SW3) is The release switch (SW2) is closed in the second step.The photometric switch (SW3) is a pressure-sensitive element whose resistance is generated by the current flowing through the user's finger or the pressure of the finger when the user's finger touches the release button. It may also be a circuit that closes in response to a change. (12) is a timing circuit, and a switch (S
Based on the closing signals of WI), (SW2), and (SW3), the address output device ff (13) and data input device (14)
A timing signal is applied to the terminals to control the timing of address data output and data capture, respectively, and a reference clock pulse is supplied to the terminal (b) and a reset signal is supplied to the terminal (d). The address output device (13) is controlled by the timing circuit (12) and serially outputs address data bit by bit from the terminal (C). The data input device 21 (14) reads data specific to each accessory that is serially input bit by bit from the terminal (e), converts it into parallel data, and sends it to the arithmetic circuit (15). The arithmetic circuit (15) calculates data for exposure control, etc. based on the above data, and controls the aperture control device (16) and shutter control device (17), respectively.
, and sent to the display device (18).

Table 1 is a table showing an example of the contents of a ROM that is provided for each data output device of each accessory and stores data unique to each accessory.

Table 2 is a table showing the relationship between the above data output from the ROM and the meaning of the data. In Table 1, the upper two bits (a6) and (85) of the address data are data indicating which accessory, that is, which ROM, to select. In the case of a lens accessory, it is 11". Although not shown in Table 1, in the case of a motor drive, it is 00".

The lower 5 bits (a4) to (aO) of address data are R
This specifies the address of OM. Next, input data when various accessories are installed will be explained based on Tables 1 and 2. Focal length 5011m% Open aperture F
A case will be described in which a lens capable of outputting distance information corresponding to the amount of lens protrusion is attached in addition to the minimum aperture value F16.

First, as mentioned above, data specific to the lens is output from the lens by the upper two bits of the address data (a6
), (a5) is IO''.

When the lower 5 bits (a4) to (aO) become "ooooo", the lens is recognized as the camera body (1) by the interchangeable lens.
Check code ttto indicating that it is attached to
o" data is output. Therefore, when specifying the address "toooooo" from the camera body, the data 11100" is output.
If the data is input to the camera body (1), it can be confirmed that the interchangeable lens is attached. Similarly, as shown in Table 1, if the data of "l l l 00" is input to the camera body when "otooooo" is specified, it means that a strobe is attached, and 11000
00'' is specified, ttt.

If the data “O” is input to the camera body, it means that the lens accessory is attached.

Next, when the address of "toooooi" is specified, the address of the ROM where the data of the open aperture Avo is stored is specified, and the data of F14 is "00".
010" is sent to the camera body. Next, tooooto
When the address ``is specified, the minimum aperture Avmax, for example, data 01111 of F16'' is sent. This data corresponds to F16 as shown in Table 2. Toooootl”
When the address is specified, a signal indicating whether the attached lens is configured to output distance information is output.

For example, in the case of the 50mm+F 1-4 lens in Table 1, since it is a lens that outputs distance information, the data of ``oooooo'' is output, whereas in the case of the 28mmF2 lens, no distance information is output, so the data of ``00001'' is output. Ru.

Next, when the address 1000100'' is specified, it means that the address of the ROM where the focal length data is recorded is specified.For a 50mm F1.4 lens, the focal length is 50mm+, so it is within the range of 40 to 60mm. Data 00.110'' indicating that the focal length is . Further, data on the amount of lens protrusion, which will be described later, is used as address data in the ROM of the lens, and the distance information is output based on this address data.

If the feed amount data is “toooo”, it is 1010
000'' address is specified, data 11111'' corresponding to the distance ω is output, and the extension amount data is 111.
11'', the address ``1011111'' is specified and data ``00111'' corresponding to the distance 1-4 m is output.

Next, if a strobe is attached, as with the lens, when the address "otooooo" is specified, the check code 11100" is entered into the camera body, confirming that the strobe is attached. .Then, 0
The address 100001" is specified. The minimum guide number data is stored in this address, and for example, the data "oooto" for guide number 14 is output. Next, when the address 0100010 is specified, , this address stores the data of the maximum guide number, for example, data 1 of guide number 28.
0010'' is output.Next, when the address ``0100011'' is specified, the data of the light distribution characteristics is stored at this address, and in this example, the data 00001'' is output. This data is 45 in the vertical direction.

It shows that the horizontal direction is 60°.

11,000 if lens accessories are installed
When the address 00'' is specified, the check code ``litoo'' is entered into the camera body, confirming that the lens accessory is attached, and 1100001''.
If the data "00011" is input when the address is specified, it is confirmed that the teleconverter is installed. Furthermore, as shown in Table 2, the data is oo
If the data is "oot", it is confirmed that the bellows is installed, if the data is "oooto", it is the reverse adapter, and if the data is "00100", it is confirmed that the intermediate ring is installed.

Although not shown as an example in Table 1, if a wine goo (motor drive) is installed, the winder will
), (a5) is 00'', data unique to the winder is input to the camera body.

And like other accessories, 0000ooo”
When the address ``10000001'' is specified, the check code ztoo'' is input into the camera body, and when the address 10000001'' is specified, data on the number of images that can be taken per second (frame speed) is input. As shown in Table 2, the data is oo
oo.

"1 frame/second, 01100" 7 frames/second
seconds.

Figure 3 shows the address output device (1) on the camera body (1) side.
3) is a circuit diagram showing a specific example of a partial circuit, a data input device (14), a partial circuit, and a data output device on one side of each accessory. Note that an interchangeable lens is shown as an example of an accessory. Also, Fig. 4 is a time chart of Fig. 3. In Fig. 3, (OSC) is a reference clock pulse output circuit. The clock pulse (CP in Fig. 4) from this circuit (OSC) is connected to the terminal ( It is also sent to the lens (5) via b). (CNTI) is a counter that counts clock pulses (CP), and (DHCI)
is the output (CBO) of the counter (CNTI), (CB t
), (CB2), and the output of this decoder is (TBO) to (TB7) in Figure 4.
) is the timing signal shown. Also, the lens (
5) A counter (CNT2) and a decoder (
DEC2) is the counter (CNTI) on the camera body (1) side.
) and decoder (DECI), the outputs of this decoder and DEC2) are (TLO) to (TL7) in Figure 4.
The timing signal is shown below.

The outputs of the two decoders (DECI) and (DEC2) are connected to a counter (C) that counts the same clock pulses (cp).
Since the output of NTI) (CNT2) is decoded,
The same timing signal is output, and the circuits on the camera body (1) side and the lens (5) side are synchronized. Table 3 shows counters (CNT1), CCNT2) and decoders (DEC
The relationship between the outputs of I) and (DEC2) will be shown below.

When the camera body outputs a reading start signal, the flip
The value 70 (Fl) is set (FIQ in FIG. 4), and the reset state of the counter (CNTI) is released.

As a result, the counter (CNT l ) starts counting clock pulses, and the decoder (DECl) starts outputting timing signals (TBO) to (TB7).

In addition, the counter (CNTI).

When the output of (CNT2) is 000'', the decoder (DEC
I), (DEC2) AND circuit (AN2), (AN6
) is High, the AND circuits (AN2) and (AN6) output the counters (CNTI) and
Only after (CNT2) starts counting, “Hi”
gh” level timing signal (TBO), (TLO)
It is set up so that it is output.

First, in step (SO) in FIG. 4 (from when the read start signal is output until the first timing signal (TB7) is output), the register ( REGI) address data 1
000000'' is latched, and furthermore, this data is latched into the shift register (SRI) at the timing when the timing signal (TB7) is being output and the output of the AND circuit (ANII) falls to Low. This step (
During the period of SO), 7 lips and 70 tubes (F2)
Since the Q output (F2Q in Figure 4) is "Low", other circuits do not operate.When transitioning from step (SO) to (Sl), that is, when the 9th clock pulse (CP) is counted, , counter (CNTI) output (CB3)
rises to "High" (FIG. 4, CB3), the D input of 7 lips and 70 tubes (F2) is taken in, and its Q output becomes "High" (FIG. 4, F2Q). by this,
The gate of the AND circuit (ANI) is opened and a clock pulse is supplied to the shift register, and the terminal (d)
The reset state of the circuit on the lens (5) side is released through. The shift register (SRI) receives the address data 100 latched in synchronization with the rising edge of the clock pulse.
0000" is serially output from the k terminal (C) every l bit. This output data is sequentially taken into the shift register (SR3) on the interchangeable lens (5) side in synchronization with the falling edge of the clock pulse. , the terminals (Lad) ~ (La
4) (Fig. 4 (L, aO) - (La
4) ) - Then, at the timing when the terminal (TL5) becomes "High", the outputs of the terminals (La4) and (La3) become "lO", and the output of the AND circuit (AN5) becomes "High". The Q output of the 7 lip/70 tube (F3) which receives this output at the D input becomes ``High'' (
Figure 4 F3Q).

Decoder (DEC2) terminal (TL) on the lens (5) side
7) rises, the shift register (SR3
The data at the output terminals (La4) to (Lad) of the According to the specification, the above-mentioned check code ll is output from the ROM (51).
100" data is output.

The above data from this ROM (51) is transferred to the terminal (TL7).
) is latched into the shift register (SR4) at the rising edge of the signal.

Since the Q output of the flip 70 tube (F3) is high at the time of the timing pulse (TL5), the flip 70 tube (F4) will flip when the next timing pulse (TLO) rises to high.・Flop (
F3) is taken in and the Q output is made High (Fig. 4 F4Q).
) becomes conductive and becomes capable of outputting the data "11100" to the terminal (e).

The data taken into the shift register (SR4) is outputted to the terminal (e) in the order of 11100'' via the switch circuit (GS) in synchronization with the clock pulse, and then sent to the camera body (
On the 1) side, this data is taken into the shift register (SR2) in synchronization with the falling edge of the clock pulse (BbO to Bb4 in FIG. 4).

At this time, the flip-flop (F5) has 7 lips.
Since the Q output of the 70 tube (F2) is )(high), when the next timing pulse (TBO) rises to High (TBO rises in step S2), the Q output becomes High. ”.Therefore, the gates of the AND circuits (AN3) and (AN4) are open after step S2.

Then, at the rising edge of the timing pulse (TBS), the output of the shift register (S R2) is transferred to the register (REG2).
latched to.

In step S2, the above-mentioned data "11100" is taken in, and the next address data "l 000" is taken in.
001" to the lens (5), and in step S3, the lens data 0001 according to this address specification is transferred.
0" is transferred to the camera body, and the next address data 1000010" is transferred to the lens (5), and addresses and data are transferred in the same manner.

As shown in Table 1, the upper address of the lens is lO'', so this can be determined by the data output device (5) of the lens (5).
50) and conducts the switch circuit (GS), but in the case of other accessories such as strobes, lens accessories, motor drives, etc., as shown in Figure 5,
The input voltage level of the input terminal of the AND circuit (AN5) is changed corresponding to each accessory. In other words, in the case of a strobe, the upper address data is "Ol", so when this signal is input, the output of the AND circuit (AN5-1) becomes High.
In the case of a lens accessory, it is "11", so the AND circuit (AN5-2) is High.In the case of a motor drive, it is "00", so the circuit is configured so that the output of the AND circuit (AN5-3) is High. The other circuit configurations in these accessories are similar to the circuit configuration inside the lens (5).

In the circuit shown in FIG. 3, it is needless to say that the camera body (1) needs to be reset by a power-on reset signal when the power is turned on.

In addition, a power-on reset signal generation circuit is provided inside each accessory so that a power-on reset signal is generated when the accessory is connected to the camera body (1) and power supply starts to the data output device of the accessory. It is also necessary to reset the circuitry inside the accessory.

In addition, in the case of accessories such as lens accessories, which have only a few types of data to be fixedly stored and which are produced in small numbers, the ROM installed inside the accessory may be a programmable ROM or a fuse ROM suitable for small-volume production.
etc. may also be used.

Alternatively, the wiring may be performed using a wiring pattern on a printed circuit board or wiring by soldering.

FIG. 6 shows a part of the address output device (13) that sends address data to the register (REGI) in FIG.
and the register (
FIG. 2 is a circuit diagram of a portion that reads data from REG2).

When the photometric switch (SW3) is closed, the power supply transistor (BTI) becomes conductive, and a reset signal (power-on reset signal FOR) is output, and 7 rip props (R41), (R42)
, (R43) and the counter (CNT5) are reset. In addition, when the photometric switch (SW3) is closed, the output of the inverter (INI) becomes "High", the gate of the AND circuit (AN40) is opened, and the frequency divider (D
A clock pulse (cp) is input to I), a frequency divider (DI) outputs a pulse with a constant period obtained by dividing the frequency of the clock pulse, and the one-shot circuit (051) starts reading at a constant period. A signal is output. Therefore, in this embodiment, while the photometry switch is closed, the data from the accessory is automatically read periodically, so that the accessory like the switch (St) in FIG. There is no need for a switch to detect that it is attached.

First, the operation of sending address data to the register (REGI) in response to a read start signal will be described. When the read start signal is output, the flip-flop (R40), (
R41) is set and the AND circuit (AN41), (A
The gate of the counter (CN42) is opened and the counter (CN42) is opened.
T6), (CNT7), and (CMTg) are reset. Then, in the (SO) step, the output of the counter (CNT5) is 01'' at the timing pulse of (TBO).
7 at the falling edge of this timing pulse (TBO).
The lip prop (R40) is reset, and the timing pulse (TBO) is no longer input to the counter (CNT5). Then, as mentioned above, at the rising edge of the timing pulse (TBI), the register (REGI)
The outputs of the counter (CNT5) and multiplexer (MP2) are latched as address data, but at this time,
The output of the counter (CNT5) is '°01'' and the output of the multiplexer (MP2) is o o o o o'', so
The address data latched in the register (REGI) is "i oooooo", which is the leading address of the lens. Note that the output of the counter (CNT5) is input to the register (REGI) with the output bits reversed. Here, the multiplexer (MP2) inputs the input data (1) to the multiplexer (MP2) when the counter (CNT5) is 'Ol'', (β) when it is '1O', and (β) when it is 11''. 1) are output respectively.

At the rising edge of (T82), the counter (CNT6) counts up by one via the AND circuit (AN42) and becomes 001.
”. Then, in the next step (31), (
At the rising edge of TBI), 1000 is written to the register (REGI).
The address data of 001'' is latched, and the output of the counter (CNT6) becomes 010'' at the rising edge of (TB2).

Thereafter, similar operations are repeated, and lens address data is sequentially fetched into the register (REGI). Then, in step (S4), the address data of 1000100" (final address of the lens) is latched in the register (REGI) at the rising edge of (TBl), and the output of the counter (CNT6) is 1Ol" at the rising edge of (TB2). , the output of the AND circuit (AN56) becomes H.
high” rises, and a pulse is output from the one-shot circuit (OS2). This pulse causes the OR circuit (O
The 7-lip 70-tub (F41) is reset via the OR circuit (OR5), the flip 70-tub (F2O) is set via the OR circuit (OR5), and the flip 70-tub (F42) is directly set.

In step (55), at the rising edge of (TBO), the output of the counter (CNT5) becomes IO'', and data (β) is output from the multiplexer (MP2). Therefore, at the rising edge of the next (TBI) The address data latched in the register (REGI) becomes "otoooooo", which becomes the start address of the strobe. And (TB2)
The timing pulse of is sent to the counter (CNT7) via the AND circuit (AN43), and its output is 001"
becomes. Thereafter, the same operation is repeated, and in step (S8), the address data of 0100011'' (the final address of the strobe) is latched in the register (REGI) at the rising edge of (TBI), and the counter is latched at the next rising edge of (TB2). The most significant output bit of (CNT7) is “High”
h” (output is 100”), one-shot circuit (
A “High” pulse is output from OS3).This pulse causes 7 rip and 7
The 0 knob (F42) is reset and the OR circuit (OR5)
A 7-lip, 70-tube (F 40) is set via the 7-lip, 70-tube (F 40), and a 7-lip, 70-tube (F 43) is set directly. As a result, the gate of the AND circuit (AN43) is closed and the gates of the AND circuits (AN41) and (AN44) are opened.

(59) At step 8, the output of the counter (CNT5) becomes 11" at the rising edge of (TBO), the data of (γ) is output from the multiplexer (MP2), and the rising edge of (TBI) Then, the address data "t t oooooo" (the first address of the lens accessory) is latched into the register (REGI). And (TB2
At the rising edge of ), the output of the counter (CMTg) becomes O1'', and in the (SIO) step, at the rising edge of (TBI), the address data of 1100001'' is output from the register (
REGI). Then, when the upper pit of the counter (CMTg) becomes High" (output is 10") at the rising edge of (T82), the one-shot circuit (053)
A ``High'' pulse is output from .This pulse resets the 7 lip/70 knob (F43), closes the gate of the AND circuit (AN44), and roughly outputs the 7 lip via the OR circuit (OR5).・70 tubes (F2O
) is set and the gate of the AND circuit (AN40) is opened. Then, in step (Sll), the counter (CNT5) is set to 11" by the timing pulse (TBO).
The output changes from 00' to 00', and the timing pulse (TBO
), the 7 lip/70 tube (F40) is reset and the gate of the AND circuit (AN40) is closed. With the above operations, the operation of outputting address data is completed, and a state is entered in which it waits for the next read start signal to be output from the one-shot circuit (OSl).

Next, the operation of reading the data read into the - register (REG2) into the registers (REG3) to (REG13) will be explained. The counter (CNT9) is reset by the read start signal and counts timing pulses (TB2). And the output of the counter (CNT9) is
It is input to the decoder (DEC3) and converted into outputs (dO) to (dlO) as shown in Table 4.
C3).

As mentioned above, in steps (SO) and (Sl),
Since data from the accessory has not yet been read into the register (REG2) (Figure 4), the decoder (DEC
The outputs of 3) are all "Lot". Therefore, the gates of the AND circuits (AN45) to (AN55) are closed and no data is taken into the registers (REG3) to (REG13). ( In step S2), the first data is transferred to the register (RE) at the rising edge of (T85).
G2). Here, the terminal (dO) is “Hi”
gh'', the gate of the AND circuit (AN45) is open, and the data latched in the register (REG2) is transferred to the register (REG2) at the next rising edge of (TBO).
G3).

Similarly, the registers (REG4) to (REG13) are sequentially transferred to the registers (REG4) to (REG13) at the rising edge of the timing pulse (TBO) via the AND circuits (AN46) to (AN55).
The data from REG2) is imported. and,
At step (512), the timing pulse of (TBO) is applied to the register (REG13) via the AND circuit (AN55).
) when the last data is latched, it means that the read operation has ended, so the timing pulse (TBO) from this AND circuit (AN55) is simultaneously sent to the circuit shown in Figure 3 as a read end signal to start the read operation. ends. Various data from the accessories latched in these registers (REG3) to (REG13) are used for exposure control operations, etc. Figure 7 shows the address output device and data input when reading only data from the interchangeable lens. It is a circuit diagram of the camera body (1) side showing the circuit configuration of the device and also reading distance information from an interchangeable lens. When the lens (5) is attached and the attachment switch (SWI) is closed, the output of the delay circuit (DL) becomes ``High'' after a certain period of time determined by the delay circuit (DL).This delay time will be explained later. This is set to the time required for the signal bottle contact between the lens and the camera body to stop chattering and become stable.Then, the metering switch (SW3)
is closed and the output of the AND circuit (AN61) becomes High through the inverter (INS), a read start signal is output from the one-shot circuit (055) through the OR circuit (ORII), and the read operation starts. Also, when the AND circuit (AN61) becomes "High", the gate of the AND circuit (AN60) is opened, and the clock pulse (CP) is input to the frequency divider (DI), and a pulse with a constant period is generated. It is output from the frequency divider (DI).Therefore, similarly to FIG.
, is output via the OR circuit (ORII).

The photometry switch (SW3) is closed and the capacitor (CI
> When a power-on reset signal (FOR) is output from a power-on reset circuit composed of a resistor (R1), 7 lips and 70 tubes (F2O) and (F51) are reset. The multiplexer (MP3) converts the data from (X) to Hi when the input to the (SE) terminal is “Low”.
gh”, the data from (Y) is output, so when the photometry switch (SW3) is closed and the reading operation starts, the D7 lip-flop (F
The Q output of 50) is “Low” and the data from (X) is output.
The Q output of the D flip 70 tube (F2) shown in the figure is “Low”
Therefore, the counter (CNTII) remains in the reset state and its output is 000". Therefore, the multiplexer (MP3) outputs toooooo".
data is output, and this data is latched into the register (REGI) as address data at the rising edge of the timing pulse (TBI). This data is used for interchangeable lenses (
5) is the first address.

(31) When it comes to steps, D7 lip 70 in Figure 3
The Q output of the knob (F2) becomes “High” and the counter (
CNTII) is released from the reset state, the timing pulse (TBO) counts up by one and outputs 001'', and the multiplexer (MP3) outputs 10000.
01'' is output. This data is latched into the register (REGI) at the rising edge of (TBI). At step (S2), the output of the counter (CNTII) is 01.
0'', and the output terminal (eO) of the decoder (DEC5) becomes High'' as shown in Table 5. Note that Table 5 shows the input/output relationship of the decoder (DEC5) that decodes the count contents of the counter (CNTII).

Then, at the rising edge of (TBI), the register (REGl) is
The data 000010" is latched as an address. On the other hand, the first data 11100" (check code) is input to the register (REG2) (Fig. 3), and the timing pulse of (TB6) is input to the AND circuit (AN
63), and this data is output from the register (REGI
5) is latched. In step (S3), (TBO
), the output of the counter (CNTII) is 011"
Therefore, the terminal (el) of the decoder (DEC5) is High.
h” and the gate of the AND circuit (AN64) is opened. Then, at the rising edge of (TBI), the register (REGI) is opened.
) is latched as address data, and at the rising edge of (TB6), the data of the open aperture value (A vo) is sent to the register (REG2) via the register (REG2).
GI6).

At step (54), at the rising edge of (TBO), the output of the counter (CNTII) becomes 100'', and the register (
REGI) at the rising edge of (TBI) 00()l
00'' data is latched as address data.

Then, at the rising timing of (TB2), D7 lip
The Q output of the flop (F50) becomes "High",
From now on, the multiplexer (MP3) will output (Y) data.

This (Y) data indicates the amount of extension of the interchangeable lens (5), and the amount of extension is detected on the camera body (1) side by a mechanism described later. Here, taking advantage of the fact that the relationship between the amount of extension of each interchangeable lens (5) and the distance at which the focus has been adjusted is constant for each interchangeable lens, the ROM of each interchangeable lens (5) contains a table. As shown in I, distance data is fixedly stored so as to correspond to the above-mentioned feeding amount data. Therefore, once the data of the extension amount detected on the camera body (1) side is specified as the address of the ROM (51) in the interchangeable lens (5), the distance data stored at that address will be transferred to the camera. It is taken into the main body (1) side so that distance data can be obtained.

Reference numeral (55) denotes a member provided on the side of the interchangeable lens (5), which moves in the left-right direction in the figure in conjunction with a focus adjustment member (not shown, for example, a distance ring) of the interchangeable lens (5). (70) is provided on the camera body (1) side, and the member (55) has a spring (
The member (55) is brought into contact with the spring force of the member (71).
It moves left and right as it moves. This camera body (
1) side member (70) includes guide pins (72) and (73).
) and a brush (74) as an electrical contact.
, (75), (76), (77), and (78) are provided, and all the contacts are electrically connected. (80) is a code board, the blacked out part is the electrode, and the electrode (80) is the code board.
1) is connected to ground, (82), (83), (84
) and (85) are each connected to the power supply (+E) via a resistor.

Contact points (74), (75), (
76), (77), and (78) are in the position (g), the outputs of terminals (f3) to (rO) are 0001.
", and the output of the multiplexer becomes 1010001". Therefore, the attached interchangeable lens is 50-m in Table 1.
If it is a Fl-4 lens, the data is 4 ottot”
However, if the lens is 135-mF3.5, data 10110'' for 19 m will be output from the interchangeable lens.

Furthermore, when the contacts (74) to (78) come to the position (h), l 001" is detected through the terminals ([3) to (fO), and "1011001" is detected from the multiplexer (MP3).
” address is output, and if it is 50+nmF1.4, the data of 0.6moooto” is 135a+mF3
If it is -5, data of 2.5 gardens O1010'' will be output.

In step (54), the decoder (DEC5) terminal (e
2) is High", the timing pulse (TB6) is output from the AND circuit (AN65), and the minimum aperture data (Ay■) is latched in the register (REGI7). In the following step (S5), the lens Type data is latched into the register (REGI8), (S6)
In step , focal length data is stored in a register (REGI).
9). In the step (S7), the output of the counter (CNTII) becomes "Ill", the output of the AND circuit (AN62) rises to "High", and the
70 knob (F51) is set and AND circuit (AN
The gate of 68) is opened, and the distance data is latched in the register (REG20) at the rising edge of TBron, and at the same time, the pulse of (TB6) from this AND circuit (AN68) is used as a read end signal to start the circuit of Fig. 3. sent to.

If the photometry switch (SW3) remains closed even after reading, the one-shot circuit (05
1) outputs the next reading start signal. At this time, 7
Q output of lip flop (F2O), (F51) is H
igh", so in step (50), only the data according to the feed amount is output from the multiplexer (MP3) to the register (REGI), and in step (S2), the distance data is latched in the register (REG20) and the reading operation is started. In other words, when the photometry switch (SW3) continues to be closed, only the distance information is read repeatedly.Therefore, in the case of this embodiment, the minimum aperture of the interchangeable lens, etc. is fixed. The information set is read only once, and the variable information such as distance information (in addition, for example, focal length information of a zoom lens, setting aperture information) is read repeatedly.

In FIG. 3, the shift register (SRI) for outputting address data and the shift register (SR4) for outputting accessory data are configured as 7-bit or 8-bit input shift registers. For example, in the case of 8-bit input, these shift registers read data input in parallel at the rising edge of timing (TB7) and (7L7), and then
) to (TB7) and (TLO) to (TL7), the data is sequentially output from the most significant bit to the output terminal (O
output in series to UT). A shift register that performs such an operation has the following circuit configuration. First, eight 7 lips and 70 tubes are provided for each bit, in which the data of each bit input in parallel is preset. and,
The output terminal of the flip-flop corresponding to the lower bit is a flip-flop whose output terminal corresponds to the bit immediately above the lower bit.
Connected to 70 FP input terminal. By doing so, the data preset in each 7 lip and 70 lip is sequentially transferred from the lower bit to the upper bit in synchronization with the clock pulse. Furthermore, the output terminal of the flip 70-tube, where the data of the most significant bit among the eight bits is preset, is
Connect to the input terminal of the ninth 7-rip prop.

Then, the output terminal of this ninth 7-rip prop is used as the output terminal of the shift register. By doing this, 9
The 7th lip/70 tube takes in the output of a flip-flop whose most significant bit data is preset in synchronization with the clock pulse, thereby outputting data with a delay of T degrees l clock pulses.

Effects As described above, according to the present invention, data indicating whether or not the attached interchangeable lens is system-upgraded and has a specific data transmission function is stored in the ROM, and this data is stored in the ROM. The number of types of data stored in the ROM differs depending on the presence or absence of the data, so by determining the presence or absence of this data, the camera body can perform appropriate camera operations according to the specifications of the attached interchangeable lens. can.

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g's purification a (no change in self-answer) Table 2 ROM contents data Table 1 (100 (1196,7 101101n 8 100111 27 9.5111011
32 II1111● 027 11@ 1 1 45tti ・
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01 Giant ■ L Giant ■ L ■ Sl ■ 1100 Giant ILIH
ILIL1 L NS411110 Giant Giant IHI L
IS6■■1111L1L1L1L1LI HIS7
■

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the principle of the present invention, Figure 2 is a block diagram showing the circuit configuration on the camera body side, and Figure M3 is a part of the data input/output section on the camera body side and data output on the accessory side. A circuit diagram showing the circuit with the device, Fig. 4 is a time chart showing its operation, Fig. 5 is a circuit connection diagram showing an example of connection to other accessories, and Fig. 6 is a diagram of the camera body side of Fig. 3. A circuit diagram showing the circuit of other parts of the data input/output section,
FIG. 7 is a circuit diagram showing another embodiment of FIG. 6. l: Camera body, 2: Interchangeable lens, 51: ROM. Applicant Minolta Camera Co., Ltd. Figure 5/Determination 7f, Wler 1; De 7-Tard Life 1 Procedural amendment @ (Method) Hei IIL 1 is -1125 days 1, Incident indication 1988 Patent Application No. 318898 No. 2, Name of Invention Conversion Lens with Data Transmission Function 3, Relation to the Amendment Person Case Applicant Address: Osaka Kokusai Building, 3-13 Azuchi-cho 2-chome, Chuo-ku, Osaka City “February 13, 1989 "Change of administrative division" name (607
) Minolta Camera Co., Ltd. Taira Ilt March 31, 1
Date (Shipping date: April 25, 1999) 5, "Detailed description of the invention" column 6 of the specification subject to amendment, Contents of the amendment

Claims (3)

[Claims] (1) In a camera system in which the above data in a ROM storing multiple types of data unique to an interchangeable lens in corresponding addresses is sent to the camera body in series in synchronization with a clock given from the camera body, The data includes data indicating whether or not the interchangeable lens has a specific data sending function, and the number of types of data stored in the ROM is different depending on whether the interchangeable lens has the specific data sending function or not. Interchangeable lenses with the following features: (2) The interchangeable lens according to claim 1, wherein the data stored in the ROM includes data of a type common to all interchangeable lenses, regardless of whether or not they have a specific data sending function. (3) Interchangeable lens ROM with specific data transmission function
2. The interchangeable lens according to claim 1, wherein the data stored only in the interchangeable lens includes data on an imaging distance that is uniquely determined in correspondence with each movement amount of a focus adjustment member of the interchangeable lens.