JPH02306692A - Mounting method for component on circuit substrate - Google Patents

Mounting method for component on circuit substrate

Info

Publication number
JPH02306692A
JPH02306692A JP12666289A JP12666289A JPH02306692A JP H02306692 A JPH02306692 A JP H02306692A JP 12666289 A JP12666289 A JP 12666289A JP 12666289 A JP12666289 A JP 12666289A JP H02306692 A JPH02306692 A JP H02306692A
Authority
JP
Japan
Prior art keywords
component
circuit board
components
solder
soldering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12666289A
Other languages
Japanese (ja)
Inventor
Eiji Tsubono
坪野 英二
Mitsuhisa Shinagawa
品川 充久
Masao Oguri
小栗 雅夫
Shigeru Saito
茂 斎藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12666289A priority Critical patent/JPH02306692A/en
Publication of JPH02306692A publication Critical patent/JPH02306692A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3415Surface mounted components on both sides of the substrate or combined with lead-in-hole components

Abstract

PURPOSE:To effectively and accurately mount components on upper and lower surfaces in one step by connecting electrodes of an upper surface mounting component with solder to be guided from the lower surface side to the upper surface side via a through hole in the case of dip soldering, and connecting the electrodes of a lower surface mounting component. CONSTITUTION:A through hole 4 is formed at a position opposed to the electrode of an upper surface mounting component 1, a lower surface mounting component is secured to the lower surface, and dip soldered from the lower surface of a circuit substrate 3. In this case, the electrode of the component 1 is solder-connected with solder to be guided from the lower surface side to the upper surface side via the hole 4, and the electrode of the lower surface mounting component is simultaneously solder-connected. Thus, the electrodes of the upper and lower surface mounting components can be effectively solder- connected once in a dip soldering step.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電子回路機器における両面回路基板への面実
装部品の半田付けによる実装方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of mounting surface-mounted components on a double-sided circuit board in electronic circuit equipment by soldering.

(従来の技術) 近年、電子機器の小型化に伴い部品実装においても高密
度化が進み、両面基板に面実装する方法が多く用いられ
てきた。また、IC部品のパッケージも小型化が進むと
ともに高周波系のIC部品が普及し第11図に示すよう
な高周波特性を考慮した電極を有するIC部品を実装す
る必要性があった。
(Prior Art) In recent years, with the miniaturization of electronic devices, the density of component mounting has also increased, and methods of surface mounting on double-sided boards have been widely used. Furthermore, as the size of IC component packages has progressed, high-frequency IC components have become widespread, and there has been a need to mount IC components having electrodes that take high-frequency characteristics into consideration, as shown in FIG.

即ち第11図において、1はIC部品、1aはIC部品
の下面、2は電極(リード)、であるが、電極2の長さ
を短くして、高周波時において該電極部分の持つインダ
クタンス分が大きくなって弊害を発生するのを防止する
ようにしたIC部品1を実装する必要があうた。
That is, in FIG. 11, 1 is an IC component, 1a is the bottom surface of the IC component, and 2 is an electrode (lead). By shortening the length of electrode 2, the inductance of the electrode portion at high frequency is reduced. It became necessary to mount an IC component 1 that prevents the IC component 1 from becoming large and causing problems.

このようなIC部品を両面基板に面実装し、高密度実装
化を図った従来例を第9図、第10図に示す。
A conventional example in which such IC components are surface-mounted on a double-sided board to achieve high-density mounting is shown in FIGS. 9 and 10.

即ち第9図は部品実装後の側断面図であり、第10図は
実装すべき部品を回路基板上に位置合わせする状況を示
す斜視図である。
That is, FIG. 9 is a side cross-sectional view after components are mounted, and FIG. 10 is a perspective view showing a situation in which components to be mounted are aligned on a circuit board.

第10図において、実装に際しては先ず、IC部品1の
電極(リード)2を銅箔パターン6に対して位置合わせ
した後、その上に置くものであることが理解されるであ
ろう。
In FIG. 10, it will be understood that upon mounting, the electrodes (leads) 2 of the IC component 1 are first aligned with the copper foil pattern 6 and then placed thereon.

実装後は第9図に見られるような構造となる。After mounting, the structure will be as shown in Figure 9.

即ちtC部品1の電極2は半田5によって銅箔パターン
6に対して半田付接続され、上面実装部品としてのチッ
プ部品7aは一旦接着剤10aによって回路基板3上に
固定された後、やはり半田5によって半田付接続される
。リード付挿入部品8は、その長いリードをスルーホー
ルに挿入され、回路基板3の下面に半田5によって半田
付接続され、下面実装部品としてのチップ部品7bも一
旦接着剤10bによって回路基板3の下面上に固定され
た後、やはり半田5によって半田付接続され 、る。
That is, the electrode 2 of the tC component 1 is soldered to the copper foil pattern 6 using the solder 5, and the chip component 7a as a top-mounted component is once fixed on the circuit board 3 using the adhesive 10a, and then the chip component 7a is also soldered to the copper foil pattern 6 using the solder 5. Connected by soldering. The leaded insertion component 8 has its long lead inserted into the through hole and is soldered to the bottom surface of the circuit board 3 using the solder 5, and the chip component 7b as a bottom surface mounting component is also attached to the bottom surface of the circuit board 3 using the adhesive 10b. After being fixed on top, it is also soldered and connected using solder 5.

なお、回路基板3の上面に、上面実装部品としてのチッ
プ部品7aやIC部品1を実装する際は、リフロー半田
付けが行われ、回路基板3の下面に、下面実装部品とし
てのチップ部品7bや挿入部品8を実装する際は、ディ
ップ半田付けが行われる。
Note that when mounting the chip components 7a and IC components 1 as top-mount components on the top surface of the circuit board 3, reflow soldering is performed, and the chip components 7b and IC components as bottom-mount components are mounted on the bottom surface of the circuit board 3. When mounting the insertion component 8, dip soldering is performed.

以上、概略的に説明した従来の実装部品取り付は工程を
整理して示したのが第12図である。第12図に見られ
るように、従来の実装部品取り付は工程は、上面実装部
品を基板上面に取付けるリフロー半田付工程、チップ部
品7bを回路基板下面に接着剤10bを使って装着する
チップ部品装着工程、次にリード付挿入部品8をスルー
ホールに挿入する挿入工程、次に下面実装部品の半田付
を行うディップ半田付工程から成っている。
FIG. 12 is a diagram illustrating the conventional mounting component mounting process described above in an organized manner. As shown in FIG. 12, the conventional mounting component mounting process includes a reflow soldering process in which the top-mounted component is attached to the top surface of the circuit board, and a chip component 7b is attached to the bottom surface of the circuit board using an adhesive 10b. The process consists of a mounting process, an insertion process of inserting the leaded insertion component 8 into the through hole, and a dip soldering process of soldering the bottom-mounted component.

別の従来例としては上面実装部品の点数が少ない場合に
設備的理由により、第12図のりフロー半田付工程の代
わりに、第11図に示すようなIC部品1を手作業によ
り回路パターンに対して位置合せを行い手で半田付する
工程を採るようにした例もある。
Another conventional example is that when the number of top-mounted components is small, and for equipment reasons, IC components 1 are manually attached to the circuit pattern as shown in FIG. 11 instead of using the adhesive flow soldering process in FIG. 12. In some cases, the process of aligning the parts by hand and soldering them by hand has been adopted.

なお、この種の部品実装方法を記述した文献としては例
えば特開昭59−28998号公報、実開昭42−20
22号公報、実開昭5o=7t174号公報等を挙げる
ことができる。
Documents describing this type of component mounting method include, for example, Japanese Unexamined Patent Publication No. 59-28998 and Japanese Utility Model Application No. 42-20.
Examples include Publication No. 22, Japanese Utility Model Application No. 5O=7t174, and the like.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した如き従来技術において1路基板の両面に部品を
面実装する場合、 (1)上面゛、下面ディップ半田付 (2)上面リフロー半田付、下面ディップ半田付(3)
上面手半田材、下面ディップ半田付等の方法があるがい
ずれも2回の半田付工程が必要で作業工数の増大、工程
が複雑、多大な設備が必要等の問題があった。
When surface mounting components on both sides of a one-way board using the conventional technology as described above, (1) dip soldering on the top and bottom surfaces (2) reflow soldering on the top surface and dip soldering on the bottom surface (3)
There are methods such as manual soldering on the top surface and dip soldering on the bottom surface, but both require two soldering processes, resulting in increased number of work steps, complicated processes, and the need for a large amount of equipment.

また、上記(1)の方法による実装の場合、4方向に電
極を有するIC部品(第11図参照)では、゛デ゛イッ
プ方向により半田ブリッジが発生して不都合であるとい
う問題があった。また、上記(2)、 (3)の方法に
よる実装の場合、位置ズレ等により半田付の確実性の低
下等があり、精度および信頼性の面で問題があった。
Furthermore, in the case of mounting using method (1) above, there is a problem in that in IC parts having electrodes in four directions (see FIG. 11), solder bridging occurs depending on the dipping direction, which is inconvenient. Furthermore, in the case of mounting using the methods (2) and (3) above, there was a problem in terms of accuracy and reliability, as the reliability of soldering was lowered due to positional deviation and the like.

さらに、大型パッケージのIC部品においては、信顛性
上の理由により素体に何度も熱衝撃を加えることを禁止
している場合があり、上記(1)、 (2)の方法によ
る実装は2度も熱衝撃を加えることから困難となる。
Furthermore, for IC parts in large packages, it may be prohibited to apply multiple thermal shocks to the element body for reliability reasons, so mounting using methods (1) and (2) above is not possible. This is difficult because thermal shock is applied twice.

本発明の目的は、高密度実装のため上下両面に実装可能
な面実装回路基板において、1度の半田付工程で精度良
く、高信頼性をもって上面、下面に部品を取り付けるこ
とのできる実装方法を提供することにある。
An object of the present invention is to provide a mounting method that can accurately and reliably attach components to the top and bottom surfaces in a single soldering process in a surface mount circuit board that can be mounted on both the top and bottom surfaces for high-density mounting. It is about providing.

(課題を解決するための手段) 上記目的達成のため、本発明による実装方法は、回路基
板の上面と下面に部品を実装することの可能な両面回路
基板において、上面実装部品の電極部に対向する位置に
スルーホールを形成する段階と、下面実装部品を取りつ
けるときは該部品を下面に固定する段階と、回路基板の
下面よりディップ半田付けを行い、その際、スルーホー
ルを介して下面側から上面側へ誘導される半田により上
面実装部品の電極部を半田付接続すると共に、下面実装
部品の電極部をも一緒に半田付接続する段階と、を含む
(Means for Solving the Problems) In order to achieve the above object, the mounting method according to the present invention provides a method for mounting components on a double-sided circuit board in which components can be mounted on the top and bottom surfaces of the circuit board. When attaching bottom-mounted components, there is a step of fixing the components to the bottom surface.Dip soldering is performed from the bottom surface of the circuit board, and at that time, soldering is performed from the bottom side through the through-holes. The method includes the steps of soldering and connecting the electrode portions of the top surface mount component with the solder guided to the top surface side, and also soldering and connecting the electrode portions of the bottom surface mount component together.

また、その際、スルーホールを上面実装部品の回路基板
に対する位置決め用に利用して該実装部品の電極をスル
ー呆−ルの途中まで挿入するようにすることもできる。
Further, in this case, the through hole can be used for positioning the top surface mounted component with respect to the circuit board, and the electrode of the mounted component can be inserted halfway into the through hole.

〔作用〕[Effect]

IC部品のリードをスルーホール穴の途中まで挿入する
方法を採れば、IC部品の回路基板に対する位置決めが
正確にできる。また、一般の面実装部品については、半
田付接続に先立ち接着剤による回路基板への固定を行う
。実装すべき部品の電極位置に対応する位置で回路基板
に設けたスルーホール穴は、下面ディップ半田付時に、
半田を上面パターンに誘導する作用をし、上記IC部品
のリードおよび接着材で固定されている面実装部品の電
極に、1度のディップ半田付工程で確実に半田付接続が
できる。
By inserting the lead of the IC component halfway into the through hole, the IC component can be accurately positioned with respect to the circuit board. Furthermore, for general surface-mounted components, they are fixed to the circuit board using an adhesive prior to soldering connection. Through-hole holes are made on the circuit board at positions corresponding to the electrode positions of the components to be mounted, and when dip soldering is performed on the bottom side,
It acts to guide the solder to the upper surface pattern, and can reliably solder connect to the leads of the IC component and the electrodes of the surface mount component fixed with the adhesive in a single dip soldering process.

また、スルーホール穴を介して半田が上面に誘導される
ことにより半田付接続を可能とする方法であるのでディ
ップ方向によりIC部品のリード部等に半田ブリッジが
発生することはない。
Furthermore, since this method enables solder connection by guiding the solder to the upper surface through the through-hole, no solder bridges will occur in the lead portions of IC components due to the dipping direction.

さらに、ディップ半田付時の浸漬深さやスルーホール穴
径をコントロールすることにより適切な半田量で半田付
ができる。
Furthermore, by controlling the immersion depth and through-hole diameter during dip soldering, it is possible to solder with an appropriate amount of solder.

〔実施例〕〔Example〕

以下本発明の実施例について説明する。 Examples of the present invention will be described below.

第1図は、本発明に従ってIC部品1を回路基板3上に
配置して位置決めする状態を示す斜視図である。即ち、
回路基板3において、IC部品1のリード(電極)2に
対応した銅箔パターン6上の位置にスルーホール4を設
置した構成としている。
FIG. 1 is a perspective view showing how an IC component 1 is placed and positioned on a circuit board 3 according to the present invention. That is,
In the circuit board 3, through holes 4 are installed at positions on the copper foil pattern 6 corresponding to the leads (electrodes) 2 of the IC component 1.

第2図は、本発明に従ってIC部品1を回路基板3上の
スルーホール4に挿入配置した状態の断面図である。I
C部品1のリード2がスルーホール4の中に挿入され、
回路基板3の下面よりり−ド2がスルーホール4を突き
抜けて出ない構成とし、このようにIC部品1を回路基
板3上で位置決め配置する。
FIG. 2 is a sectional view of the IC component 1 inserted into the through hole 4 on the circuit board 3 according to the present invention. I
Lead 2 of C component 1 is inserted into through hole 4,
The IC component 1 is positioned and arranged on the circuit board 3 in such a manner that the wire 2 does not penetrate through the through hole 4 from the lower surface of the circuit board 3.

次に、第3図は、第2図の如く位置決めされた状態で回
路基板3の下面よりディップ半田付を行った場合の半田
付接続状態を示す断面図である。
Next, FIG. 3 is a sectional view showing a soldered connection state when dip soldering is performed from the bottom surface of the circuit board 3 in the position as shown in FIG. 2.

回路基板3の下面よりのディップ半田付でスルーホール
4を介して上面に誘導された半田5により電極(リード
)2が確実に半田付接続されていることが認められるで
あろう。
It will be seen that the electrodes (leads) 2 are reliably soldered and connected by the solder 5 guided to the upper surface via the through hole 4 by dip soldering from the lower surface of the circuit board 3.

第4図は、本発明に従ってなされた半田付接続状態の全
体図を示す断面図であり、一度のディップ半田付でチッ
プ部品7b、リード付き挿入部品8、IC部品1等が回
路基板3に半田付接続された状態を示している。
FIG. 4 is a sectional view showing an overall view of the soldered connection state made according to the present invention, in which the chip component 7b, the leaded insertion component 8, the IC component 1, etc. are soldered to the circuit board 3 by one dip soldering. It shows the connected state.

説明を補足すると、IC部品1を第2図を参照して説明
した如くに位置決めすると同時に、第4図において、チ
ップ部品7b牽接着剤10bによって回路基板3の下面
に固着する。またリード付挿入部品8についても、その
リーVをスルーホールに挿入して突き抜けさせる。その
後、ディップ半田付けを回路基板3の下面において一度
行えば、第4図に示した如く、チップ部品7bは半田5
によって回路基板3の下面に半田付は接続され、IC部
品lも第3図を参照して先に説明した如くスルーホール
内への半田の誘導によって回路基板の上面に半田付は接
続され、挿入部品8についても第4図に見られる如くに
半田5によって回路基板3に半田付は接続されるという
わけである。
To supplement the explanation, the IC component 1 is positioned as described with reference to FIG. 2, and at the same time, in FIG. 4, the chip component 7b is fixed to the lower surface of the circuit board 3 by the adhesive 10b. Also, regarding the leaded insertion part 8, the lead V is inserted into the through hole and penetrated. After that, once dip soldering is performed on the bottom surface of the circuit board 3, the chip component 7b is soldered by the solder 5 as shown in FIG.
The solder is connected to the bottom surface of the circuit board 3 by the solder, and the IC component 1 is also soldered to the top surface of the circuit board by guiding the solder into the through hole as explained earlier with reference to FIG. The component 8 is also soldered and connected to the circuit board 3 by the solder 5, as shown in FIG.

第5図は本発明の別の実施例を示す断面図である。同図
において、7はチップ部品、2はその電極(リード)、
3は回路基板、4はスルーホール、5は半田、6は銅箔
パターン、9はオーバーコート、10は接着剤、である
FIG. 5 is a sectional view showing another embodiment of the present invention. In the figure, 7 is a chip component, 2 is its electrode (lead),
3 is a circuit board, 4 is a through hole, 5 is solder, 6 is a copper foil pattern, 9 is an overcoat, and 10 is an adhesive.

本実施例においては、先ず回路基板3に接着剤IOを塗
布し、装着すべきチップ部品7の電極2の先端がスルー
ホール4の上面のほぼ中央にくるようにチップ部品7を
位置決めして接着剤10により接着した後、該接着剤l
Oを硬化させることにより固定する。次に基板3の下面
においてディップ半田付けを行えば、スルーホール4を
介して半田5が上面に誘導され、電極2を銅箔パターン
6に半田付接続することができる。
In this embodiment, adhesive IO is first applied to the circuit board 3, and the chip component 7 is positioned and bonded so that the tip of the electrode 2 of the chip component 7 to be mounted is approximately in the center of the upper surface of the through hole 4. After bonding with the adhesive 10, the adhesive l
It is fixed by curing O. Next, by performing dip soldering on the lower surface of the substrate 3, the solder 5 is guided to the upper surface through the through hole 4, and the electrode 2 can be connected to the copper foil pattern 6 by soldering.

第1図乃至第4図を参照して先に説明した実施例とは、
電極形状が相違し、そのため先の実施例のように、電極
をスルーホールの中へ途中まテ挿入することにより装着
すべき部品の位置決めを行うことができないので、接着
剤を使って位置決め固定を行っている点が相違している
点である。
The embodiments described above with reference to FIGS. 1 to 4 are as follows:
Since the electrode shapes are different, it is not possible to position the parts to be installed by inserting the electrode halfway into the through hole as in the previous example, so we used adhesive to position and fix the part. The difference is in what they do.

本実施例によっても、回路基板の両面への部品実装を一
度のディップ半田付工程で行えることは容易に理解でき
るであろう。
It will be easily understood that according to this embodiment as well, components can be mounted on both sides of the circuit board in a single dip soldering process.

第6図、第7図はそれぞれ本発明の更に別の実施例を示
す断面図であるが、何れも電極2の形状が第5図の実施
例のそれと相違しているだけで、他の点は第5図の実施
例の場合と変わる所がない。
6 and 7 are cross-sectional views showing still other embodiments of the present invention, but both differ only in the shape of the electrode 2 from the embodiment shown in FIG. 5, and in other respects. There is no difference from the embodiment shown in FIG.

第8図は、第6図、第7図にそれぞれ示した実施例の上
面図であるから、これ以上の説明は不要であろう。
Since FIG. 8 is a top view of the embodiment shown in FIGS. 6 and 7, no further explanation is necessary.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、一度のディンプ半田付で回路基板の上
面、下面同時に部品の面実装ができ、リフロー半田付工
程や手半田付工程が不要となることにより大幅な工数低
減ができる。
According to the present invention, components can be surface-mounted on the upper and lower surfaces of a circuit board simultaneously with one dip soldering process, and the number of man-hours can be significantly reduced by eliminating the need for a reflow soldering process or a manual soldering process.

また、基板下面よりスルーホールを介して上面に誘導さ
れる半田で半田付することにより、安定な半田フィレッ
トが形成でき、高密度パターンにおいても半田ブリッジ
がなく、゛信頼性の高い半田付ができる。
In addition, by soldering with solder guided from the bottom surface of the board to the top surface through through holes, a stable solder fillet can be formed, and there is no solder bridge even in high-density patterns, allowing for highly reliable soldering. .

さらに (1)半田付用パターンとスルーホールを兼用できるた
め面積効率が高く高密度化が可能、(2)IC部品の端
子を最短距離で接続でき、良好な高周波回路形成が可能
、 (3)  リフロー半田付後のそれに伴う洗浄工程が不
要、 (4)IC素体に直接熱が加わらないので熱衝撃が小さ
く信頼性が向上、 等の効果がある。
In addition, (1) the soldering pattern and through hole can be used together, resulting in high area efficiency and high density, (2) the terminals of IC components can be connected at the shortest distance, making it possible to form a good high-frequency circuit; (3) There is no need for a cleaning process after reflow soldering, and (4) heat is not applied directly to the IC element, so thermal shock is small and reliability is improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に従ってIC部品を基板上に配置しよう
とするときの状況を示す斜視図、第2図は本発明に従っ
てIC部品を基板上に装着した状況を示す側断面図、第
3図は本発明に従って半田付工程を実施した状況を示す
側断面図、第4図は本発明を実施したときの全体状況を
示す側断面図、第5図乃至第7図はそれぞれ本発明の他
の実施例を説明するための側断面図、第8図は第6図、
i7図に示した実施例の上面図、第9図は従来方法によ
って部品を装着した状況を示す側断面図、第10図は従
来方法によって部品を位置決めするときの様子を示す斜
視図、第11図はIC部品の二側を示す外形図、第12
図は部品の回路基板への従来の実装方法を示す説明図、
である。 符号の説明 1・・・IC部品、1a・・・IC部品の底面、2・・
・電極(リード)、3・・・回路基板、4・・・スルー
ホール、5・・・半田、6・・・銅箔パターン、7・・
・チップ部品、8・・・リード付挿入部品、9・・・オ
ーバーコート、10・・・接着剤 Ll 図 第2 図 貰3 図 @4 ■ チ21部品 1X5図 茗6 図 C 遍7図 zS 図 漠9 ■ 答10 囚 第11図 412図
FIG. 1 is a perspective view showing a situation when IC components are placed on a board according to the present invention, FIG. 2 is a side sectional view showing a situation where IC components are mounted on a board according to the invention, and FIG. 4 is a side sectional view showing the overall situation when the present invention is implemented, and FIGS. A side sectional view for explaining the embodiment, Fig. 8 is Fig. 6,
A top view of the embodiment shown in Fig. i7, Fig. 9 is a side sectional view showing the state in which parts are mounted by the conventional method, Fig. 10 is a perspective view showing the situation when positioning the parts by the conventional method, and Fig. 11 The figure is an outline drawing showing the two sides of the IC component, No. 12.
The figure is an explanatory diagram showing the conventional method of mounting components on a circuit board.
It is. Explanation of symbols 1...IC component, 1a...bottom of IC component, 2...
・Electrode (lead), 3... Circuit board, 4... Through hole, 5... Solder, 6... Copper foil pattern, 7...
・Chip parts, 8... Insert parts with leads, 9... Overcoat, 10... Adhesive Ll Figure 2 Figure 3 Figure @ 4 ■ Chi21 parts 1X5 Figure 6 Figure C Iten 7 Figure zS Illustrated 9 ■ Answer 10 Prisoner Figure 11 Figure 412

Claims (2)

【特許請求の範囲】[Claims] 1.回路基板の上面と下面に部品を実装することの可能
な両面回路基板において、上面実装部品の電極部に対向
する位置にスルーホールを形成する段階と、下面実装部
品を取りつけるときは該部品を下面に固定する段階と、
回路基板の下面よりディップ半田付けを行い、その際、
スルーホールを介して下面側から上面側へ誘導される半
田により上面実装部品の電極部を半田付接続すると共に
、下面実装部品の電極部をも半田付接続する段階と、を
含むことを特徴とする部品の回路基板への実装方法。
1. In a double-sided circuit board that allows components to be mounted on the top and bottom surfaces of the circuit board, there is a step in which through-holes are formed at positions facing the electrodes of top-mounted components, and a step in which the components are mounted on the bottom surface when mounting bottom-mounted components. a step of fixing the
Dip soldering is performed from the bottom of the circuit board, and at that time,
The method is characterized by comprising the step of soldering and connecting the electrode portions of the top surface mount component with the solder guided from the bottom surface side to the top surface side through the through hole, and also connecting the electrode portions of the bottom surface mount component by soldering. How to mount components on a circuit board.
2.請求項1に記載の部品の回路基板への実装方法にお
いて、前記スルーホールが上面実装部品の回路基板に対
する位置決め用に利用されて該実装部品の電極がスルー
ホールの途中まで挿入されていることを特徴とする部品
の回路基板への実装方法。
2. In the method of mounting a component on a circuit board according to claim 1, the through hole is used for positioning the top surface mounted component with respect to the circuit board, and the electrode of the mounted component is inserted halfway into the through hole. How to mount featured components onto a circuit board.
JP12666289A 1989-05-22 1989-05-22 Mounting method for component on circuit substrate Pending JPH02306692A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12666289A JPH02306692A (en) 1989-05-22 1989-05-22 Mounting method for component on circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12666289A JPH02306692A (en) 1989-05-22 1989-05-22 Mounting method for component on circuit substrate

Publications (1)

Publication Number Publication Date
JPH02306692A true JPH02306692A (en) 1990-12-20

Family

ID=14940766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12666289A Pending JPH02306692A (en) 1989-05-22 1989-05-22 Mounting method for component on circuit substrate

Country Status (1)

Country Link
JP (1) JPH02306692A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53147263A (en) * 1977-05-26 1978-12-21 Matsushita Electric Ind Co Ltd Method of soldering wiring substrate of electronic part
JPS55140293A (en) * 1979-04-19 1980-11-01 Tokyo Shibaura Electric Co Method of fabricating hybrid integrated circuit
JPS60130894A (en) * 1983-12-19 1985-07-12 三菱電機株式会社 Method of mounting electronic part

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53147263A (en) * 1977-05-26 1978-12-21 Matsushita Electric Ind Co Ltd Method of soldering wiring substrate of electronic part
JPS55140293A (en) * 1979-04-19 1980-11-01 Tokyo Shibaura Electric Co Method of fabricating hybrid integrated circuit
JPS60130894A (en) * 1983-12-19 1985-07-12 三菱電機株式会社 Method of mounting electronic part

Similar Documents

Publication Publication Date Title
US6623283B1 (en) Connector with base having channels to facilitate surface mount solder attachment
JPH0555438A (en) Lead terminal structure of electronic component
KR100277509B1 (en) Electronic Component Mounting Board
KR100353231B1 (en) Printed-Wiring Board Manufacturing Method, the Printed-Wiring Board, and Double-sided Pattern Conducting Component Used Therein
JPH02306692A (en) Mounting method for component on circuit substrate
CN216146519U (en) Connecting structure of surface-mounted element
JPH0739260Y2 (en) Hybrid integrated circuit device
JPH04158594A (en) Method of mounting electronic parts on electronic circuit board
JPS631093A (en) Electronic parts mounting board device
JPS59172290A (en) Method of connecting both-side printed circuit board
JPS6236316Y2 (en)
JPS60218900A (en) Printed circuit board
JPH051906Y2 (en)
JPH04122055A (en) Preliminary soldering jig and holder of electronic part
JPS62154610A (en) Structure of coil
JPS61191095A (en) Circuit apparatus and manufacture thereof
JPS62243393A (en) Printed board
JPS6114791A (en) Printed board for mounting electronic part
JPH04291987A (en) Packaging structure of surface mounted parts
JPS63239965A (en) Semiconductor device
JPH08222826A (en) Printed wiring board
JPH0533566U (en) Integrated circuit component mounting structure
JPH0710969U (en) Printed board
JPS62104148A (en) Package of electronic circuit part
JPH09326545A (en) Printed wiring board mounted with surface-mount component, printed wiring board, and chip surface mount component