JPH02303029A - Plasma electrode - Google Patents

Plasma electrode

Info

Publication number
JPH02303029A
JPH02303029A JP12281289A JP12281289A JPH02303029A JP H02303029 A JPH02303029 A JP H02303029A JP 12281289 A JP12281289 A JP 12281289A JP 12281289 A JP12281289 A JP 12281289A JP H02303029 A JPH02303029 A JP H02303029A
Authority
JP
Japan
Prior art keywords
electrode
plates
electrode plate
substrate
plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12281289A
Other languages
Japanese (ja)
Inventor
Takamasa Fujiwara
藤原 琢正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP12281289A priority Critical patent/JPH02303029A/en
Publication of JPH02303029A publication Critical patent/JPH02303029A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To improve the uniformity of a film thickness in a batch by a method wherein dummy substrates for impedance correction use are provided and the impedances between electrode plates are corrected so as to become uniform over the whole region of each electrode plate. CONSTITUTION:If there is a gap between substrates 4 and electrode plates 2, different contact resistances and different capacitances are generated according to the flatnesses of the plates 2 and the degree of roughness of the surfaces of the plates 2. Moreover, by the plates 2, variation is generated in the impedances between the upper and lower electrode plates over the whole region of each electrode plate. There, the resistance and capacitance of each dummy electrode 6 are matched to the variation of the impedance of each plate 2 and the impedances between the upper and lower electrode plates can be uniformly matched to each other properly over the whole region of each electrode plate. Thereby, plasma power is uniformly distributed between the plates 2 and a film having a good uniformity can be deposited on each substrate 4. Moreover, the substrates 4 are respectively mounted to the lower part of each plate 2 by fixing jigs 5 and the above effect is fulfilled.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、膜厚の均一性のよい膜成長が要求されるプラ
ズマCVD装置等のプラズマ反応に用いる。プラズマ電
極に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is used for plasma reactions in plasma CVD apparatuses and the like that require film growth with good film thickness uniformity. It relates to plasma electrodes.

(従来の技術) 近年、大量バッチ処理が可能な縦型プラズマCVD8置
が開発され実用化されているが、その電極として縦型多
層平行平板型プラズマ電極が用いられている。
(Prior Art) In recent years, a vertical plasma CVD device capable of large-scale batch processing has been developed and put into practical use, and a vertical multilayer parallel plate plasma electrode is used as the electrode thereof.

以下に従来のプラズマと電極の構成の一例を第3図を用
いて説明する。
An example of a conventional plasma and electrode configuration will be described below with reference to FIG.

第3図において、1はプラズマを発生させるための高周
波電源、2は上下方向に対向して配列された電極板、3
は棒状のリードW1極であり、電極板2に1枚おきにつ
ながっている。4は膜を堆積する基板であり、電極板2
の上面に置き対向する電極板間にプラズマを発生させプ
ラズマ反応によりJ![4上に囚を堆積するようになっ
ている。
In FIG. 3, 1 is a high-frequency power source for generating plasma, 2 is an electrode plate arranged vertically facing each other, and 3 is a high-frequency power source for generating plasma.
is a rod-shaped lead W1 pole, which is connected to every other electrode plate 2. 4 is a substrate on which a film is deposited, and electrode plate 2
Plasma is generated between the opposing electrode plates placed on the top surface of the J! [Prices are now deposited on top of 4.

第4図に、電極板の上に基板を置きプラズマ反応が起こ
っている時の対向する一組の電極板間の等価回路を示す
、第4図において、11は上部電極板、12は下部電極
板であり、その間の容量成分と抵抗成分を以下に説明す
る。
Figure 4 shows an equivalent circuit between a pair of opposing electrode plates when a substrate is placed on the electrode plate and a plasma reaction is occurring. In Figure 4, 11 is the upper electrode plate, 12 is the lower electrode plate. The capacitance and resistance components between them will be explained below.

16は空間容量で、基板上表面から上部電極板までの容
量である。 14は基板抵抗である。13は接触抵抗で
あり、基板と下部電極板の間に生ずるものである。
16 is a space capacitance, which is the capacitance from the upper surface of the substrate to the upper electrode plate. 14 is a substrate resistance. Reference numeral 13 denotes contact resistance, which occurs between the substrate and the lower electrode plate.

15は容量であり電極板及び基板が完全な平面でないた
めに生ずるすきまに起因するものである。
15 is a capacitance, which is caused by a gap caused by the fact that the electrode plate and the substrate are not perfectly flat.

多数ある電極板の各々について1表面の平坦度は同一で
ないため接触抵抗13と容量15は、多数ある電極板の
各々について異なり、ばらつく。
Since the flatness of one surface of each of the many electrode plates is not the same, the contact resistance 13 and capacitance 15 are different and vary for each of the many electrode plates.

したがって上部電極板11−下部電極板12間に生ずる
インピーダンスは、電極全域にわたって同一でなくなり
、各々の電極板間にプラズマ電力が均等に配分されなく
なり、膜を堆積する際、特定の電極板上の基板上に堆積
される膜厚が常に平均より厚い、あるいは薄い等の問題
が生じ、同一バッチ内での膜厚の均一性が悪くなる。
Therefore, the impedance generated between the upper electrode plate 11 and the lower electrode plate 12 is no longer the same over the entire electrode area, and plasma power is not evenly distributed between each electrode plate. A problem arises in that the thickness of the film deposited on the substrate is always thicker or thinner than average, resulting in poor uniformity of film thickness within the same batch.

(発明が解決しようとする課題) このように、従来の縦型多層平行平板型プラズマ電極で
は、膜を堆積する際、同一バッチ内で膜厚の均一性が悪
いという課題を有していた。
(Problems to be Solved by the Invention) As described above, the conventional vertical multilayer parallel plate plasma electrode has a problem in that the uniformity of the film thickness within the same batch is poor when depositing a film.

本発明は、上記従来の課題を解決するもので、同一バッ
チ内で膜厚の均一性を向上させることを目的とするプラ
ズマ電極である。
The present invention solves the above-mentioned conventional problems, and is a plasma electrode whose purpose is to improve the uniformity of film thickness within the same batch.

(課題を解決するための手段) この目的を達成するため、本発明のプラズマ電極は、各
々の電極板の下面に基板をとりつけることが可能な固着
治具を有している。
(Means for Solving the Problem) In order to achieve this object, the plasma electrode of the present invention has a fixing jig that can attach a substrate to the lower surface of each electrode plate.

(作 用) この構造によると、電極板下部にインピーダンス補正用
のダミー基板を固着治具を用いて取りつけ、対向する電
極板間のインピーダンスが電極全域にわたって均一にな
るように補正するために。
(Function) According to this structure, a dummy substrate for impedance correction is attached to the lower part of the electrode plate using a fixing jig, and the impedance between opposing electrode plates is corrected to be uniform over the entire electrode area.

ダミー基板の抵抗、容量、材質を適切に選ぶことができ
、膜を堆積する際、電極板間のインピーダンスの違いに
よって、プラズマ電力が各電極板によって異なることに
よる同一バッチ内での膜厚の不均一性を改善することが
できる。
The resistance, capacitance, and material of the dummy substrate can be appropriately selected, and when depositing a film, the difference in impedance between the electrode plates causes the plasma power to differ between each electrode plate, resulting in film thickness variations within the same batch. Uniformity can be improved.

(実施例) 以下1本発明の一実施例について1図面を参照しながら
説明する。
(Example) An example of the present invention will be described below with reference to one drawing.

第1図は、本発明の実施例におけるプラズマ電極の構造
を示すものである。第1図において、1は高周波電源、
2は電極板、3は棒状のリード電極であり、電極板2に
1枚おきにつながっている。
FIG. 1 shows the structure of a plasma electrode in an embodiment of the present invention. In Figure 1, 1 is a high frequency power supply;
2 is an electrode plate, and 3 is a rod-shaped lead electrode, which is connected to every other electrode plate 2.

4は膜を堆積する基板である。5はセラミックから成る
固着治具であり、基板を電極板2の下面に置くためのも
のである。6はインピーダンス補正用のダミー基板であ
り、固着治具5を用いて各電極板の下面にとりつけられ
ている。
4 is a substrate on which a film is deposited. A fixing jig 5 is made of ceramic and is used to place the substrate on the lower surface of the electrode plate 2. Reference numeral 6 denotes a dummy substrate for impedance correction, which is attached to the lower surface of each electrode plate using a fixing jig 5.

第2図は、以上のように構成されたプラズマ電極の対向
する1組の電極板間の等価回路を示したもので、この図
に基づいて、11の上部電極板、12の下部電極板の間
に生ずる抵抗成分と容量成分を以下に説明する。第2図
において、16は空間容量で対向する基板表面間の容量
、14は基板抵抗、13は接触抵抗であり、基板と電極
板の間に生ずるものである。15は8欧で、電極板と基
板が完全に密着していないことにより生ずるすきまに起
因するものである。ここで接触抵抗13と容量15が電
極板の平坦度や表面の凹凸の度合により、各電極板によ
って異なるので上部電極板11−下部電極板12の間の
インピーダンスは、電極全域にわたってばらつきが生ず
るが、ダミー基板6の抵抗と容量を各電極板のばらつき
に合せて適切に選ぶことにより、電極全域にわたって、
上部型横板11−下部iT!極板12の間のインピーダ
ンスを均一にそろえることが可能で、プラズマ電力が各
電極板間に均一に配分され、電極板上部に置かれた基板
4に、均一性のよい膜を堆積することができる。ダミー
基板6の容量と抵抗を変えるためには、抵抗率の異なる
基板の裏面に100人〜3000人の酸化膜を、別のC
VD装にで堆積すればよい。
Figure 2 shows an equivalent circuit between a pair of opposing electrode plates of the plasma electrode configured as described above. The resulting resistance component and capacitance component will be explained below. In FIG. 2, 16 is a space capacitance between opposing substrate surfaces, 14 is a substrate resistance, and 13 is a contact resistance, which occurs between the substrate and the electrode plate. No. 15 is 8%, which is caused by a gap caused by the electrode plate and the substrate not being in complete contact with each other. Here, since the contact resistance 13 and capacitance 15 differ depending on each electrode plate depending on the flatness of the electrode plate and the degree of surface unevenness, the impedance between the upper electrode plate 11 and the lower electrode plate 12 will vary over the entire electrode area. By appropriately selecting the resistance and capacitance of the dummy substrate 6 according to the variations in each electrode plate,
Upper type horizontal plate 11-lower iT! It is possible to make the impedance between the electrode plates 12 uniform, the plasma power is evenly distributed between each electrode plate, and a highly uniform film can be deposited on the substrate 4 placed on the electrode plate. can. In order to change the capacitance and resistance of the dummy substrate 6, an oxide film of 100 to 3000 layers is coated on the back side of the substrate with different resistivity, and a different C.
It can be deposited on a VD system.

以上のように1本実施例によれば、電極板下部にインピ
ーダンス補正用のダミー基板を固着治具を用いて取りつ
けることにより、電極板上部に置いた基板に膜厚均一性
の良い膜を堆積させることが可能になった。
As described above, according to this embodiment, by attaching a dummy substrate for impedance correction to the lower part of the electrode plate using a fixing jig, a film with good film thickness uniformity is deposited on the substrate placed above the electrode plate. It is now possible to do so.

なお、本実施例において、6はダミー基板としたが、膜
厚均一性を問題にしない場合、膜を堆積させる基板とし
てもよい。
In this embodiment, 6 is a dummy substrate, but if film thickness uniformity is not an issue, it may be used as a substrate on which a film is deposited.

また、本実施例においては、プラズマ電極を膜を堆積す
るCvD装置に用いたが、エツチング装置に用いてもよ
いことは言うまでもない。
Further, in this embodiment, the plasma electrode was used in a CvD apparatus for depositing a film, but it goes without saying that it may also be used in an etching apparatus.

(発明の効果) 以上のように、本発明は、電極板の下面に固着治具を使
って基板をとりつけることを可能にする構造とすること
によって、膜厚均一性のよい膜を基板上に堆積すること
ができる優れたプラズマ電極を実現できるものであり、
かつ電極板の上面にのみ基板を取りつける場合に比較し
て上下両面に被反応基板を取りつけることが可能となり
、一度に処理できる基板の量を2倍とすることができる
(Effects of the Invention) As described above, the present invention has a structure that allows the substrate to be attached to the lower surface of the electrode plate using a fixing jig, thereby forming a film with good film thickness uniformity on the substrate. It is possible to realize an excellent plasma electrode that can be deposited,
Moreover, compared to the case where the substrate is attached only to the upper surface of the electrode plate, it becomes possible to attach the reacted substrate to both the upper and lower surfaces, and the amount of substrates that can be processed at one time can be doubled.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例におけるプラズマ電極の構成図
、第2図は本発明の実施例におけるプラズマ電極の対向
する電極板の間の等価回路図、第3図は従来のプラズマ
電極の植成図、第4図は従来のプラズマ電極の対向する
電極板の間の等価回路図である。 1 ・・・高周波電源、 2・・・電極板、 3・・・
リード電極、4・・・基板、 5・・・固着治具、 6
 ・・・ダミー基板、11・・・上部m極板、12・・
・下部電極板、13・・・接触抵抗、14・・・基板抵
抗、  15・・・容量、16・・・空間容量。 特許出願人 松下電子工業株式会社 代 理 人   星  野  恒  司   I第1図 第2図 第3図
Fig. 1 is a configuration diagram of a plasma electrode in an embodiment of the present invention, Fig. 2 is an equivalent circuit diagram between opposing electrode plates of a plasma electrode in an embodiment of the present invention, and Fig. 3 is an implantation diagram of a conventional plasma electrode. , FIG. 4 is an equivalent circuit diagram between opposing electrode plates of a conventional plasma electrode. 1...High frequency power supply, 2...Electrode plate, 3...
Lead electrode, 4... Board, 5... Fixing jig, 6
...Dummy board, 11... Upper m-electrode plate, 12...
- Lower electrode plate, 13... Contact resistance, 14... Substrate resistance, 15... Capacitance, 16... Space capacitance. Patent applicant Matsushita Electronics Co., Ltd. Agent Hisashi Hoshino Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 縦型多層平行平板型プラズマ電極の各々の電極板の下面
に被反応基板を取りつける固着治具を有することを特徴
とするプラズマ電極。
1. A plasma electrode comprising a fixing jig for attaching a reaction substrate to the lower surface of each electrode plate of a vertical multilayer parallel plate plasma electrode.
JP12281289A 1989-05-18 1989-05-18 Plasma electrode Pending JPH02303029A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12281289A JPH02303029A (en) 1989-05-18 1989-05-18 Plasma electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12281289A JPH02303029A (en) 1989-05-18 1989-05-18 Plasma electrode

Publications (1)

Publication Number Publication Date
JPH02303029A true JPH02303029A (en) 1990-12-17

Family

ID=14845250

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12281289A Pending JPH02303029A (en) 1989-05-18 1989-05-18 Plasma electrode

Country Status (1)

Country Link
JP (1) JPH02303029A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100450634B1 (en) * 2002-08-03 2004-09-30 주식회사제4기한국 Jig assembly used in the semiconductor manufacturing process using the plasma
JP2011119268A (en) * 2011-01-11 2011-06-16 Tokyo Electron Ltd Plasma processing method
CN102970812A (en) * 2011-09-01 2013-03-13 亚树科技股份有限公司 Method for improving plasma uniformity
WO2022044966A1 (en) * 2020-08-26 2022-03-03 株式会社Kokusai Electric Substrate-processing device, method for manufacturing semiconductor device, program, auxiliary plate, and substrate holder

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100450634B1 (en) * 2002-08-03 2004-09-30 주식회사제4기한국 Jig assembly used in the semiconductor manufacturing process using the plasma
JP2011119268A (en) * 2011-01-11 2011-06-16 Tokyo Electron Ltd Plasma processing method
CN102970812A (en) * 2011-09-01 2013-03-13 亚树科技股份有限公司 Method for improving plasma uniformity
WO2022044966A1 (en) * 2020-08-26 2022-03-03 株式会社Kokusai Electric Substrate-processing device, method for manufacturing semiconductor device, program, auxiliary plate, and substrate holder
JPWO2022044966A1 (en) * 2020-08-26 2022-03-03
TWI798760B (en) * 2020-08-26 2023-04-11 日商國際電氣股份有限公司 Substrate processing apparatus, manufacturing method of semiconductor device, substrate holder and program

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