JPH0230181B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to a three-dimensional semiconductor integrated circuit device, which has been attracting attention recently, and is formed by stacking a plurality of semiconductor elements with insulating films interposed between the elements. The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for internally connecting elements in different layers.

[Prior art]

When manufacturing a semiconductor device as described above, internal connection between an upper layer element and a lower layer element is essential, but an appropriate method for this has not yet been developed. Figure 1 is a cross-sectional view showing the state at each process step to explain a possible method by applying the conventional technology.
The first example is the connection between the upper layer element and the lower layer element.
A case is shown in which a layer element is connected to a second layer element directly stacked thereon via a first insulating layer. In the figure, 1 is the first layer element, 2 is the second layer element, and 3 is the first layer element.
a first insulating film between the layer element 1 and the second layer element 2;
4 and 5 are respectively on the first layer element 1 and the second layer
These are the parts that are formed on the layer elements and are to be connected to each other. In the above-described structure shown in FIG. 1A, in order to connect the connecting portion 4 of the first layer element 1 and the connecting portion 5 of the second layer element 2, a An insulating film 6 (FIG. 1B) is formed thereon, and an opening 8 is formed on the connecting portion 4 of the first layer of the photosensitive resin film 7 and a connecting portion of the second layer is formed thereon by ordinary photolithography technology. A pattern having openings 9 is formed on 5 (FIG. 1C), and etching is performed using this photosensitive resin film 7 as a mask, so that the connecting portion 4 of the first layer is formed in the opening 10 formed thereon. After exposing the connecting portion 5 of the second layer to the opening 11 formed thereon, the photosensitive resin film 7 is removed (FIG. 1D). Thereafter, as shown in FIG. 1E, a wiring metal layer 12 is formed on the second insulating film 6 including the inside of the openings 10 and 11, thereby connecting the connecting portion 4 of the first layer. It can be connected to the connecting portion 5 of the second layer.

However, in such a method, as is clear from the figure, the opening 1 above the connection portion 4 of the first layer
The base of the second layer element 2 is exposed on the inner surface of the second layer element 0, and the wiring metal layer 12 is in contact with this base, and the second layer element 2 is in contact with the base.
There was a risk that the layer element 2 would lose its function.

[Summary of the invention]

This invention has been made in view of the above points, and uses anisotropic etching technology to form an insulating film that covers the inner surface of the opening formed on the connection portion of the lower layer element. The present invention provides a method for manufacturing a semiconductor device that allows normal connection by forming a metal layer for wiring.

[Embodiments of the invention]

FIG. 2 is a cross-sectional view showing the main points of an embodiment of the present invention at each step of the process. In this embodiment, the processes shown in FIGS. Afterwards, a third insulating film 13 is formed extending from the upper surface of the second insulating film 6 to the inner wall surfaces and bottom surfaces of the openings 10 and 11 (FIG. 2A).
Next, the third insulating film 13 is subjected to anisotropic etching, such as reactive ion etching, in which etching progresses in a straight line, and the etching is stopped when the plane portion perpendicular to the etching direction is removed. Therefore, the third insulating film 13 is left only on the inner surfaces of the openings 10 and 11. As a result, openings 14 and 15 are formed, the sidewalls of which are made of the third insulating film 13, and the bottoms of which expose the connection portions 4 of the first layer and the connection portions 5 of the second layer, respectively.
Figure B). Subsequently, a wiring metal layer 16 is formed on the second insulating film 6 including the insides of the openings 14 and 15, and a photosensitive resin film with a desired pattern is formed thereon by ordinary photolithography. 17 (FIG. 2C), and using this photosensitive resin film 17 as a mask, the wiring metal layer 16 is etched and formed into a desired pattern, and then the photosensitive resin film 17 is removed to form the desired pattern. The connection is completed (Fig. 2D).

〔Effect of the invention〕

As explained above, in this invention, the side wall surface of the opening that penetrates the upper layer element and exposes the connection part of the lower layer element is covered with an insulating film using anisotropic etching technology, so that the semiconductor device In addition to shortening the manufacturing process, the level difference in the opening is reduced, and the wiring metal layer formed through the opening does not contact the base of the element and connects to the connecting part of the lower element. This has the effect of enabling normal connection with the connection portion of the upper layer element and improving reliability.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing the state at each process step to explain a possible manufacturing method using the conventional technology, and FIG. 2 is a cross-sectional view showing the state at each process step of an embodiment of the present invention. FIG. In the figure, 1 is the first layer (lower layer) element, 2 is the second layer (upper layer) element, 3 is the first insulating film, 4 is the connection part of the lower layer element, 5 is the connection part of the upper layer element, and 6 is the connection part of the upper layer element. 2 an insulating film, 10 a first opening, and 11 a second insulating film.
13 is a third insulating film, and 16 is a wiring metal layer. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1. In a semiconductor device formed by stacking a plurality of semiconductor elements with an insulating film in between, a first insulating film is provided on a connecting portion of a lower semiconductor element and on the lower semiconductor element. A first step of forming a second insulating film on the upper layer semiconductor element, a first step of forming a second insulating film on the upper layer semiconductor element, and a connecting portion of the lower layer semiconductor element and the upper layer semiconductor element formed through A first layer extending from the surface of the second insulating film to each of the connecting portions is placed on the connecting portion.
and a second step of forming a second opening, a third step of forming a third insulating film covering the upper surface of the second insulating film and the inner surfaces of the first and second openings.
In the step, the third insulating film is anisotropically etched to remove the third insulating film on the second insulating film, and at the same time, each of the above is etched at the bottom of the first and second openings. 4th to expose the connection part
the upper surface of the second insulating film and the third insulating film.
manufacturing a semiconductor device, comprising a fifth step of forming a wiring metal layer on the inner surfaces of the first and second openings where the insulating film remains, and on the exposed parts of the respective connection parts; Method. 2. The method of manufacturing a semiconductor device according to claim 1, wherein reactive ion etching is used for the anisotropic etching in the fourth step.