JPH0229828A - Logic circuit converting system - Google Patents

Abstract

PURPOSE:To allow the title system to flexibly correspond to a change request in rule application order by applying a rule to a logic circuit in accordance with the application order of the rule. CONSTITUTION:At the time of starting the logic circuit conversion system, a rule application means 14 successively apply rules to a logic circuit in accordance with rule application order specified by a user through a rule application order specifying means to execute circuit conversion. Since the rule application order is applied as a command at the time of starting the system without writing it in a rule or a program, the change and correction of the rule application order can be easily executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a logic circuit conversion system that automatically converts logic circuits based on a rule-based method.

(Prior Art) As digital systems become larger in scale, various automatic logic synthesis systems have been developed for the purpose of improving design efficiency.

These systems automatically generate logic circuits that achieve the desired behavior and logic by inputting logic circuit behavior descriptions and drawings called functional diagrams that represent the functional modules of the circuit to be designed and their connection relationships. . Logic circuit generation processing usually involves the process of generating an internal data structure (non-library-dependent circuit) from an input behavioral description or functional diagram, and then applying logic optimization to the internal data structure and designing the circuit components as the target technology. The process is broadly divided into the process of generating a circuit made of the technology element by performing various conversion processes such as allocation (allocation of cell library elements). The latter process allows users to easily add or delete parts that depend on the library without making major changes to the system (program) itself when the types of cell libraries and library elements used differ. In addition, when developing an optimal circuit generation procedure by attempting circuit generation using various circuit generation procedures during system development, each circuit is A rule-based method is frequently used in which conversion rules are stored in a rule base and applied in a fixed order to perform circuit conversion. This is because each rule is independent from the system (rule processing system), and the above-mentioned changes such as addition and deletion become easy.

Furthermore, "rule pile" compiles the rules in one rule base into an internal format for high-speed execution.
methods are also frequently used.

Here, the conventional method for determining the application order of the above rules is that ``the system selects the first one that matches the activation condition of the rule based on a certain standard'', and the application order of the rules is described as a meta-rule. A method was taken.

In this way, in conventional rule-based logic conversion systems, it is easy to add or delete rules from the rule base, but when you try to change the order of applying rules, it is difficult to change the order of application of rules within the system. It requires the same work as when modifying a normal procedural program, such as "changing the part (program) that has been determined" and "rewriting the meta-rules that describe the order in which rules are applied." There were problems such as "It takes time to compile" and "It takes time to compile."

In this way, in the conventional logic conversion system, the present invention
It is an object of the present invention to provide a logic circuit conversion system that can flexibly respond to frequent requests for changing the rule application order due to differences in libraries or circuit design procedures used by users of the logic circuit conversion system.

[Structure of the invention]

(Means for Solving the Problems) The present invention includes a rule application order designation means for designating the application order of logic circuit conversion rules stored in a rule base, and a logic circuit according to the order given by the designation means. , is characterized by having a rule application means for applying rules.

(Operation) According to the present invention, at the time of starting up the logic circuit conversion system, the rule application means performs the following operations according to the rule application order specified by the user using the rule application order specification means.
Rules are sequentially applied to logic circuits to perform circuit conversion. That is, since the application order of the rules is not written in the rules or programs but is given as a command at system startup, it is possible to easily change and modify the rules and the application order.

(Example) Embodiments of the present invention will be described below based on the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.

The logic circuit data storage unit 11 is network-like data representing the components of a logic circuit and their connection relationships. For simplicity, the types of circuit components are as shown in Figure 2: cell library elements, logic gates such as AND and OR with n inputs (n is an integer of 2 or more) that do not depend on the cell library, register latches, It is assumed that storage elements and functional modules such as selectors and decoders are provided.

The logic circuit conversion rule storage unit 12 inputs initial logic circuit data consisting of library-independent elements obtained by compiling the operational description and functional diagram of the circuit, and inputs necessary information until generating logic circuit data consisting of cell library elements. It stores rules for performing various processes, such as deletion of redundant logic, gate expansion of functional modules, and allocation of cell library elements. Here, each rule is stored in a file with the same name as the rule name. Rule application order specification part 1
Step 3 specifies the application order of the rules contained in the logic circuit conversion rule storage section 12 by creating a command file consisting of a command string in the format shown in FIG.

The rule application unit 14 sequentially reads the commands designated by the rule application order designation unit 13, searches for the designated rule from the logic circuit conversion rule storage unit 12, and applies it to the logic circuit data 11.

This flowchart is shown in FIG. The cell library data storage section 15 stores information such as usable cell types, terminals, and drive capabilities. The rule application unit 14 also uses information in the cell library data storage unit 15 when applying rules regarding cells.

Now, an example will be explained in which a logic circuit consisting of library-independent elements shown in FIG. 2 is converted into a circuit consisting of cells included in a cell library data storage section. For simplicity, the logic circuit conversion rule storage unit 12 stores RED 1. as shown in FIG. Redundant logic gate deletion rule named RED 2, EXADD.

Rules for expanding adders, selectors, and decoders named EXSEL and EXDEC into AND10R gates, DU
Rule for outputting a list of circuit components named MP and their connection relationships, cell library data storage unit 1
It is assumed that a rule with the same name as the cell name in 5 is included. The rule with the same name as the cell name performs the allocation process for the cell, and has an integer greater than or equal to 0 as an argument, and if the argument is a natural number, an element whose identification number is the natural number (each component of the circuit has The above rule is applied to K, and if the argument is 0, all target elements (in the case of EXADD, it is specified for each rule such as addition module). ), for
It is assumed that the rules apply.

It is also assumed that cells with names shown in FIG. 6 are prepared in the cell library.

Now, when a system user uses the cells in FIG. 6 to convert a non-library-dependent circuit to a library-dependent circuit, an example of a command file specified in the rule application order specifying unit 13 is shown in the seventh example. As shown in the figure. When the system is started, the rule application unit 14 reads the commands shown in FIG. 7 one by one and applies the rules to the given non-library dependent circuit according to the flow shown in FIG. That is, according to the commands in FIG. 7, redundant logic deletion (1st to 2nd lines), allocation of decoders, selectors, and adder cells (3rd to 7th lines), and decoders, selectors, and adders to which cells were not allocated Vessel gate expansion (lines 8-10)
, Redundant logic deletion (11th to 121st to 12th lines p-flop cell allocation (13th to 143rd to 14th lines to cell allocation (1
Processing on lines 5 to 235 to 23 is performed to generate a circuit consisting of cell library elements.

Now, suppose that user B of the system uses the same cell library as the user to convert a non-library-dependent circuit to a library-dependent circuit under the following conditions.

(1) Cell FAI assignment is determined by looking at the components of the circuit immediately before the cell is assigned and their connection relationships,
Individually specify the element to which the cell is assigned.

(2+ AND, OR gate cells are not used.

For (1), it is necessary to generate a circuit immediately before allocating the cell FAI and output a list of its configuration. Therefore, user B only needs to specify a command as shown in FIG. 8 in the rule application order specifying section 13 and start the system. The command is 7 to 2 from the commands in FIG.
It can be generated by simply deleting the 4th line and adding the start command for the rule DUMP (7th line in Figure 8) that outputs the list.

When the command in Figure 8 is executed by 70- in Figure 4 - List of circuits and their configurations that performed redundant logic deletion (1st to 2nd lines), decoder, and selector assignment (3rd to 6th lines) (
7th line) is output. Next, user B may designate each component to which a cell FAI is to be assigned while looking at the configuration list.

An example of such a command is shown in FIG. Figure 9 1-8
The row 1 indicates that cells FAI are assigned only to circuit elements having identification numbers 20 to 23 and 36 to 39. Furthermore, because of the condition (2), the 91st dAN3, AN2, OR3
, OR2 is not included. If you start the system and apply the commands in Figure 9 to the circuit after applying the commands in Figure 8, (1) and (2)
) A circuit desired by user B is generated that satisfies the conditions. Here, the command shown in FIG. 9 can be easily created by simply adding commands for allocating cell FAI to lines 1 to 7, lines 15 to 195 to 19 of the command shown in FIG.

As described above, according to this embodiment, the application order of the rules stored in the logic circuit conversion rule storage unit 12 can be given by command at the time of system startup, so there is no need to modify or compile the rules or programs. It is possible to easily change the order of application without having to do so. 7 Note that the present invention is not limited to the embodiments described above. For example, a conventional meta-rule may be used, such as "prepare a plurality of meta-rules that control the application order of several logic circuit conversion rules, and specify the application order of the meta-rules using the rule application order specifying unit 13." It is also possible to use a combination of the rule control method according to the method according to the present invention and the method according to the present invention.

〔Effect of the invention〕

As described above, according to the present invention, the order in which logic circuit conversion rules are applied is changed to whether the logic circuit conversion rules are applied or not. Since it can be given as a command when starting the system, it is possible to easily change the application order of the rules without modifying or compiling the rules or programs. Flexible to meet various requests such as "procedure for allocating library elements" and "method of dividing the circuit generation process (dividing the circuit generation process into multiple steps and starting the system the number of times to generate the final circuit)" can be accommodated.

[Brief Description of the Drawings] Fig. 1 is a configuration diagram of a logic circuit conversion system according to an embodiment of the present invention, FA2 is a diagram showing classification of components of logic circuit data, and Fig. 3 is a diagram of circuit conversion rules. FIG. 1 shows the format of the command that specifies the order of application. FIG. 4 is a processing flow diagram of the rule application unit 14 in FIG. 1, and FIG. , FIG. 6 is a diagram showing an example of commands specified by the cell line 13. 11... Logic circuit data storage section, 12... Logic circuit conversion rule storage section, 13... Rule application order designation section, 14°/° rule application section, 15... Cell library data storage section.

Claims (1)

[Scope of Claims] In a system that has logic circuit conversion rules as a rule base and converts a logic circuit by executing the rules in the rule base, a rule application order designation means for specifying the application order of the rules; A logic circuit conversion system comprising: rule application means for applying rules to the logic circuit according to the order given by the means.