JPH02298049A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPH02298049A
JPH02298049A JP11962189A JP11962189A JPH02298049A JP H02298049 A JPH02298049 A JP H02298049A JP 11962189 A JP11962189 A JP 11962189A JP 11962189 A JP11962189 A JP 11962189A JP H02298049 A JPH02298049 A JP H02298049A
Authority
JP
Japan
Prior art keywords
fuse
fuse elements
width
elements
fuse element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11962189A
Other languages
Japanese (ja)
Inventor
Daijiro Inami
井波　大二郎
Yuichi Sato
勇一 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Miyagi Ltd
Original Assignee
NEC Corp
NEC Miyagi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Miyagi Ltd filed Critical NEC Corp
Priority to JP11962189A priority Critical patent/JPH02298049A/en
Publication of JPH02298049A publication Critical patent/JPH02298049A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the number of fuse elements and to reduce their layout area by a method wherein a plurality of fuse elements connected in parallel are installed, a width of a blowing part for each fuse element is made slender and a width of the blowing part is different at each fuse element. CONSTITUTION:Fuse elements F1, F2, F3 are connected in parallel between metal wiring parts 2, 2; widths of fuse blowing parts F'1, F'2, F'3 for the individ ual fuse elements F1, F2, F3 are made slender; their widths W2, W3, W4 are made different at the individual fuse elements F1, F2, F3; a total length (L1+L2+L3) and a width W1 are made identical. Thereby, electric currents I1, I2, I3 flowing in the fuse elements F1, F2, F3 are made equal by a voltage VF which is applied between pads P1 and P2; when the voltage VF to be applied is adjusted, only the arbitrary number of fuse elements can be blown from the three fuse elements. Accordingly, even when a resistance value is set with good accuracy over a wide range, the number of resistances can be made small as compared with conventional methods; in addition, the number of pads for voltage application use can be reduced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体集積装置、特にヒユーズ回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor integrated device, and particularly to a fuse circuit.

〔従来の技術〕[Conventional technology]

半導体集積装置のヒユーズ回路に用いられる従来のヒユ
ーズ素子の一例を第２図に示す。図において、ヒユーズ
素子Ｆ１はその両端の電極取り出し口１が金属配線２に
それぞれ接続され、各金属配線２は印加電圧用パッドＰ
、、Ｐ２に固定されている。FIG. 2 shows an example of a conventional fuse element used in a fuse circuit of a semiconductor integrated device. In the figure, the electrode outlet ports 1 at both ends of the fuse element F1 are connected to metal wirings 2, and each metal wiring 2 is connected to a pad P for applied voltage.
,, is fixed at P2.

ヒユーズ素子はもとよりヒユーズを切断した場合と、切
断しない場合とのいずれかの状態を設定するものである
。The state of the fuse element is set either when the fuse is cut or when it is not cut.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のヒユーズ素子はヒユーズを切断した場合
と、切断しない場合とのいずれかの状態に設定されるの
で、例えば、第３図に示すように、端子Ａ、Ｂ間の抵抗
値ＲＡＢを広範囲に渡り精度良く設定するためには、前
記ヒユーズ素子Ｆ２〜Ｆ、を多数必要とする。そのため
、回路規模が大きくなり、また、外部より電源を印加す
るためのバッドＰ１〜Ｐ６が多数必要となるので、特に
半１体集積回路ではそのレイアウト面積が大きくなると
いう欠点がある。The conventional fuse element described above is set to either the state where the fuse is cut or the fuse is not cut, so for example, as shown in Fig. In order to set accurately over the period, a large number of the fuse elements F2 to F are required. This increases the circuit scale and requires a large number of pads P1 to P6 for applying power from the outside, which has the disadvantage that the layout area becomes large, especially in semi-integrated circuits.

本発明の目的は上記欠点を解消した半導体集積装置のヒ
ユーズ回路を提供することにある。An object of the present invention is to provide a fuse circuit for a semiconductor integrated device that eliminates the above-mentioned drawbacks.

〔課題を解決するための手段〕[Means to solve the problem]

前記目的を達成するため、本発明は半導体集積回路にお
いて、並列接続した複数のヒユーズ素子を備え、各ヒユ
ーズ素子の切断部分の幅を細くし、かつ、前記切断部分
の幅を各ヒユーズ素子ごとに異ならせたものである。In order to achieve the above object, the present invention provides a semiconductor integrated circuit including a plurality of fuse elements connected in parallel, the width of the cut portion of each fuse element being narrowed, and the width of the cut portion being different for each fuse element. It is different.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例を示す構成図である。FIG. 1 is a block diagram showing an embodiment of the present invention.

第１図に示すように、金属配線２，２間にヒユーズ素子
Ｆ工ＩＦｌｌＦ３を並列接続し、各ヒユーズ素子Ｆｔ。As shown in FIG. 1, a fuse element F IFllF3 is connected in parallel between the metal wirings 2 and 2, and each fuse element Ft is connected in parallel.

Ｆ、、Ｆ３のヒユーズ切断部分Ｆ’ｌ＃Ｆ’２１Ｆ’３
の幅を細くし、コノ幅Ｗ、　、ｗ、　、ｗ４を各ヒユー
ズ素子Ｆ、　、Ｆ、　、Ｆ、毎に異ならせてあり、その
全体の長さくり、＋Ｌ２＋Ｌ３）及び幅讐□は同一とし
である。Ｐ工、Ｆ２は印加電圧用パッドである。F,, F3 fuse cut part F'l#F'21F'3
The width of the fuse element F, , F, , F is made different, and the overall length +L2+L3) and width □ are the same. It is. P and F2 are pads for applied voltage.

ここで、一対のパッドＰ□及びＦ２に取り付けられた接
続用金属配線２，２間にそれぞれヒユーズ素子Ｆ、　、
Ｆ２．Ｆ、はその電極取り出し口１によって接続されて
いる。Here, fuse elements F, , and 2 are connected between the connection metal wirings 2 and 2 attached to the pair of pads P□ and F2, respectively.
F2. F is connected through its electrode outlet 1.

本実施例においては、ヒユーズ素子Ｆ１．Ｆ２．Ｆ３に
はポリシリコンを用いて実現することとし、以下の説明
を行うが、その材質は限定されるものではない。In this embodiment, fuse element F1. F2. The following explanation will be given assuming that F3 is realized using polysilicon, but its material is not limited.

ヒユーズ素子Ｆ、　、Ｆ、　、Ｆ、の一部幅を細めた部
分、すなわち、ヒユーズ切断部分をそれぞれＦ’ＬＩＦ
’２１Ｆ／、とする。F'LIF is the part where the width of the fuse elements F, , F, , F is narrowed, that is, the part where the fuse is cut.
'21F/,'

ヒユーズ素子Ｆ１において、切断部分Ｆ１１の抵抗値を
ＲＦ’　、　、切断部分Ｆ１１の右側部分の抵抗値をＲ
Ｆ、ｒ。In the fuse element F1, the resistance value of the cut portion F11 is RF', and the resistance value of the right side of the cut portion F11 is R
F.r.

左側部分の抵抗値をＲＦｌ、とすると、各抵抗値は。If the resistance value of the left side part is RFl, each resistance value is.

となる。ここで、Ｐρはポリシリコンのシート抵抗値で
ある。becomes. Here, Pρ is the sheet resistance value of polysilicon.

ヒユーズ素子Ｆ□全体の抵抗値をＲＦｌとすると、とな
る。If the resistance value of the entire fuse element F□ is RFl, then the following equation is obtained.

今、Ｌｘ　＋　Ｌ２　＞　Ｌ３と設定すると、となり、
ＲＦ’、は無視することができる。Now, if we set Lx + L2 > L3, then
RF', can be ignored.

従って、 とみなせる。Therefore, It can be considered as

同様に、ヒユーズ素子Ｆ２の抵抗値をＲＦ、、切断部分
Ｆ１２の抵抗値をＲＦ’　、、Ｆ７２の右側部分の抵抗
値をＲＦ２ｒ、　Ｆ’、の左側部分の抵抗値をＲＦ、、
、ヒユーズ素子Ｆ、の抵抗値をＲＦ、　、切断部分Ｆ／
、の抵抗値をＲＦ’　、、Ｆｌ、の右側部分の抵抗値を
ＲＦ、ｒ、　Ｆ’、の左側となり、 ＲＦよ＝Ｒら＝ＲＦ。Similarly, the resistance value of the fuse element F2 is RF, the resistance value of the cut portion F12 is RF', the resistance value of the right side of F72 is RF2r, the resistance value of the left side of F' is RF,...
, the resistance value of the fuse element F is RF, , the cutting part F/
The resistance value of , is RF', the resistance value of the right side of Fl, is RF, r, the left side of F', and RF yo = R et al = RF.

となる。becomes.

従って、バッドｐ、、ｐ、間に印加する電圧ＶＦによっ
てヒユーズ索子Ｆ工１Ｆ２１Ｆ３それぞれに流れる電流
Ｉ、、Ｉ、、Ｉ、は、等しくなる。Therefore, the currents I, , I, , I, which flow through each of the fuse cables F 1F 21F 3 due to the voltage VF applied between the pads p, , p, become equal.

ここで、各ヒユーズ素子の切断部分Ｆ’ｉｔ　Ｆ’ｔ１
１”／、で消費される電力をそれぞれ？Ｆ’ｘｈＰＦ”
２ＨＰＦ’２とすれば、 となる。Here, the cut portion F'it F't1 of each fuse element
1"/, respectively?F'xhPF"
If it is 2HPF'2, then it becomes.

一方、ヒユーズ切断部分Ｆ’ｌｌＦ’２１Ｆ’３　は、
許容最大消費電力Ｐｐよりも消費電力ＰＦが超えると溶
断する。ここでは、次の条件を満たすとき、ヒユーズ切
断部分Ｆ’Ｌ、Ｆ’２ＴＦ’３　は溶断する。On the other hand, the fuse cut portion F'llF'21F'3 is
If the power consumption PF exceeds the allowable maximum power consumption Pp, it will melt. Here, when the following conditions are met, the fuse cut portions F'L, F'2TF'3 are blown.

ココで、Ｖ、、Ｖ、、Ｆ３はヒユーズ切断部分Ｆ’ｌ＋
Ｆ’Ｚ＋ｐｌ、のそれぞれ切断耐圧である。Here, V,,V,,F3 is the fuse cutting part F'l+
F'Z+pl is the respective cutting withstand voltage.

以上３式とＷｚ　＜ｗｉ　＜ｗｎの関係よりｖｌ　くＦ
２　くｖ。From the above three equations and the relationship Wz <wi <wn, vl kuF
2.

が成り立つ。holds true.

従って、印加電圧Ｖｌ−が、Ｖ工＜Ｖ’Ｆ　＜ｖｚなら
ば、ヒユーズ切断部分Ｆ′１のみが溶断される。その後
、印加電圧ＶＦをＶ２＜ＶＦ　＜Ｖ３にすると、さらに
ヒユーズ切断部分ＦＬ２が溶断される。また、その後、
印加電圧ＶＦをＶ３　＜ＶＦにすると、さらにヒユーズ
切断部分ＦＪ３が溶断される。Therefore, if the applied voltage Vl- satisfies V<V'F<vz, only the fuse cut portion F'1 is blown. Thereafter, when the applied voltage VF is set to V2<VF<V3, the fuse cutting portion FL2 is further blown. Also, after that,
When the applied voltage VF is set to V3<VF, the fuse cutting portion FJ3 is further blown.

このように、外部からの印加電圧ＶＦを調整することに
より、３本のヒユーズ素子より、任意の数のヒユーズ素
子のみを切断することが可能である。In this way, by adjusting the externally applied voltage VF, it is possible to cut only an arbitrary number of fuse elements out of three fuse elements.

〔発明の効果〕 以上説明したように本発明によれば、抵抗値を広範囲に
渡り精度良く設定する場合においても、従来法に比べ抵
抗数が少なくでき、さらに、印加電圧用パッドの数を少
なくできるので、ヒユーズ回路の面積を小さくすること
ができる効果を有する。[Effects of the Invention] As explained above, according to the present invention, even when setting resistance values over a wide range with high precision, the number of resistors can be reduced compared to the conventional method, and furthermore, the number of applied voltage pads can be reduced. This has the effect of reducing the area of the fuse circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例を示す構成図、第２図は従来
の半導体集積装置におけるヒユーズ回路の一例を示す図
、第３図は従来のヒユーズ素子を適用した一例を示す図
である。 １・・・電極取り出し口　　　２・・・金属配線Ｆ□〜
Ｆｓ・・・ヒユーズ素子 Ｆ／１〜Ｆ１３・・・ヒユーズ切断部分Ｒ０〜Ｒ６・・
・抵抗素子　　Ｐ１〜Ｐ、・・・印加電圧用パッド特許
呂願人　日本電気株式会社 同　上　　宮城日本電気株式会社 ム３ 第１区 第２図 第３図FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing an example of a fuse circuit in a conventional semiconductor integrated device, and FIG. 3 is a diagram showing an example to which a conventional fuse element is applied. . 1... Electrode outlet 2... Metal wiring F□~
Fs...Fuse element F/1~F13...Fuse cutting portion R0~R6...
・Resistance elements P1 to P, ... Applied voltage pad patent applicant NEC Co., Ltd. Same as above Miyagi NEC Co., Ltd. M3 District 1, Figure 2, Figure 3

Claims (1)

【特許請求の範囲】[Claims] （１）半導体集積回路において、並列接続した複数のヒ
ューズ素子を備え、各ヒューズ素子の切断部分の幅を細
くし、かつ、前記切断部分の幅を各ヒューズ素子ごとに
異ならせたことを特徴とする半導体集積回路。(1) A semiconductor integrated circuit comprising a plurality of fuse elements connected in parallel, the width of the cutting portion of each fuse element being narrow, and the width of the cutting portion being different for each fuse element. semiconductor integrated circuits.
JP11962189A 1989-05-12 1989-05-12 Semiconductor integrated circuit Pending JPH02298049A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11962189A JPH02298049A (en) 1989-05-12 1989-05-12 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11962189A JPH02298049A (en) 1989-05-12 1989-05-12 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH02298049A true JPH02298049A (en) 1990-12-10

Family

ID=14765972

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11962189A Pending JPH02298049A (en) 1989-05-12 1989-05-12 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH02298049A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03289168A (en) * 1990-04-06 1991-12-19 Toshiba Corp Manufacture of semiconductor device
JP2007317882A (en) * 2006-05-25 2007-12-06 Renesas Technology Corp Semiconductor device
JP2013229556A (en) * 2012-02-03 2013-11-07 Rohm Co Ltd Chip component and manufacturing method therefor
JP2015079804A (en) * 2013-10-15 2015-04-23 富士電機株式会社 Semiconductor device
JP2020036029A (en) * 2011-09-29 2020-03-05 ローム株式会社 Chip component and method of manufacturing chip component
JP2020057793A (en) * 2012-01-27 2020-04-09 ローム株式会社 Chip resistor and chip component

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03289168A (en) * 1990-04-06 1991-12-19 Toshiba Corp Manufacture of semiconductor device
JP2007317882A (en) * 2006-05-25 2007-12-06 Renesas Technology Corp Semiconductor device
US8331185B2 (en) 2006-05-25 2012-12-11 Renesas Electronics Corporation Semiconductor device having electrical fuses with less power consumption and interconnection arrangement
JP2020036029A (en) * 2011-09-29 2020-03-05 ローム株式会社 Chip component and method of manufacturing chip component
JP2020057793A (en) * 2012-01-27 2020-04-09 ローム株式会社 Chip resistor and chip component
JP2013229556A (en) * 2012-02-03 2013-11-07 Rohm Co Ltd Chip component and manufacturing method therefor
US9972427B2 (en) 2012-02-03 2018-05-15 Rohm Co., Ltd. Chip component and method of producing the same
JP2015079804A (en) * 2013-10-15 2015-04-23 富士電機株式会社 Semiconductor device

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