JPH02297845A - Image forming device - Google Patents
Image forming deviceInfo
- Publication number
- JPH02297845A JPH02297845A JP11740789A JP11740789A JPH02297845A JP H02297845 A JPH02297845 A JP H02297845A JP 11740789 A JP11740789 A JP 11740789A JP 11740789 A JP11740789 A JP 11740789A JP H02297845 A JPH02297845 A JP H02297845A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- electron
- potential
- image forming
- emitting part
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010894 electron beam technology Methods 0.000 claims abstract description 10
- 230000000903 blocking effect Effects 0.000 claims 1
- 230000001678 irradiating effect Effects 0.000 claims 1
- 230000005684 electric field Effects 0.000 abstract description 10
- 238000009413 insulation Methods 0.000 abstract description 3
- 230000002950 deficient Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 description 21
- 239000000758 substrate Substances 0.000 description 12
- 239000011521 glass Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000001771 vacuum deposition Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000002941 palladium compounds Chemical class 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Landscapes
- Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、電子源を用いた画像形成装置に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image forming apparatus using an electron source.
［従来の技術］
従来、平板形画像形成装置は通常、ＩＥＥＥ Ｔｒａｎ
ｓａｃｔｉｏｎ ｏｎ Ｅｌｅｃｔｒｏｎ Ｄｅｖｉｃ
ｅ ｖｏｌ ＥＤ−２’０． Ｎｏ１ｌ。[Prior Art] Conventionally, a flat image forming apparatus usually uses IEEE Tran
saction on Electron Device
e vol ED-2'0. No.1l.
Ｎｏｖ、 １９７３に記載されるデジディスプレイ方式
、ＴＶ学会誌ｖｏ１４０． Ｎｏ１Ｏ，１９８６に記載
されるＭＤＳ（Ｍａｔｒｉｘ Ｄｒｉｖｅ ａｎｄ Ｄ
ｅｆｌｅｃｔｉｏｎ Ｓｙｓｔｅｍ）方式。The digital display method described in Nov. 1973, TV Society Journal vol. 140. MDS (Matrix Drive and D
reflection system) method.
Ｊａｐａｎ Ｄｉｓｐｌａｙ １９８６に記載されてい
るＨＡＶＤ（Ｈｏｒｉｚｏｎｔａｌ Ａｄｄｒｅｓｓ
Ｖｅｒｔｉｃａｌ ｄｅｆｌｅｃｔｉｏｎ）方式、 Ｓ
ＩＤ Ｉｎｔｅｒｎａｔｉｏｎａｌ Ｓｙｍｐｏｓｉｕ
ｍ Ｄｉｇｅｓｔ ｏｆＴｅｃｈｎｉｃａｌ Ｐａｐｅ
ｒｓ、 １９８６に記載されているプラズマ電子源方式
、 Ｊａｐａｎ Ｄｉｓｐｌａｙ １９８６に記載され
ている５ｐｉｎｄｔ方式、特開昭５６−３０２４１に記
載されているコイル状ヒータカソード方式等のように、
電子源と蛍光体が存するフェースプレートとの間に、１
枚以上の電極を配し、かかる電極に引出、変調、収束、
偏向等の機能を持たせている。第７図は、典型的な従来
例を示すＭＤＳ方式のディスプレイの斜視図である。同
第７図より分る通り、これらの方式においては、電子放
出部から発生した電子をフェースプレート方向に引き出
す為の、電子放出部に最も近接している電極（以後第１
電極と呼ぶ）は、第１電極の外部からの影響が電子放出
部に及ばないように外部電位を遮断するように開口の小
さな電極で構成されている。HAVD (Horizontal Address
Vertical deflection) method, S
ID International Symposium
m Digest of Technical Pape
rs, 1986, the 5pindt method described in Japan Display 1986, the coiled heater cathode method described in JP-A-56-30241, etc.
1 between the electron source and the face plate where the phosphor is present.
More than one electrode is arranged, and these electrodes are used for extraction, modulation, convergence,
It has functions such as deflection. FIG. 7 is a perspective view of a typical conventional MDS display. As can be seen from Fig. 7, in these systems, the electrode closest to the electron emitting part (hereinafter referred to as the first electrode) is used to extract electrons generated from the electron emitting part toward the face plate.
The first electrode (referred to as "electrode") is composed of an electrode with a small opening so as to block an external potential so that influences from outside of the first electrode do not reach the electron emitting part.
［発明が解決しようとする課題］
しかしながら、上記従来例では、第１電極の外部からの
影響が、電子放出部に及ばないようにする場合において
、次のような欠点があった。[Problems to be Solved by the Invention] However, the above-mentioned conventional example has the following drawbacks when preventing the influence from the outside of the first electrode from reaching the electron emitting part.
（１）第１電極の開口を小さくする必要が生ずる為、電
子放出部にて発生した電子のうち、一部の電子しか利用
できず、フェースプレート上での輝度が低下する。(1) Since it is necessary to make the opening of the first electrode smaller, only a portion of the electrons generated in the electron emitting section can be used, and the brightness on the face plate decreases.
（２）電子源部が存する基板（以後電子源基板と呼ぶ）
上、電子放出部近傍で引き回された配線の電位に起因す
る力により、電子ビームが本来の軌道からズしてしまう
。(2) Substrate on which the electron source section exists (hereinafter referred to as electron source substrate)
First, the electron beam deviates from its original trajectory due to the force caused by the potential of the wiring routed near the electron emission part.
（３）このズレな防止する為には第１電極電圧（これを
ＶＥＸＴとする）を高（する必要が生じ、これにより第
１電極部の絶縁不良の可能性が増大し、装置の信頼性が
低下する。これは、装置に高解像度が要求される場合に
は特に顕著となる。(3) In order to prevent this deviation, it is necessary to increase the first electrode voltage (this is referred to as VEXT), which increases the possibility of insulation failure in the first electrode part and reduces the reliability of the device. This is particularly noticeable when high resolution is required for the device.
この高解像度が要求される装置においては、各画素に対
応する電子放出部の寸法は小さくなり、数は増大する。In devices that require this high resolution, the dimensions of the electron emitting portions corresponding to each pixel become smaller and the number increases.
しかしながら、電子源を動作するのに必要な、電子源基
板上の配線又は電極は、装置としての消費電力を抑え、
多数の電子源への印加電圧のばらつきを抑える為に、可
能な限り幅広（又は厚（して抵抗を小さくする必要があ
る。この為、電子放出部近傍における電子源基板上の配
線の引き回しに起因する、フェースプレート法線方向（
これをＹ方向とする）に垂直な方向（これをＸ方向とす
る）への力によって、電子軌道がＸ方向に逸脱するとい
う問題が、電子源サイズを小さくすればする程顕著にな
ってくる。この問題を解決するには、Ｘ方向への力に比
して、Ｙ方向への力を増大させる、つまりＶＥＸＴを太
き（する必要を生じる訳である。However, the wiring or electrodes on the electron source board that are necessary to operate the electron source reduce the power consumption of the device.
In order to suppress variations in the voltage applied to a large number of electron sources, it is necessary to make the wiring as wide (or thick) as possible to reduce the resistance. Due to the faceplate normal direction (
The problem that the electron trajectory deviates in the X direction due to a force in the direction perpendicular to the direction (this is the Y direction) (this is the X direction) becomes more prominent as the electron source size becomes smaller. . To solve this problem, it is necessary to increase the force in the Y direction compared to the force in the X direction, that is, to make VEXT thicker.
そこで、この発明においては、以上の様な従来の問題点
を解消させ、電子源から発生した電子を有効に利用しフ
ェースプレート上での輝度を向上させると共に、電子放
出部近傍におけるＸ方向（フェースプレート法線方向に
垂直な方向）への電子ビームのズレを抑制し、低い第１
電極電圧で動作する信頼性の高い画像形成装置を提供す
ることを目的とする。Therefore, in the present invention, the above-mentioned conventional problems are solved, and the brightness on the face plate is improved by effectively utilizing the electrons generated from the electron source. This suppresses the deviation of the electron beam in the direction perpendicular to the plate normal direction, and reduces the
An object of the present invention is to provide a highly reliable image forming apparatus that operates using electrode voltage.
［課題を解決するための手段及び作用］この目的を達成
するために、この発明は次のような構成としている。即
ち、この発明に係る画像形成装置は、第１電極の電子通
過孔を通して、外部電位の影響が電子放出部近傍にまで
及ぶ様にし、これによって、電子がＹ方向に受ける力の
原因となるＹ方向の電場の大きさＥＹが、電子源基板上
の配線の電位によるＸ方向の力の原因となるＸ方向電場
の大きさＥｘよりも大きくとる構成とすることにより、
電子放出部から発生した電子を有効に利用すると共に、
電子軌道のＸ方向へのズレを小さく抑えられるようにし
たものである。[Means and operations for solving the problem] In order to achieve this object, the present invention has the following configuration. That is, in the image forming apparatus according to the present invention, the influence of the external potential extends to the vicinity of the electron emitting part through the electron passage hole of the first electrode, thereby causing the Y By adopting a configuration in which the magnitude of the electric field in the direction EY is larger than the magnitude of the electric field in the X direction Ex, which causes the force in the X direction due to the potential of the wiring on the electron source substrate,
In addition to effectively utilizing the electrons generated from the electron emission part,
This makes it possible to suppress the deviation of the electron orbit in the X direction.
これらを実現する為の画像形成装置の構成例は、次の如
（なる。即ち、電子放出部と第１電極との間の距離なｄ
ｏ、第１電極の電子通過孔の最大開口径を！、第１電極
とターゲット電極との間の距離をｄ Ｍ Ｔ ｒ高電位
側配線と低電位側配線との間の距離をＷＳ、ターゲット
電位をＶア、第１電極電位なＶＥＸア、電子放出素子配
線間電位差（即ち、高電位側電極電位と低電位側電極電
位との電位差）をＶｒとした時、
を満たす構成としたものである。An example of the configuration of an image forming apparatus for realizing these is as follows.
o, the maximum opening diameter of the electron passage hole of the first electrode! , the distance between the first electrode and the target electrode is d M T r the distance between the high potential side wiring and the low potential side wiring is WS, the target potential is V a, the first electrode potential is VEX a, electron emission When the potential difference between the element wirings (that is, the potential difference between the high-potential side electrode potential and the low-potential side electrode potential) is Vr, the structure satisfies the following.
［実施例］ この発明の実施例を、図面に沿って詳細に説明する。[Example] Embodiments of the invention will be described in detail with reference to the drawings.
東」１糺１
この発明の第１の実施例を第１図、第２図及び第３図に
沿って説明する。第１図（ａ）は、本発明の実施例で用
いる画像形成装置を示す基本構成図である。本構成に当
たって電子源としては、特願昭６２−１７４８３７等で
技術開示されている表面伝導形電子放出素子を使用した
。第１図において、１はガラス基板、２は高電位側電圧
供給用配線、２ａは表面伝導形電子放出素子の高電位側
電極、３は低電位側電圧供給用配線、３ａは表面伝導形
電子放出素子の低電位側電極、４は電子放出部、５は電
子通過孔、６は第１電極である変調電極、７はガラス体
、８は透明電極、９は蛍光体、ｌＯはフェースプレート
、１１は蛍光体の輝点である。A first embodiment of the present invention will be described with reference to FIGS. 1, 2, and 3. FIG. 1(a) is a basic configuration diagram showing an image forming apparatus used in an embodiment of the present invention. In this configuration, a surface conduction type electron-emitting device, which is disclosed in Japanese Patent Application No. 174837/1983, was used as an electron source. In FIG. 1, 1 is a glass substrate, 2 is a high-potential side voltage supply wiring, 2a is a high-potential side electrode of a surface conduction electron-emitting device, 3 is a low-potential side voltage supply wiring, and 3a is a surface conduction type electron-emitting device. Low potential side electrode of the emission element, 4 is an electron emission part, 5 is an electron passage hole, 6 is a modulation electrode which is a first electrode, 7 is a glass body, 8 is a transparent electrode, 9 is a fluorescent substance, IO is a face plate, 11 is a bright spot of the phosphor.
第１図（ｂ）は第１図（ａ）のＡ−Ａ断面図で、１２は
絶縁体であり、第１図（ｃ）は第１図（ａ）のＢ−Ｂ断
面図である。本実施例では、電子放出部４近傍において
、高電位側電圧供給用配線２から低電位側電圧供給用配
線３へ向かう（Ｘ方向）電場Ｅ工よりも、加速電位にあ
るフェースプレートｌＯから電子放出部４へ向かう電場
ＥＴを大きくし、電子放出部４より発生した電子がＸ方
向ヘズレることを抑える為、第１図（ａ） （ｃ）にお
ける各部の位置関係を次の通りとした。即ち、電子通過
孔５の長さ！ｌ ＝ ３００７ｚｍ 、幅ｗ ＝ １８
０ｐｍ 、配線２．３の厚さｈ ＝ １１００ｐ 、配
線２．３の上端と、変調電極６の下端との距離ｇ ＝
５０ｐｍ、配線２．３間の距離Ｗ、＝ ４２０ Ｊ’ｆ
ｌｌ＋変調電極６の厚さｔ ＝ ５０ｐ、ｍ、変調電極
６の電位＝ ｔＯＶ 、低電位側電圧供給用配線３の電
位＝ＯＶ、高電位側電圧供給用配線２の電位＝１４Ｖ、
電子放出部４からフェースプレートｌＯ迄の距離を１０
ｍｍ、フェースプレート１０の電位を１０ｋＶとした。FIG. 1(b) is a sectional view taken along the line AA in FIG. 1(a), and 12 is an insulator, and FIG. 1(c) is a sectional view taken along the line BB in FIG. 1(a). In this embodiment, in the vicinity of the electron emission part 4, the electrons from the face plate 10 at an accelerating potential are In order to increase the electric field ET directed toward the electron emission part 4 and to suppress the electrons generated from the electron emission part 4 from shifting in the X direction, the positional relationship of each part in FIGS. 1(a) and 1(c) was set as follows. That is, the length of the electron passage hole 5! l = 3007zm, width w = 18
0pm, thickness of the wiring 2.3 h = 1100p, distance g between the upper end of the wiring 2.3 and the lower end of the modulation electrode 6 =
50pm, distance W between wiring 2.3 = 420 J'f
ll + thickness t of modulation electrode 6 = 50p, m, potential of modulation electrode 6 = tOV, potential of low potential side voltage supply wiring 3 = OV, potential of high potential side voltage supply wiring 2 = 14V,
The distance from the electron emission part 4 to the face plate lO is 10
mm, and the potential of the face plate 10 was set to 10 kV.
この場合
ｄｓ＆１＝１００＋５０＝１５０１ｔｍｌ、 １．２−
１１＝３６０［ｐｍｌとなる故
を満たす。In this case, ds&1=100+50=1501tml, 1.2-
11=360 [pml, so it is satisfied.
第２図は、本構成における、電子放出部近傍の等電位線
の計算結果を示している。本計算では電子放出部４の電
位を７■とし、等電位線は、Ｏ〜２０Ｖ迄を２■刻ミニ
、２０Ｖ以上１００ｖ以下をＩＯＶ刻みに描いている。FIG. 2 shows the calculation results of equipotential lines near the electron emitting part in this configuration. In this calculation, the potential of the electron emitting part 4 is set to 7■, and equipotential lines are drawn in 2-inch increments from O to 20V, and in IOV increments from 20V to 100V.
同第２図より分る如く、電子放出部４の近傍において配
線２．３の電位を起因する電場Ｅｘに比し、フェースプ
レートｌＯの電位に起因する電場Ｅアが支配的となり、
等電位線は電子放出部４にほぼ平行となっていることが
分る。As can be seen from FIG. 2, in the vicinity of the electron emission part 4, compared to the electric field Ex caused by the potential of the wiring 2.3, the electric field Ea caused by the potential of the face plate lO becomes dominant.
It can be seen that the equipotential lines are approximately parallel to the electron emission region 4.
次に本発明の画像形成装置による実験結果を述べる。Next, experimental results using the image forming apparatus of the present invention will be described.
（１）第１電極６を取り除いた系におけるフェースプレ
ートに到達する電流を１１、本発明の構成系におけるフ
ェースプレートに到達する電流をＩ２とした時１．／１
． ＞０．９を得た。即ち、本発明の画像形成装置にお
いては、電子発生部４から発生した電子のうち、９０％
以上を利用できるという結果が得られた。(1) When the current reaching the face plate in the system in which the first electrode 6 is removed is 11, and the current reaching the face plate in the system according to the present invention is I2, 1. /1
．． >0.9 was obtained. That is, in the image forming apparatus of the present invention, 90% of the electrons generated from the electron generating section 4
The results showed that the above can be used.
（２）第３図は、フェースプレート上における電子ビー
ムによる輝点と、電子源基板１上の電子放出部４との位
置関係を示している。同第３図においの指標として採用
した場合、本発明の画像形成装置での実験においては、
ΔＸ＝０．０６を得た。この結果と比較する為、第１電
極６の開口５の長さＡ ＝ １１００ｐ 、 ｗ ＝
８０ｐｍとし、フェースプレート１０の電位の影響が、
電子放出部４近傍まで及ばない様にした系において同様
の実験をしたところΔＸ：０．６１を得た。これら２つ
の実験結果から、本発明の画像形成装置においては、配
線２，３による電子ビームのＸ方向へのズレが、極力抑
えられているという結果が得られた。次に本発明の画像
形成装置における電子源及び配線の製造方法の一例を、
第４図（ａ）〜（ｆ）に基づいて説明する。(2) FIG. 3 shows the positional relationship between the bright spot caused by the electron beam on the face plate and the electron emitting section 4 on the electron source substrate 1. When used as an index in FIG. 3, in experiments using the image forming apparatus of the present invention,
ΔX=0.06 was obtained. To compare with this result, the length of the opening 5 of the first electrode 6 is A = 1100p, w =
80 pm, and the influence of the potential of the face plate 10 is
A similar experiment was conducted in a system in which the electrons did not reach the vicinity of the electron emission part 4, and ΔX: 0.61 was obtained. From these two experimental results, it was found that in the image forming apparatus of the present invention, the deviation of the electron beam in the X direction due to the wirings 2 and 3 is suppressed as much as possible. Next, an example of a method for manufacturing an electron source and wiring in an image forming apparatus of the present invention is as follows.
This will be explained based on FIGS. 4(a) to 4(f).
先ず、ガラス基板１上に真空堆積法により絶縁層１２と
してＳｉＯ２を３０００人堆積する（第４図（ａ））。First, 3000 layers of SiO2 are deposited as an insulating layer 12 on a glass substrate 1 by a vacuum deposition method (FIG. 4(a)).
次・に、ホトリソエツチングプロセスにて不要部のＳｉ
Ｏ□を取り除く（第４図（ｂ））。それから、真空堆積
法により電極２ａ、 ３ａ用の金属膜としてＮｉを１５
００人堆積する（第４図（Ｃ））。その後、ホトリソエ
ツチングプロセスにて電極２ａ、 ３ａを形成する（第
４図（ｄ））。さらに、印刷法によりＡｇペーストをパ
ターリングし、焼成して配線２，３を形成する（第４図
（ｅ））。最後に有機パラジウム化合物の溶解液を塗布
・焼成後、通常のフォーミング処理を実施し、電子放出
部４を形成した（第４図（ｆ））。Next, in the photolithography process, Si is removed from unnecessary areas.
Remove O□ (Fig. 4(b)). Then, 15% of Ni was deposited as a metal film for electrodes 2a and 3a using a vacuum deposition method.
00 people are deposited (Figure 4 (C)). Thereafter, electrodes 2a and 3a are formed by a photolithography process (FIG. 4(d)). Furthermore, the Ag paste is patterned by a printing method and fired to form the wirings 2 and 3 (FIG. 4(e)). Finally, after applying and baking a solution of an organic palladium compound, a normal forming process was performed to form an electron emitting region 4 (FIG. 4(f)).
第１図において、電子源として表面伝導形電子放出素子
を用いたが、一般には電子を放出する電子源であれば、
いかなる種類・形状のものでもよい。又、本実施例では
配線２，３を直線としたがこれに限る必要はない。配線
の厚さり、第１電極の厚さｔ、第１電極と配線との距離
ｇ、第１電極の電子通過孔５の長さβ１幅Ｗの値につい
ても、電子放出部４近傍での等電位線がほぼ平行となり
、Ｘ方向へのズレが系の許容範囲におさまる条件下で、
任意に変えることができる。又、本実施例では電子放出
部４近傍の電場ＥＹの形成に、フェースプレー１−ＩＯ
の加速電位を用いたが、外部電界としてはこれに限る訳
ではない。更に、本実施例では第１電極の開口形状を長
方形としたが、これに限る訳ではな（、正方形、多角形
９円形。In Fig. 1, a surface conduction electron-emitting device is used as the electron source, but generally any electron source that emits electrons can be used.
It can be of any type or shape. Further, in this embodiment, the wirings 2 and 3 are straight lines, but there is no need to limit them to this. The thickness of the wiring, the thickness t of the first electrode, the distance g between the first electrode and the wiring, the length β1 width W of the electron passing hole 5 of the first electrode, etc. in the vicinity of the electron emission part 4, etc. Under conditions where the potential lines are almost parallel and the deviation in the X direction is within the tolerance range of the system,
It can be changed arbitrarily. In addition, in this embodiment, the face plate 1-IO is used to form the electric field EY near the electron emission part 4.
Although the acceleration potential of is used, the external electric field is not limited to this. Further, in this embodiment, the opening shape of the first electrode is rectangular, but it is not limited to this (square, polygon, 9 circles, etc.).
楕円形においても同様の効果が得られた。A similar effect was obtained with the oval shape.
支施■ユ この発明の第２の実施例を、第５図に沿って説明する。Support ■ Yu A second embodiment of the invention will be described with reference to FIG.
第２実施例では、電子を放出する電子源として熱電子放
出電子源を使用した。第５図（ａ）は、熱電子放出電子
源が形成された電子源基板を示している。第５図（ｂ）
は第５図（ａ）のＤ−Ｄ断面図を示している。同第５図
（ｂ）において配線２゜３の厚さｈ ＝ ３０ｇｍ、配
線２．３の上端から第１電極６の下端までの距離ｇ＝５
０μｍ、配線２．３間の距離Ｗｓ＝ ４２０ ｔ’ｍ＋
第１電極の厚さｔ ＝ ５０ｇｍ。In the second embodiment, a thermionic emission electron source was used as an electron source that emits electrons. FIG. 5(a) shows an electron source substrate on which a thermionic emission electron source is formed. Figure 5(b)
shows a sectional view taken along line DD in FIG. 5(a). In FIG. 5(b), the thickness of the wiring 2.3 is h = 30 gm, and the distance from the upper end of the wiring 2.3 to the lower end of the first electrode 6 is g = 5.
0 μm, distance between wiring 2.3 Ws = 420 t'm+
Thickness of the first electrode t = 50 gm.
第１電極の電子通過孔５の長さβ＝ ４００ｐｍ、幅Ｗ
＝１８０ｐｍとした。電子放出部４は、厚さ１．Ｏｐｍ
、幅１５ｐｍ、長さ３００ｐｍで作成し、低電位側電
圧供給用配線３と高電位側電圧供給用配線２との間の、
電子源駆動電圧は約１．７Ｖ、第１電極電圧＝ ＩＯＶ
。Length β of electron passing hole 5 of first electrode = 400 pm, width W
=180pm. The electron emitting section 4 has a thickness of 1. Opm
, with a width of 15 pm and a length of 300 pm, between the low potential side voltage supply wiring 3 and the high potential side voltage supply wiring 2,
Electron source driving voltage is approximately 1.7V, first electrode voltage = IOV
.
電子放出部４からフェースプレートｌＯ迄の距離を１０
ｍｎ＋、フェースプレートｌＯの電位を１ＯｋＶとして
、第１図と同様の実験を行った。The distance from the electron emission part 4 to the face plate lO is 10
An experiment similar to that shown in FIG. 1 was conducted with mn+ and the potential of the face plate lO set to 10 kV.
この場合
ｄｓｖ＝ ３０＋５０ ＝ ８０ｂｍｌ、 １．２
”ｊ’ ＝ ４８０［ｐｍｌとなる故
を満たす。In this case dsv=30+50=80bml, 1.2
"j' = 480 [pml, so it is satisfied.
次に実験結果を述べる。Next, we will discuss the experimental results.
（１）第１電極６を取り除いた系におけるフェースプレ
ートに到達する電流をり２本発明の構成系におけるフェ
ースプレートに到達する電流を■２とした時１．／Ｉ、
＞ ０．９５を得た。即ち、本発明の画像形成装置にお
いては、電子放出部４から発生した電子のうち、９５％
以上を利用できるという結果が得られた。(1) When the current reaching the face plate in the system in which the first electrode 6 is removed is 2, the current reaching the face plate in the system according to the present invention is 2.1. /I,
>0.95 was obtained. That is, in the image forming apparatus of the present invention, 95% of the electrons generated from the electron emission section 4
The results showed that the above can be used.
（２）第１実施例の説明で述べたＸ方向へのズレ指標Δ
Ｘは、実験結果よりΔＸ ＝ ０．０２となり、配線２
．３に起因するＸ方向への電子ビームのズレが抑えられ
ているという結果が得られた。(2) The deviation index Δ in the X direction mentioned in the explanation of the first embodiment
X is ΔX = 0.02 from the experimental results, and wiring 2
．． A result was obtained that the deviation of the electron beam in the X direction caused by No. 3 was suppressed.
次に、本実施例の画像形成装置における電子源及び配線
の製造方法の一例を、第６図（ａ）〜（ｅ）に基づいて
説明する。第６図は、第５図（ａ）のＣ−Ｃ断面図を示
している。先ずガラス基板上に、真空堆積法によりＣｕ
を７ｐｍ堆積させる（第６図（ａ））。次に、真空堆積
法によりＴａを１．０μｍ堆積させる（第６図（ｂ））
。それから、ホトリソエツチングプロセスによりＴａ層
を加工し、電子放出部４を形成する（第６図（Ｃ））。Next, an example of a method for manufacturing an electron source and wiring in the image forming apparatus of this embodiment will be described based on FIGS. 6(a) to 6(e). FIG. 6 shows a CC sectional view of FIG. 5(a). First, Cu was deposited on a glass substrate using a vacuum deposition method.
is deposited to a thickness of 7 pm (FIG. 6(a)). Next, 1.0 μm of Ta is deposited by vacuum deposition method (Fig. 6(b)).
. Then, the Ta layer is processed by a photolithography process to form the electron emitting region 4 (FIG. 6(C)).
その後、印刷法によりＡｇペーストをバターニングし、
焼成して配線２．３を形成する（第６図（ｄ））。最後
にＣｕを選択的にエツチングさせＴａ電子放出部４の中
空構造を作成する。After that, the Ag paste was buttered by a printing method,
The wiring 2.3 is formed by firing (FIG. 6(d)). Finally, Cu is selectively etched to create a hollow structure of the Ta electron emitting region 4.
［発明の効果］
以上説明したように、第１電極の開口を通して、外部電
界の影響が電子放出部近傍にまで及ぶようにすることに
より次の効果がある。[Effects of the Invention] As explained above, the following effects can be obtained by allowing the influence of the external electric field to reach the vicinity of the electron emission part through the opening of the first electrode.
（１）電子放出部にて発生した電子を有効に利用でき、
フェースプレート上での輝度が向上する。(1) Electrons generated in the electron emission part can be used effectively,
Improved brightness on the faceplate.
（２）電子源基板上で、電子放出部近傍において引き回
された配線電位に起因する力による電子ビームのズレな
許容値以内に押えられる。(2) On the electron source substrate, the deviation of the electron beam due to the force caused by the wiring potential routed in the vicinity of the electron emission part is suppressed to within a permissible value.
（３）第１電極電圧を低（することができ、第１電極部
の絶縁不良に起因する装置の信頼性低下を防止できる。(3) The first electrode voltage can be lowered, and a decrease in reliability of the device due to poor insulation of the first electrode portion can be prevented.
第１図は本発明の第１実施例を示す斜視図及びその断面
図、第２図は本発明の電子放出部近傍の等電位線の一例
を示す側面図、第３図は電子ビームによる蛍光体の輝点
と電子放出部の位置関係を表わした図、第４図は本発明
の第１実施例の電子源基板部の製造方法の一例を示す工
程図、第５図は本発明の第２実施例を示す斜視図及びそ
の断面図、第６図は本発明の第２実施例の、電子源基板
部の製造方法の一例を示す工程図、第７図は従来例を示
す構成図である。
１・・・ガラス基板
２．２ｂ・・・高電位側電圧用配線
２ａ・・・高電位側電極FIG. 1 is a perspective view and a sectional view thereof showing a first embodiment of the present invention, FIG. 2 is a side view showing an example of equipotential lines near the electron emitting part of the present invention, and FIG. 3 is a fluorescence emission caused by an electron beam. FIG. 4 is a process diagram showing an example of the method for manufacturing the electron source substrate section of the first embodiment of the present invention, and FIG. A perspective view and a cross-sectional view thereof showing the second embodiment, FIG. 6 is a process diagram showing an example of a method for manufacturing an electron source substrate part according to the second embodiment of the present invention, and FIG. 7 is a configuration diagram showing a conventional example. be. 1...Glass substrate 2.2b...High potential side voltage wiring 2a...High potential side electrode
Claims (3)
放出される電子ビームの通過と遮断を制御する為の電子
通過孔を有した第１電極、及び電子ビームの照射により
画像を形成する為のターゲットを具備した系において、
前記第１電極に対して前記ターゲット側に設けた電極の
電位（外部電位）の影響が、電子放出部近傍に及ぶよう
な開口面積を有する第１電極の電子通過孔を特徴とする
画像形成装置。(1) At least an electron-emitting device, a first electrode having an electron passing hole for controlling passage and blocking of the electron beam emitted from the electron-emitting device, and a first electrode for forming an image by irradiating the electron beam. In a system equipped with a target,
An image forming apparatus characterized by an electron passing hole of the first electrode having an opening area such that the influence of the potential (external potential) of the electrode provided on the target side with respect to the first electrode extends to the vicinity of the electron emitting part. .
電子放出部と第１電極との間の距離をｄ＿Ｓ＿Ｍ、第１
電極の電子通過孔の最大開口径をｌ、第１電極とターゲ
ット電極との間の距離をｄ＿Ｍ＿Ｔ、高電位側配線と低
電位側配線との間の距離をＷ＿Ｓ、ターゲット電位をＶ
＿Ｔ、第１電極電位をＶ＿Ｅ＿Ｘ＿Ｔ、電子放出素子配
線間電位差（即ち、高電位側電極電位と低電位側電極電
位との電位差）をＶ＿ｆとした時、 ｛・（Ｖ＿Ｔ−Ｖ＿Ｅ＿Ｘ＿Ｔ）／（ｄ＿Ｍ＿Ｔ）＞１
０・（Ｖｆ／Ｗ＿Ｓ）かつ ・ｄ＿Ｓ＿Ｍ＜１．２・ｌ｝ を満たすことを特徴とする請求項１記載の画像形成装置
。(2) Using the potential of the target as the external potential,
The distance between the electron emission part and the first electrode is d_S_M, the first
The maximum opening diameter of the electron passing hole of the electrode is l, the distance between the first electrode and the target electrode is d_M_T, the distance between the high potential side wiring and the low potential side wiring is W_S, and the target potential is V
_T, the first electrode potential is V_E_X_T, and the potential difference between the electron-emitting device wiring (that is, the potential difference between the high-potential side electrode potential and the low-potential side electrode potential) is V_f, then {・(V_T−V_E_X_T)/(d_M_T) >1
2. The image forming apparatus according to claim 1, wherein the image forming apparatus satisfies the following: 0.(Vf/W_S) and d_S_M<1.2.l}.
方形、多角形、円形、又は楕円形をしていることを特徴
とする請求項１又は請求項２記載の画像形成装置。(3) The image forming apparatus according to claim 1 or 2, wherein the shape of the electron passing hole of the modulation electrode is rectangular, square, polygonal, circular, or elliptical.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1117407A JP2769860B2 (en) | 1989-05-12 | 1989-05-12 | Image forming device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1117407A JP2769860B2 (en) | 1989-05-12 | 1989-05-12 | Image forming device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02297845A true JPH02297845A (en) | 1990-12-10 |
| JP2769860B2 JP2769860B2 (en) | 1998-06-25 |
Family
ID=14710884
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1117407A Expired - Fee Related JP2769860B2 (en) | 1989-05-12 | 1989-05-12 | Image forming device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2769860B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1164618A1 (en) * | 1999-03-17 | 2001-12-19 | Matsushita Electric Industrial Co., Ltd. | Electron-emitting device and image display device using electron-emitting device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5037344A (en) * | 1973-08-06 | 1975-04-08 |
-
1989
- 1989-05-12 JP JP1117407A patent/JP2769860B2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5037344A (en) * | 1973-08-06 | 1975-04-08 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1164618A1 (en) * | 1999-03-17 | 2001-12-19 | Matsushita Electric Industrial Co., Ltd. | Electron-emitting device and image display device using electron-emitting device |
| EP1164618A4 (en) * | 1999-03-17 | 2003-01-29 | Matsushita Electric Ind Co Ltd | Electron-emitting device and image display device using electron-emitting device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2769860B2 (en) | 1998-06-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0500553B1 (en) | Field emission device having preformed emitters | |
| US5185554A (en) | Electron-beam generator and image display apparatus making use of it | |
| US20060038768A1 (en) | Field emission display | |
| JP3999276B2 (en) | Charge dissipation type field emission device | |
| US6821175B1 (en) | Method of manufacturing a field electron emission cathode having at least one cathode electrode | |
| US6137213A (en) | Field emission device having a vacuum bridge focusing structure and method | |
| JP2812356B2 (en) | Field emission type electron gun | |
| JP2001229805A (en) | Field emission cathode and field emission type display device | |
| JP2610188B2 (en) | Image forming device | |
| KR100371627B1 (en) | Redundant conductor electron source | |
| JP2970539B2 (en) | Field emission cathode and cathode ray tube using the same | |
| JPH02297845A (en) | Image forming device | |
| US5994832A (en) | Display device having plural second substrates | |
| KR100378103B1 (en) | Electron source, image forming apparatus, and manufacture method for electron source | |
| JP2003308798A (en) | Image display device and manufacturing method of image display device | |
| US6144145A (en) | High performance field emitter and method of producing the same | |
| JPH07282718A (en) | Display using field emission element | |
| JP2939151B2 (en) | Fluorescent display tube | |
| JP2835962B2 (en) | Image forming device | |
| JP3010296B2 (en) | Image forming device | |
| KR20040095351A (en) | Image display apparatus and its manufacturing method | |
| JP3258215B2 (en) | Light emitting element | |
| KR100715332B1 (en) | Field emission device having a vacuum bridge focusing structure | |
| KR100235303B1 (en) | Fed using mim(metal insulator metal) and manufacturing method thereof | |
| JP2850013B2 (en) | Image forming device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090417 Year of fee payment: 11 |
|
| LAPS | Cancellation because of no payment of annual fees |