JPH02295114A - Method and apparatus for ion implantation - Google Patents

Method and apparatus for ion implantation

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Publication number
JPH02295114A
JPH02295114A JP1116456A JP11645689A JPH02295114A JP H02295114 A JPH02295114 A JP H02295114A JP 1116456 A JP1116456 A JP 1116456A JP 11645689 A JP11645689 A JP 11645689A JP H02295114 A JPH02295114 A JP H02295114A
Authority
JP
Japan
Prior art keywords
ion implantation
chamber
resist pattern
resist
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1116456A
Other languages
Japanese (ja)
Other versions
JP2782357B2 (en
Inventor
Takashi Tawara
傑 田原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yamaha Corp
Original Assignee
Yamaha Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yamaha Corp filed Critical Yamaha Corp
Priority to JP1116456A priority Critical patent/JP2782357B2/en
Publication of JPH02295114A publication Critical patent/JPH02295114A/en
Application granted granted Critical
Publication of JP2782357B2 publication Critical patent/JP2782357B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To improve the heat-resistance of a resist film which is used as a mask for ion implantation by a method wherein far-ultraviolet radiation is applied to a resist pattern before the ion implantation. CONSTITUTION:After the surface of a semiconductor wafer made of silicon is coated with resist, a required pattern is transcripted onto the resist and a resist pattern is formed by development and so forth. Then far-ultraviolet radiation is applied to the resist pattern on the wafer surface while the resist pattern is baked. Then impurity ions are implanted into the wafer surface by using the resist pattern as a mask. After that, the resist pattern on the wafer surface is subjected to an ashing treatment by an oxygen plasma or the like. With this constitution, the heat-resistance of the resist is improved by the baking and the far-ultraviolet radiation application before the ion implantation, so that the deterioration and so forth of the resist can be suppressed.

Description

【発明の詳細な説明】 [産業上の利用分野コ この発明は、半導体装置等の製造に用いられるイオン注
入方法及び装置に関し、特にレジストバターンをマスク
として用いる選択的イオン注入技術の改良に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to an ion implantation method and apparatus used in the manufacture of semiconductor devices, etc., and particularly relates to improvements in selective ion implantation technology using a resist pattern as a mask. be.

[発明の概要] この発明は、半導体ウエ八等の被処理品の表面に形成さ
れたレジストパターンに熱処理を施しつつ遠紫外線を照
射することによってレジストノ{ターンの耐熱性を向上
させ、イオン注入時のノ<ターン変形を防止すると共に
イオン注入後のレジスト除去を容易にしたものである。
[Summary of the Invention] The present invention improves the heat resistance of a resist pattern by irradiating it with deep ultraviolet rays while performing heat treatment on a resist pattern formed on the surface of an object to be processed such as a semiconductor wafer. This prevents no-turn deformation and facilitates resist removal after ion implantation.

[従来の技術] 従来、半導体ウエハに選択的にリン、ヒ素、ボロン等の
導電型決定不純物を導入する方法としては、半導体クエ
八の表面に所望のレジストBターンを形成した後、該レ
ジストパターンをマスクとして不純物イオンをウエ八表
面に選択的に注入する方法が知られている. このようなイオン注入方法にあっては、イオン注入時に
イオン衝撃によりウエノ\が加熱されるため、レジスト
膜の温度が上昇する。このため、(イ)レジスト膜が熱
変形すること、(口)レジスト?の空気、水分等のガス
が膨張してレジスト膜に破裂個所が生ずること、(八)
レジスト膜が上記ガスとの化学反応により変質して除去
困難になることなどの問題点がある。
[Prior Art] Conventionally, as a method for selectively introducing conductivity type determining impurities such as phosphorus, arsenic, and boron into a semiconductor wafer, after forming a desired resist B turn on the surface of a semiconductor wafer, the resist pattern is A method is known in which impurity ions are selectively implanted into the wafer surface using a mask as a mask. In such an ion implantation method, the wafer is heated by ion bombardment during ion implantation, so that the temperature of the resist film increases. For this reason, (a) the resist film is thermally deformed; (b) the resist? (8) Gases such as air and moisture expand, causing ruptures in the resist film; (8)
There are problems in that the resist film changes in quality due to a chemical reaction with the above gas and becomes difficult to remove.

このような問題点に対処するため、イオン注入の前工程
として、ウエ八表面上のレジスト膜をベーキングするこ
とが知られており、このようなべ.−キングをイオン注
入装置内で実施すべく該装置の予備排気室に加熱装置を
設けることも知られている(例えば特開昭63−253
623号公報参照)。
To deal with these problems, it is known to bake the resist film on the surface of the wafer as a pre-process for ion implantation. - It is also known to provide a heating device in the pre-evacuation chamber of the ion implantation device in order to carry out kinging within the ion implantation device (for example, Japanese Patent Laid-Open No. 63-253
(See Publication No. 623).

[発明が解決しようとする課題] 上記したベーキング処理によると、ある程度はレジスト
膜の熱変形、破裂、変質等を抑制できるが、■必ずしも
十分でなかった。すなわち、ベーキングだけではレジス
ト膜の耐熱性を十分に向上させることができず、レジス
ト膜の熱変形、破裂によりイオン注入の精度が低下する
と共に、レジスト膜の変質によりレジスト除去が困難に
なる不都合があった。
[Problems to be Solved by the Invention] According to the above-described baking treatment, thermal deformation, rupture, deterioration, etc. of the resist film can be suppressed to some extent, but it is not always sufficient. In other words, baking alone cannot sufficiently improve the heat resistance of the resist film, and the precision of ion implantation decreases due to thermal deformation and rupture of the resist film, and the deterioration of the resist film makes it difficult to remove the resist. there were.

この発明の目的は、イオン注入マクスとして用いられる
レジスト膜の耐熱性を一層向上させることにある. [課題を解決するための手段] この発明によるイオン注入方法は、イオン注入前にレジ
ストパターンに遠紫外線を照射することを特徴とするも
のであり、該遠紫外線照射は、熱処理を施しつつ行なう
のがより大きな効果を得るために好ましい。
The purpose of this invention is to further improve the heat resistance of a resist film used as an ion implantation mask. [Means for Solving the Problems] The ion implantation method according to the present invention is characterized by irradiating a resist pattern with far ultraviolet rays before ion implantation, and the far ultraviolet irradiation is performed while performing heat treatment. is preferable to obtain a greater effect.

また、このようなイオン注入方法を実施するためのイオ
ン注入装置としては、予備排気室に加熱装置と共に遠紫
外線照射装置を設け、予備排気室にて熱処理及び遠紫外
線照射を受けた被処理品を外気にさらすことなくイオン
注入室に供給するようにしたものを用いるのが好ましい
In addition, as an ion implantation apparatus for carrying out such an ion implantation method, a far ultraviolet irradiation device is installed together with a heating device in a pre-evacuation chamber, and the workpieces that have been heat-treated and irradiated with far-UV rays are heated in the pre-evacuation chamber. It is preferable to use one that is supplied to the ion implantation chamber without being exposed to outside air.

[作 用] 4の発明の方法によれば、熱処理及び遠紫外線照射を併
用するので、レジストパターンの耐熱性は、熱処理だけ
の場合に比べて一層向上し、イオン注入時にはレジスト
膜の熱変形、破裂、変質等が一層抑制される.このため
、精度よくイオン注入を行なえると共にレジスト除去も
容易となる。
[Function] According to the method of the invention of item 4, heat treatment and deep ultraviolet irradiation are used in combination, so the heat resistance of the resist pattern is further improved compared to the case of heat treatment alone, and thermal deformation of the resist film during ion implantation, Rupture, deterioration, etc. are further suppressed. Therefore, ion implantation can be performed with high precision, and resist removal can also be facilitated.

また、上記したイオン注入装置を用いると、被処理品は
、熱処理及び遠紫外線照射の工程からイオン注入工程ま
で外気にふれることがないので、被処理品のレジストパ
ターンが湿気を吸収するようなことがなく、レジスト膜
の破裂や変質を防止することができる。
Furthermore, when using the above-mentioned ion implantation device, the product to be processed is not exposed to the outside air from the heat treatment and far ultraviolet irradiation process to the ion implantation process, so the resist pattern of the product to be processed does not absorb moisture. rupture and deterioration of the resist film can be prevented.

[実施例] 第1図は、この発明によるイオン注入方法の一実施例を
示すものである。
[Embodiment] FIG. 1 shows an embodiment of the ion implantation method according to the present invention.

工程10では、一例としてシリコンからなる半導体クエ
八の表面にレジストを塗布した後所望のパターンを転写
してから現像するなどしてレジストパターンを形成する
。この場合、ウエ八表面には、Sin2等の絶縁膜を予
め形成しておいてもよく、絶縁膜を厚くすれば後述のイ
オン注入の際にマスクとして作用させることができ、絶
縁膜を薄くすれば該絶縁膜を介してイオン注入を行なう
ことができる。
In step 10, for example, a resist pattern is formed by applying a resist to the surface of a semiconductor substrate made of silicon, transferring a desired pattern, and then developing it. In this case, an insulating film such as Sin2 may be formed on the surface of the wafer in advance.If the insulating film is made thicker, it can act as a mask during ion implantation, which will be described later. In this case, ion implantation can be performed through the insulating film.

次に、工程l2では、クエ八表面上のレジストパターン
にベーキング処理を施しつつ遠紫外線を照射する。この
ときのベーキング及び遠紫外線照射の処理条件の一例を
示すと、次の通りである。
Next, in step 12, the resist pattern on the surface of the resist pattern is subjected to baking treatment and irradiated with deep ultraviolet rays. An example of the processing conditions for baking and far ultraviolet irradiation at this time is as follows.

(1)ベーキング:ホットプレートを用いて第2図の一
点鎖線Aに示すように昇温速度0.9〜1.0[t /
secl にて80[tl から200[t] まで昇
温しながらベーキングを行なった。
(1) Baking: Using a hot plate, the heating rate is 0.9 to 1.0 [t/
Baking was performed while increasing the temperature from 80 [tl] to 200 [t] at sec1.

(2)遠紫外線照射:第2図の実線Bに示すように波長
200〜300 [nm]の遠紫外線をランプ照度10
0 〜700[mW/cm2l にて照射した。
(2) Far ultraviolet irradiation: As shown by solid line B in Figure 2, far ultraviolet rays with a wavelength of 200 to 300 [nm] are irradiated with a lamp illuminance of 10
Irradiation was performed at 0 to 700 [mW/cm2l].

次に、工程l4では、レジストパターンをマスクとして
ウエ八表面に不純物イオンを注入する。
Next, in step 14, impurity ions are implanted into the surface of the wafer using the resist pattern as a mask.

例として、リンイオンを加速電圧35[κeV] でド
ーズ量6.8 x 1015[cm−2]となるように
注入した。
As an example, phosphorus ions were implanted at an acceleration voltage of 35 [κeV] and a dose of 6.8×10 15 [cm −2 ].

この後、工程16では、クエ八表面上のレジストパター
ンに02プラズマ等によるアッシング(灰化)処理を施
す。そして、工程1B, 20. 22でそれぞれ洗浄
1,2.3の処理を行ない、アッシング残漬を除去する
。この場合、洗浄液としては、洗浄1では、H2SO4
及びH202の混合液を用い、洗浄2及び3では、いず
れも、NH40H, H202 及ヒH20の混合液を
用いた。また、処理温度は、洗浄1では室温、洗浄2で
は30[t]  洗浄3では80[tl:] とした。
Thereafter, in step 16, the resist pattern on the surface of the resist pattern is subjected to an ashing process using 02 plasma or the like. And step 1B, 20. In step 22, the cleaning steps 1, 2.3 are carried out to remove the ashing residue. In this case, the cleaning liquid used in cleaning 1 is H2SO4
In cleanings 2 and 3, a mixture of NH40H, H202 and H20 was used. Further, the processing temperature was room temperature in washing 1, 30 [t] in washing 2, and 80 [tl:] in washing 3.

この発明による耐熱性向上効果を明らかにするタメ、ア
ッシング後の残渣除去の容易性(レジスト除去の容易性
)を調べた。すなわち、工程1oでレジストパターンを
形成した後工程12Aでレジストパターンにベーキング
処理のみ施してから工程14〜22を経たウエハ(従来
例相当の試料s,)と、工程10〜22を経たウェハ(
この発明に係る試料S2)と、工程10の後工程12及
びl4を経ずに工程16〜22を経たウェハ(基準とな
る試料S3)との3 fffi類の試料を作製し、各試
料毎に洗浄1.2.3の各処理の終了後にパーティクル
カウンタでウエ八表面上のアッシング残渣数を測定した
。この場合、アッシング残漬は、サイズが0.25 [
μm】より大きいものを計数した。
In order to clarify the heat resistance improvement effect of this invention, the ease of removing residue after ashing (ease of removing resist) was investigated. That is, after forming a resist pattern in step 1o, the resist pattern was only subjected to baking treatment in step 12A, and then the wafer underwent steps 14 to 22 (sample s, corresponding to the conventional example), and the wafer (sample s, corresponding to the conventional example) underwent steps 10 to 22.
Three fffi samples were prepared, including sample S2 according to the present invention) and a wafer that underwent steps 16 to 22 without going through steps 12 and 14 after step 10 (sample S3 as a reference), and After completing each of the cleaning processes 1.2.3, the number of ashing residues on the surface of the wafer was measured using a particle counter. In this case, the ashing residue has a size of 0.25 [
μm] were counted.

第3図は、試料S,〜S,について洗浄1〜3の各処理
毎のアッシング残漬数の測定結果を示すものである。第
2図によれば、この発明に係る試料S2のアッシング歿
渣数が、従来例に相当する試料S1に比べて洗浄1〜3
のいずれの処理後も少なく、最終的には基準となる試料
S3と同等のレベルになっていることが明らかである。
FIG. 3 shows the measurement results of the number of ashing residues for each of cleanings 1 to 3 for samples S and S. According to FIG. 2, the number of ashing residues of sample S2 according to the present invention is 1 to 3 times after washing compared to sample S1 corresponding to the conventional example.
It is clear that after each treatment, the amount is small, and the final level is the same as that of sample S3, which is the standard.

このことは、イオン注入前のベーキング及び遠紫外線照
射によってレジストの耐熱性が向上し、レジストの変質
等が抑制されたことを示すものである。
This indicates that the heat resistance of the resist was improved by baking and deep ultraviolet irradiation before ion implantation, and deterioration of the resist was suppressed.

第4図は、この発明のイオン注入方法を実施するに好適
なイオン注入装置の一例を示すものである。
FIG. 4 shows an example of an ion implantation apparatus suitable for carrying out the ion implantation method of the present invention.

ローダ30は、第5図に示すように多数枚の半導体ウエ
ハWが装填されるもので、ウエハWは、図示しない搬送
機構によりゲートバルブG1を介して1枚ずつ予備排気
室32に供給される。ウエハWには、予め所望のレジス
トパターンが形成されている。
As shown in FIG. 5, the loader 30 is loaded with a large number of semiconductor wafers W, and the wafers W are supplied one by one to the preliminary exhaust chamber 32 via a gate valve G1 by a transport mechanism (not shown). . A desired resist pattern is formed on the wafer W in advance.

予備排気室32には、第5図に示すようにホットプレー
ト等の加熱装置40及び遠紫外線照射装置42が設けら
れており、ウエハWは、例えば1〜10−’ [Tor
r]程度に排気された状態において加熱装置40により
加熱されながら照射装置42により遠紫外線照射を受け
る。
The preliminary exhaust chamber 32 is provided with a heating device 40 such as a hot plate and a far ultraviolet irradiation device 42 as shown in FIG.
r] and is heated by a heating device 40 while being irradiated with far ultraviolet rays by an irradiation device 42.

加熱処理及び違紫外線照射が終ったウエハWは、図示し
ない搬送機構によりゲートバルブG2を介して外気にさ
らされることなくイオン注入室34に供給され、プラテ
ンPに保持される。そして、このような保持状態におい
て、通常の方法に従ってイオンビームIBを照射するこ
とによりレジストパターンをマスクとする選択的イオン
注入処理が行なわれる。このようなイオン注入処理が開
始された後、予備排気室32では次のウエハWについて
加熱・遠紫外線照射処理を行なうことができる。
The wafer W that has been heated and irradiated with ultraviolet rays is supplied to the ion implantation chamber 34 by a transport mechanism (not shown) via the gate valve G2 without being exposed to the outside air, and is held on the platen P. Then, in such a held state, selective ion implantation processing using the resist pattern as a mask is performed by irradiating the ion beam IB according to a normal method. After such an ion implantation process is started, the next wafer W can be heated and irradiated with deep ultraviolet rays in the pre-evacuation chamber 32.

イオン注入処理が終ったウエハWは、図示しない搬送機
構によりゲートバルブG3を介して予備排気室36に供
給される。そして、予備排気室36に収容されたウエハ
Wは、図示しない搬送機構によりゲートバルブG4を介
してアンローダ38にセットされる。
The wafer W that has undergone the ion implantation process is supplied to the preliminary exhaust chamber 36 via the gate valve G3 by a transport mechanism (not shown). Then, the wafer W accommodated in the preliminary exhaust chamber 36 is set on the unloader 38 via the gate valve G4 by a transport mechanism (not shown).

上記したイオン注入装置によれば、ウエハWは、予備排
気室32からイオン注入室34に穆る過程で外気にふれ
ることがないので、レジストパターンが加熱・遠紫外線
照射処理の後イオン注入処理の前に湿気を吸収するよう
なことがなくなる。
According to the above-described ion implantation apparatus, the wafer W is not exposed to the outside air during the process of being transferred from the pre-evacuation chamber 32 to the ion implantation chamber 34, so that the resist pattern is not exposed to the ion implantation treatment after the heating and deep ultraviolet irradiation treatment. No more moisture absorption as before.

従って、イオン注入の際にレジスト膜が破裂又は変質す
るのを防止することができる. 第6図は、この発明によるイオン注入装置の他の例を示
すもので、第4図と同様の部分には同様の符号を付して
詳細な説明を省略する。
Therefore, it is possible to prevent the resist film from bursting or deteriorating during ion implantation. FIG. 6 shows another example of the ion implantation apparatus according to the present invention, in which the same parts as in FIG. 4 are given the same reference numerals and detailed explanations are omitted.

第6図の装置が第4図の装置と異なる点は、予備排気室
32とイオン注入室34との間に複数のウエハを収容可
能な介在排気室44を設け、予備排気室32で加熱・遠
紫外線照射処理が終るたびに図示しない搬送機構により
ゲートバルブGSを介してウエハWを外気にさらすこと
なく介在排気室44に移す一方、介在排気室44に収容
されたウエハWを外気にさらすことなく図示しない搬送
機構によりゲートバルブG2を介してイオン注入室34
に移すようにしたことである。
The apparatus shown in FIG. 6 differs from the apparatus shown in FIG. 4 in that an intervening evacuation chamber 44 capable of accommodating a plurality of wafers is provided between the pre-evacuation chamber 32 and the ion implantation chamber 34. Each time the deep ultraviolet irradiation process is completed, the wafer W is transferred to the intervening exhaust chamber 44 via the gate valve GS by a transport mechanism (not shown) without being exposed to the outside air, while the wafer W accommodated in the intervening exhaust chamber 44 is exposed to the outside air. The ion implantation chamber 34 is transported through the gate valve G2 by a transport mechanism (not shown).
The decision was made to move it to .

このような構成によると、加熱・遠紫外線照射処理が終
ったウエハWを複数枚介在排気室44にためてから1枚
ずつイオン注入室34に穆すことにより効率的にイオン
注入処理を行なうことができ、高スルーブットのイオン
注入装置を実現できる。
According to this configuration, the ion implantation process can be efficiently performed by storing a plurality of wafers W that have been heated and irradiated with deep ultraviolet rays in the intervening exhaust chamber 44 and then transferring them one by one to the ion implantation chamber 34. This makes it possible to realize a high-throughput ion implanter.

[発明の効果] 以上のように、この発明によれば、熱処理及び遠紫外線
照射を併用してレジストパターンの耐熱性を向上させて
からイオン注入を行なうようにしたので、イオン注入の
際にレジスト膜に熱変形、破裂、変質等が生ずるのを抑
制することができる。従って、パターンが安定した状態
で精度よくイオン注入を行なえると共に、イオン注入後
には簡単且つ確実にレジストを除去することができ、製
造歩留りが向上する効果が得られるものである。
[Effects of the Invention] As described above, according to the present invention, ion implantation is performed after improving the heat resistance of the resist pattern using both heat treatment and deep ultraviolet irradiation. It is possible to suppress thermal deformation, rupture, deterioration, etc. of the membrane. Therefore, ion implantation can be performed with high accuracy while the pattern is stable, and the resist can be easily and reliably removed after ion implantation, resulting in an improvement in manufacturing yield.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、この発明によるイオン注入方法のー実施例を
示す工程図、 第2図は、ベーキング・遠紫外線照射の処理条件を示す
グラフ、 第3図は、洗浄によるアッシング残漬数の変化を示すグ
ラフ、 第4図は、この発明によるイオン注入装置の一例を示す
上面図、 第5図は、ローダ及び予備排気室の側面図、第6図は、
イオン注入装置の他の例を示す上面図である。 10・・・レジストパターン形成工程、12・・・ベー
キング及び遠紫外線照射工程、l4・・・イオン注入工
程、32・・・予備排気室、34・・・イオン注入室、
40・・・加熱装置、42・・・遠紫外線照射装置、4
4・・・介在排気室。 出願人  ヤ マ ハ 株 式会社 代理人  弁理士 伊 沢 敏 昭 第 1 図(実施例の工程図) 一時間唆〕 第4図(イオン庄大装置の上面図) 第5図(ローダ・予備排気室0側面図)第3 図(洗浄
によるアッンンク八渣数つ変化)第6図(イオンS主入
装置の他O例)
Fig. 1 is a process diagram showing an example of the ion implantation method according to the present invention, Fig. 2 is a graph showing processing conditions of baking and deep ultraviolet irradiation, and Fig. 3 is a change in the number of ashing residues due to cleaning. FIG. 4 is a top view showing an example of an ion implantation apparatus according to the present invention, FIG. 5 is a side view of the loader and preliminary exhaust chamber, and FIG. 6 is a graph showing:
FIG. 7 is a top view showing another example of the ion implantation device. 10... Resist pattern formation process, 12... Baking and deep ultraviolet irradiation process, l4... Ion implantation process, 32... Pre-evacuation chamber, 34... Ion implantation chamber,
40... Heating device, 42... Far ultraviolet irradiation device, 4
4...Intervening exhaust chamber. Applicant Yamaha Co., Ltd. Agent Patent Attorney Satoshi Izawa Figure 1 (Process diagram of the example) One hour study] Figure 4 (Top view of Ion Shodai equipment) Figure 5 (Loader/pre-exhaust (Chamber 0 side view) Figure 3 (Several changes due to cleaning) Figure 6 (Ion S main input device and other O examples)

Claims (1)

【特許請求の範囲】 1、(a)被処理品の表面に所望のレジストパターンを
形成する工程と、 (b)前記レジストパターンの耐熱性を高めるべく該レ
ジストパターンに遠紫外線を照射する工程と、 (c)前記遠紫外線照射の後、前記レジストパターンを
マスクとして前記被処理品にイオンを選択的に注入する
工程と を含むイオン注入方法。 2、(a)被処理品を収容可能な予備排気室と、(b)
この予備排気室に収容された被処理品に熱処理を施すべ
く該予備排気室に設けられた加熱装置と、 (c)前記予備排気室に収容された被処理品に遠紫外線
を照射すべく該予備排気室に設けられた遠紫外線照射装
置と、 (d)供給される被処理品にイオンを注入するためのイ
オン注入室と、 (e)前記予備排気室に収容された被処理品を外気にさ
らすことなく前記イオン注入室に供給するための移送手
段と をそなえたイオン注入装置。 3、複数の被処理品を収容可能な介在排気室を前記予備
排気室と前記イオン注入室との間に設け、前記移送手段
は、前記予備排気室に収容された被処理品を外気にさら
すことなく前記介在排気室に供給する第1の移送手段と
、前記介在排気室に収容された被処理品を外気にさらす
ことなく前記イオン注入室に供給する第2の移送手段と
を含むことを特徴とする請求項2記載のイオン注入装置
[Claims] 1. (a) a step of forming a desired resist pattern on the surface of an object to be processed; (b) a step of irradiating the resist pattern with deep ultraviolet rays in order to improve the heat resistance of the resist pattern. (c) After the deep ultraviolet irradiation, the ion implantation method includes the step of selectively implanting ions into the workpiece using the resist pattern as a mask. 2. (a) A preliminary exhaust chamber capable of accommodating the items to be processed, and (b)
(c) a heating device provided in the pre-evacuation chamber for heat-treating the workpieces accommodated in the pre-evacuation chamber; (d) an ion implantation chamber for injecting ions into the supplied workpiece; (e) a deep ultraviolet irradiation device provided in the preliminary exhaust chamber; (e) an ion implantation chamber for injecting ions into the workpiece being supplied; and a transfer means for supplying the ion implantation chamber to the ion implantation chamber without exposing the ion implantation apparatus to the ion implantation chamber. 3. An intervening exhaust chamber capable of accommodating a plurality of workpieces is provided between the preliminary exhaust chamber and the ion implantation chamber, and the transfer means exposes the workpieces accommodated in the preliminary exhaust chamber to the outside air. and a second transfer means that supplies the workpieces accommodated in the intervening exhaust chamber to the ion implantation chamber without exposing them to the outside air. The ion implantation apparatus according to claim 2, characterized in that:
JP1116456A 1989-05-10 1989-05-10 Ion implantation method Expired - Lifetime JP2782357B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1116456A JP2782357B2 (en) 1989-05-10 1989-05-10 Ion implantation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1116456A JP2782357B2 (en) 1989-05-10 1989-05-10 Ion implantation method

Publications (2)

Publication Number Publication Date
JPH02295114A true JPH02295114A (en) 1990-12-06
JP2782357B2 JP2782357B2 (en) 1998-07-30

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Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5591654A (en) * 1992-12-28 1997-01-07 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor device and a resist composition used therein
WO2005020306A1 (en) * 2003-08-25 2005-03-03 Matsushita Electric Industrial Co., Ltd. Method for forming impurity-introduced layer, method for cleaning object to be processed, apparatus for introducing impurity and method for producing device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5935427A (en) * 1982-08-24 1984-02-27 Nec Corp Method and apparatus for implanting ion
JPS6151740A (en) * 1984-08-21 1986-03-14 Mitsubishi Electric Corp Ion implantation device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5935427A (en) * 1982-08-24 1984-02-27 Nec Corp Method and apparatus for implanting ion
JPS6151740A (en) * 1984-08-21 1986-03-14 Mitsubishi Electric Corp Ion implantation device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5591654A (en) * 1992-12-28 1997-01-07 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor device and a resist composition used therein
WO2005020306A1 (en) * 2003-08-25 2005-03-03 Matsushita Electric Industrial Co., Ltd. Method for forming impurity-introduced layer, method for cleaning object to be processed, apparatus for introducing impurity and method for producing device
US7759254B2 (en) 2003-08-25 2010-07-20 Panasonic Corporation Method for forming impurity-introduced layer, method for cleaning object to be processed apparatus for introducing impurity and method for producing device

Also Published As

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