JPH02295105A - Charged particle beam lithography equipment - Google Patents

Abstract

PURPOSE:To realize uniform lithography accuracy and improve a throughput by a method wherein electron beams are generated by two columns whose acceleration voltages are high and low respectively and, after large area patterns are lithographed on a resist surface on a substrate sample by the low acceleration voltage with a high speed, successively, the remaining fine patterns are lithographed on the same resist surface by the high acceleration voltage. CONSTITUTION:When a stage 10' on which a sample 9' is placed is directly under a column 1'', switches SW1 and SW2 are selected in accordance with the instruction of a computer 15 and the large area patterns such as electrode wirings and bonding pads of an LSI or the like are lithographed on a resist surface on the sample 9' by the control of a blanking circuit 13' and so forth with a high speed. Successively, after the sample 9' is transferred to the position directly under a column 1 by the stage 10', the switches SW1 and SW2 are selected again in accordance with the instruction of the computer 15 and the fine patterns such as fine gate electrodes and contact holes of transistors are lithographed by the control of a blacking circuit 13 and so forth with high accuracy.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a charged particle beam device for forming patterns of various ICs, LSIs, etc. on semiconductor substrates, and particularly relates to improvements in devices capable of forming patterns at high speed and with high precision.

[Conventional technology]

In recent years, charged particle beam devices using ions and electrons have been in the spotlight as devices for processing and forming patterns for LSIs and the like on semiconductor substrates at high speed and with high precision. Among them, in electron beam lithography equipment using electrons, LS
The throughput from generation of a pattern such as I to drawing on a substrate surface to fabrication of a processed layer using the pattern has been significantly improved. However, even though they are superior in terms of processing accuracy, they are far from being comparable in throughput to optical pattern transfer devices such as steppers, and further improvements have been desired. Therefore, in recent years, the multi-force ram method has emerged as one of the means to achieve high throughput (for example,
2-137835). Figure 3 is an example. This figure shows a case where two columns (electron optical lens barrels) 1 and 1' having exactly the same specifications are installed. Here, its operation will be briefly explained. Since the structural functions within column 1 are exactly the same as column 1', only column 1 will be described. First, the electron beam 3 emitted from the electron gun 2 is transmitted to the high voltage power supply 12.
is accelerated by the acceleration voltage Vo, and the irradiation lens 4,
It is focused onto the substrate sample 9 by the objective lens 6 via the planning force -5, and a predetermined drawing area is controlled by the deflection system 7 via the deflection circuit 14. Plan power -5 is calculator 15
, the electron beam 3 is controlled to be turned on or off through a planking circuit 13 depending on the presence or absence of drawing pattern data. Further, the signal detector 8 is used to confirm the drawing position by detecting reflected electrons or secondary electrons when the electron beam 3 is irradiated onto a mark or the like prepared in advance on the substrate sample 9. The stage 1o moves freely within the X-Y plane to control a desired drawing position on the sample 9 directly below the electron beam 3. Based on the above operation, columns 1 and 1' are common calculator 1
5 and 5 simultaneously, and finally a desired LSI pattern is drawn on the substrate sample 9. However, in the conventional example shown in FIG. 3, columns 1 and 1'' have the same accelerating voltage vO, so the submicron
A large surface of several tens of microns from the line VT. complex L across domains
There is a limit to how efficiently an SI pattern can be drawn with uniform precision throughout. This is due to the existence of a proximity effect phenomenon within or between patterns. In other words, the level of accelerating voltage, which is related to the electron beam diameter, is also related to the selectivity of whether to emphasize fine precision of the drawn pattern or throughput. Conventionally, we have taken the former position, but it is difficult to make the overall accuracy uniform from fine line parts to large area parts, and complicated data conversion operations such as proximity effect correction are required at the drawing data creation stage. I needed it. Such means will increase the number of pattern data,
This was not sufficient to improve throughput.

[Problem to be solved by the invention]

The conventional multi-force ram method described above uses multiple electron beams generated from columns with the same accelerating voltage, so sufficient consideration has been given to both uniformity of precision and improvement of throughput for fine patterns and large-area patterns. There wasn't. An object of the present invention is to provide an apparatus that can achieve uniform accuracy regardless of the size of the pattern area to be drawn, and at the same time can further improve throughput.

[Means to solve the problem]

The above purpose is to generate an electron beam from a column divided into at least two different high and low acceleration voltages in a multi-force ram structure, and then write a large area at high speed on the same substrate sample at a low acceleration voltage. This is achieved by subsequently writing the remaining fine parts at high acceleration and processing them rapidly.

[Effect]

It is known that when an electron beam resist coated on a substrate sample is exposed to light by electron beam irradiation, the deposition energy of electrons in the resist increases as the accelerating voltage decreases. In other words, the resist sensitivity increases as the accelerating voltage decreases (however, the electron beam diameter tends to increase and the fine precision tends to deteriorate). Therefore, large-area patterns such as pads and electrode wiring are quickly drawn with an electron beam at a low acceleration voltage, and fine patterns such as gate electrodes, which occupy a small area, are drawn with an electron beam at a high acceleration voltage. Thereby, it is possible to equalize the precision by a type of proximity effect correction and to improve the throughput. [Example] Hereinafter, an example of the present invention will be described with reference to FIGS. 1 and 2. First, the parts numbers in FIG. 1 that are the same as those in FIG. 3 above refer to the same parts. The reason why columns 1 and 1'' are placed on a common sample chamber 11' that communicates with the same vacuum atmosphere in FIG. 1 in this embodiment is as follows. However, if the accelerating voltages of columns 1 and 1' are different from high to low, the effect of the present invention can be obtained, but in that case, there are the following drawbacks.In other words, the sample chamber 11 is Because it is separated into
In order to transfer the sample that has been drawn from column 1 to column 1', it is necessary to load/unload the cassette, which increases evacuation time loss. Further, since the sample 9 drawn on the column 1 side is once taken out into the atmosphere and then reinserted into the column 1' side, the problem of dust accumulation occurs. Furthermore, when transferring a sample cassette between both columns, there is a drawback that alignment accuracy is likely to deteriorate due to the peculiarities of each column. As a result of the above reasons, FIGS. 1-2 of the present invention provide for each column 1 with two different accelerating voltages vO and Vo'.
and 1" are respectively placed on a common sample chamber 11'. Therefore, regarding the column 1 side, as in the case of FIG. The excitation current or the deflection current of the deflection system 7, etc. are individually pre-adjusted.On the other hand, in the present invention, regarding the column 1" side of Vo' lower than Vo, the lens system 4 ',
The excitation current of 6' and the deflection current of deflection system 7' are also Vo'
Make preliminary adjustments according to the size. This is because the lens system, planking deflection voltage, gain of the deflection circuit, etc. are determined in accordance with the acceleration energy of the electron beam, and must be adjusted in advance. On the other hand, a common sample chamber 11 for the two columns 1, 1"
'A similar substrate sample 9' is mounted on a movable stage 10.
Therefore, as a drawing procedure in the present invention, first, Vo' is set to 15 kV, and at the stage 10' shown in the figure, SWI and SW2 are selected based on the command from the computer 15, and the LSI is Large-area patterns such as electrode wiring or bonding pads are drawn on the resist surface of the sample 9' at high speed through control of the blanking circuit 13'. Subsequently, the sample 9' is moved by the stage 10' to V o = 30 kV directly under the column 1, and then SWI and SW2 are reselected according to the instructions from the computer 15, and the transistor is The fine patterns of gate electrodes and contact holes are drawn with high precision. The use of columns 1 and 1'' can be selected arbitrarily, for example for each block of a multi-chip configuration or for each wafer.Also, the order in which columns 1 and 1'' are used can be used in the reverse order with the same effect. can get. Here, in experiments conducted by the authors regarding acceleration voltage changes, as an example, resist sensitivity of 5 μC/cJ at Vo = 30 kV is approximately 1.5 μC/cJ at Vo' = 15 kV.
It was confirmed that it was improved to 2.9 μC/cd, which is 7 times. Also. At Vo' = 20kV, it is 3.8 which is approximately 1.3 times
It was μC/d. Example 2 is shown in FIG. This embodiment adds an independently movable stage 19 to the functions of the first embodiment. That is, column 1″
When writing on the sample 9' on the side, the column 1 side is on standby, resulting in a time loss. Stage 1 where you can move independently
9 is provided, and drawing progresses in parallel on another sample 17 (inserted from the left, not shown) fixed to this using electrons a3. In this case, if the capacity of the control computer 15 is insufficient, it may be added separately for column 1. In the procedure for exchanging the drawing sample in this embodiment, for example, the sample 9', which has been drawn first, is recovered into the atmosphere by moving the stage 10' to the right while being fixed to the cassette 16. Next, the stage 10' moves to near the central transfer table 20 within the sample chamber 11'. When the drawing of the sample 17 is completed here, the stage 19 is moved to the transfer table 2 with a roller guide.
0 and pull out the cassette 18 using the pull-out rod (not shown).
The stage 10' is then placed again on the stage 10', and drawing on the column 1'' side is resumed.The transfer table 20 does not need to be provided in this case, and the transfer may be carried out directly from the stage 19 to the stage 10'. By repeating this, the second embodiment can further contribute to high throughput by minimizing the waiting time of both columns 1 and 1''. [Effects of the Invention] As described above, according to the present invention, large-area patterns are drawn at high speed with a thick electron beam with a relatively low acceleration voltage, and submicron patterns are drawn with a thin electron beam with a high acceleration voltage. Proximity effect correction can be obtained, and the complicated work of converting proximity correction data can be greatly reduced. This makes it possible to achieve uniform drawing accuracy and improve throughput.6Although the present invention has been described using an electron beam as an example of a charged particle beam, the same effect can be obtained with an ion beam.

[Brief explanation of drawings]

FIGS. 1 and 2 are schematic diagrams of a charged particle beam device according to an embodiment of the present invention, and FIG. 3 is a schematic diagram of a conventional charged particle beam device. Explanation of symbols 1, 1'... Column, 2... Electron gun, 3, 3'...
・Electron beam, 5,5′...Plunker 9.9'l7...Substrate sample, 10.10' 19...Stage, 12.12'・
...High voltage power supply, 13.13'... Planking circuit,
15...Calculator, 16.18...Cassette. Horse, 9': Acceleration t catty/6, /♂: Kagut 20: j agricultural b platform

Claims (1)

[Claims] 1. In a charged particle beam device that forms various patterns by irradiating a charged particle beam onto a substrate sample, the charged particle beam is generated from a plurality of electron optical lens barrels using at least two types of high and low accelerating voltages, and A charged particle beam apparatus characterized in that the plurality of electron optical lens barrels are placed on a single sample chamber in which the sample can be moved and communicated with each other in a common vacuum atmosphere, and are controlled by a single computer.