JPH02288975A - Vector arithmetic unit - Google Patents

Vector arithmetic unit

Info

Publication number
JPH02288975A
JPH02288975A JP3801889A JP3801889A JPH02288975A JP H02288975 A JPH02288975 A JP H02288975A JP 3801889 A JP3801889 A JP 3801889A JP 3801889 A JP3801889 A JP 3801889A JP H02288975 A JPH02288975 A JP H02288975A
Authority
JP
Japan
Prior art keywords
address
address register
mask bit
time
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3801889A
Other languages
Japanese (ja)
Inventor
Yukihiro Fujino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Engineering Ltd
Original Assignee
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Engineering Ltd filed Critical NEC Engineering Ltd
Priority to JP3801889A priority Critical patent/JPH02288975A/en
Publication of JPH02288975A publication Critical patent/JPH02288975A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To decrease the number of operations and to shorten a whole operation time by executing no unnecessary operations when a mask bit shows '1.'
CONSTITUTION: When the mask bit read from a memory 7 by an address, for which '1' is added to the output of an address register 5, is '1,' '1' and '1' are added to the output of the address register 5 by an adder 8 and stored to the address register 5. Samely, the data of vector registers 1 and 2 are read by the address of the address register 5 and calculated by an arithmetic part 3. At such a time, the output of the address register 5 is increased by '2.' Namely, at such a time, when the address is stored to a vector register 4, data to be abandoned when the mask bit of the memory 7 is referred are stored. Accordingly, the arithmetic is not executed but operation is skipped. Thus, when the mask bit is '1,' the number of the unnecessary operations is decreased and a whole processing time is shortened.
COPYRIGHT: (C)1990,JPO&Japio
JP3801889A 1989-02-17 1989-02-17 Vector arithmetic unit Pending JPH02288975A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3801889A JPH02288975A (en) 1989-02-17 1989-02-17 Vector arithmetic unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3801889A JPH02288975A (en) 1989-02-17 1989-02-17 Vector arithmetic unit

Publications (1)

Publication Number Publication Date
JPH02288975A true JPH02288975A (en) 1990-11-28

Family

ID=12513835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3801889A Pending JPH02288975A (en) 1989-02-17 1989-02-17 Vector arithmetic unit

Country Status (1)

Country Link
JP (1) JPH02288975A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0877143A (en) * 1994-09-02 1996-03-22 Kofu Nippon Denki Kk Vector data processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0877143A (en) * 1994-09-02 1996-03-22 Kofu Nippon Denki Kk Vector data processor

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