JPH02278986A - Picture signal processor - Google Patents

Abstract

PURPOSE:To attain special effect freely by writing a data from a control means to a memory during a video image blank period and reading the data from the memory during the video effective period according to an input digital component. CONSTITUTION:A control means 1 gives an address signal to memories 3R, 3G, 3B via selectors 2R, 2G, 2B during a video blank period to write the data supplied from the control means 1 to the memories 3R, 3G, 3B via selectors 4R, 4G, 4B. Then an input digital component signal is given to the memories 3R, 3G, 3B as an address signal via the selectors 2R, 2G, 2B externally during the video valid period and the data in the memories 3R, 3G, 3B written in advance is read and outputted via the selectors 4R, 4G, 4B. Thus, the gain control in common to the R, G, B colors and also other special effect are applied to attain picture processing of multifarious kinds.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image signal processing device suitable for use in signal control of digital component video signals, etc.

[Summary of the invention]

The present invention includes a control means, a first selection means for selecting and outputting an address from the control means and an input digital component signal from the outside, and an output signal of the first selection means being supplied. A memory means is provided with a bank address signal from the control signal, and a second selection means is provided for selecting an output from the memory means and an input of data from the control means to the memory means. By writing the data from the control means into the memory means and reading the data from the memory means according to the input digital component signal during the video valid period, 3JJJ [color (R, G
, B) In addition to common gain control, special effects such as color adjustment, negative/positive inversion, and gamma correction can be freely performed.

[Conventional technology]

ICF (Image Contribution) is determined by the so-called CDI format, which is generally used for signal control near the output of digital and digital equipment.
Factor) is expressed as follows for each component of the three primary colors (R, G, B). However, the clamp level is set to 16.

C= I CF * (C'-16) +1 smile, C
' is an RGB component input, C is an RGI13'' component output, and 0≦■CF≦1.

One possible way to implement this in terms of hardware is to use a multiplier. Another possible method is to prepare a ROM table and switch the banks of the table corresponding to the range of the ICF.

[Problem to be solved by the invention]

However, in the case of a conventional circuit using a multiplier, it is not possible to perform anything other than gain control, and furthermore, the circuit scale is large and the processing speed is slow, and this tends to increase as the bit length of the video signal becomes longer.

In addition, in the method using ROM, the ICF range is subdivided and a large capacity ROM is required;
It has been difficult to control the ICF, which is fixed by the ICF, and to do anything other than control each component or gain control.

This invention was made in view of this point, and provides an image signal processing device that can perform not only common gain control for R, G, and B, but also other special effects freely and quickly with a simple circuit configuration. It provides:

[Means to solve the problem]

The image signal processing device according to the present invention includes a control means (1), a first selection means (2R, 2G, 2B) and a memory means (3R, 3G, 3B) to which the output signal of this first selection means (2R, 2G, 2B) is supplied and also the bank address signal from the MIll signal (1). and the output and control hand from this memory means (3R, 3G, 3B) & (1) to the memory means (3R, 3G, 3B)
) second selection means (4R,
4G, 4B), and during the video blank period, the data from the control means (1) is stored in the memory & (3R, 3G,
3B), and the memory means (
3R, 3G, 3B) in accordance with input digital component signals.

[Effect]

During the video blank period, the control means (1) gives an address signal to the memory means (3R, 3G, 3B) via the first selection hand & (2R, 2G, 2B), and the control means (1) accordingly from the second selection means (4R, 4G, 4
B) The data supplied through the memory means (3R
, 3G, 3B), and during the video valid period, the input digital component signal is externally sent to the memory means (3R, 3G) as an address signal via the first selection means (2R, 2G, 2B).

3B), and in accordance with this, the previously written data in the memory means (3R, 3G, 3B) is read out and outputted via the second selection means (4R, 4G, 4B). This allows not only gain control common to R, G, and B, but also other special effects such as color adjustment, negative/positive inversion,
Gamma correction etc. can be performed, making it possible to perform a wide variety of image processing.

[Embodiment] Hereinafter, an embodiment of the present invention will be described in detail based on FIGS. 1 to 5.

Figure 1 shows the circuit configuration of this embodiment. In the figure, (1) is a controller using, for example, a microcombi controller, (2R), (2G), and (2B) are three primary colors (R , G, B), a plurality of selectors (3R), (3G), (3B) are selectors (2R) provided corresponding to the digital component signals CO to Cn each consisting of n bits.

(2G) and (2B).

(4R), (4G), and (4B) are each RAM(3
R), (3G), (3B) input/output data rd, ~
These are multiple selectors that switch between rd and rd. Further, (5) is a terminal to which a blank signal is supplied. This blank signal is sent to the selectors (2R), (2G), (2B) and (4R).
), (4G>, (4B) as well as the controller (1).

The selectors (2R), (2G), and (2B) also receive n-bit address signals a0 to a1 from the controller (1).
are supplied, selectors (2R), (2G), (
2B> inputs the external digital component signals CO to Cn to the address signals ra6 to ra when no blank signal is supplied to the terminal (5), that is, during the video valid period.
, as RAM (3R), (3G), (3B) respectively.
When a blank signal is supplied to the terminal (5), that is, during the video blank period, the address signals a, to a7 from the controller (1) are sent to RAM (3R), respectively.
(3G) and (3B) as address signals 4ra, ~ra.

In addition, from the controller (1) to RAM (3R), (
3G).

(3B) is an m-bit bank address signal bro~b.
r,, bgo ~ bga and bbo ~ bba are supplied respectively, and these bank address signals are the same for each RAM (3R), (3
G), (3B) to access common data to three RAMs simultaneously, so in this case each RAM (3B)
3R), (3G).

In (3B), data in tables with the same number is accessed. Also, the bank address signal is used for each R during the video valid period.
It is also possible to give separate addresses to AM(3R), (3G), and (3B>, respectively, and pass each digital component signal to a separate table. This allows each digital component to be controlled individually. It becomes possible.

In addition, the selectors (4R), (4G), and (4B) transfer n-bit data d, -d from the controller (1) to the RAMs (3R), (3G), and (3G) during the video blank period.
RAM (3R), (3G),
(3B), and during the video valid period, RAM (3R), (3G
), data CO' to Cn' read from (3B)
output.

Next, the operation of the circuit shown in FIG. 1 will be explained with reference to FIGS. 2 to 5.

During the video blank period when a blank signal exists as shown in FIG. 2B, the selectors (2R), (2G), and (2B) are
As shown in Figure C, the address signals a, ``-a'' from the controller (1) are selected and RAM (3R)
(3G), (3a). At this time, RAM
(3R), (3G), and (3B) are in the writing state as shown in the second figure, and the data that has passed through the selectors (4R), (4G>, and (4B) from the controller (1), respectively) is transferred to the controller [ Write according to address signals a0 to a0 from 1).

Figure 3 shows each RAM (3R), (3G), (3B)
- For example, for each RAM, table 0 has 0x data, table 1 has 0.5x data, table 2 has 1x data, and table 3 has data written to 1x data. This is a case where 1.5 times the data is written respectively.

As shown in FIG. 2A, selectors (2R) and (2G) are used during the video valid period in which digital component signals exist.

(2B) selects digital component signals Co-Cn from the outside as shown in FIG.
R), (3G), and (3B) as address signals.

At this time, RAM (3R), (3G>, (3B) is in the read state as shown in Figure 2 D, data is read out according to the address signal based on the digital component signal, and the selector (4R), (4G ), (4B>
is output as shown in FIG. 2E. This output is essentially the digital component output Co'-Cn'.

For example, initially each RAM (3R), (3G)
, (3B') is set in table 2, and 1 times the data, that is, the normal screen is output. Next, each RAM (
3R), (3G).

If (3B) is set in table 1 and 0.5 times the data is output, this means that 172 times the gain control is achieved. Also, for example, RAM (3R).

(3G) and (3B) are set in table 2, and if you switch the bank address signal to RAM (3R) to create table 3, it will be 1.5
Double the data is output, red (R) is emphasized, and color adjustment has been completed. It can be seen that in this way, in addition to gain control, another special effect called color 61jl can be obtained.

Figure 4 shows an example of the contents of one table in the case of negative/positive reversal as another special effect.In a certain table, take the one's complement of the address and set the value as data for each table. Then, the digital component signal that selected that table is inverted and taken out.

In FIG. 4, for example, if we consider 44 address signals (digital component signals) consisting of an upper address of 40 and a lower address of 04, the data read out at this time is 8B, which is the negative of the digital component signal input as the address signal 44. It is reversed. In addition, when the address signal is 85 consisting of the upper address 80 and the lower address 05, the negative inverted data 7
People are output. By using this table in this way, it becomes possible to reverse the screw position.

Figure 5 shows gamma correction as another special effect.
This table shows an example of the contents of two tables. When each component signal has not yet undergone gamma correction processing,
Gamma correction can be performed by setting gamma correction curve data for addresses. The table in Fig. 5 is set with a curve of Y=aX"'. Here, X is an address value, Y is a data value, and when a It X = 219, Y = 2.
This is a coefficient of 19.

In FIG. 5, if we consider, for example, 32 address signals (digital component signals) consisting of an upper address of 30 and a lower address of 02, the data read at this time is gamma-corrected data 70.

In this way, in this embodiment, image processing that conventionally only allowed gain control can be performed with other special effects such as color adjustment, negative/positive inversion, gamma correction, etc. In addition, special effects such as image fade-in and fade-out can be freely controlled by using a plurality of tables and rewriting and switching the currently used table.

〔Effect of the invention〕

As described above, according to the present invention, the address signal from the control means and the manually input digital component signal from the outside are selectively supplied to the memory means, and the bank address signal from the control means is also supplied to the memory means. The output from the control means and the input of data from the control means to the memory means are selected, and during the video blank period, data is written from the control means to the memory means, and during the video valid period, data input from the memory means is selected. Since the data is read according to the component signals, R, G, and B can be read with a simple configuration without using multipliers like in the past.
In addition to common gain control, special effects such as color adjustment, negative/positive inversion, and gamma correction can be performed freely and quickly. Furthermore, if one table can be rewritten within one field period, signal control can be performed for each field.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIGS. 2 to 5 are diagrams for explaining the operation of the present invention. (1) is the controller, (2R), (2G), (2
B), (4R), (4G). (4B) is a selector, (3R), (3G), (3a)
is RAM. Deputy Hide Mori Hitomatsu Kuma

Claims (1)

[Claims] 1. A control means; a first selection means that selects and outputs an address from the control means and an input digital component signal from the outside; and an output signal of the selection means is supplied. and memory means to which a bank address signal from the control signal is supplied; and second selection means for selecting an output from the memory means and an input of data from the control means to the memory means, An image signal processing apparatus characterized in that data from the control means is written into the memory means during a video valid period, and data is read from the memory means according to the input digital component signal during a video valid period. 2. The first and second selection means each include a plurality of selectors corresponding to the three primary colors of the input digital component signal, and the memory means comprises a plurality of selectors corresponding to the three primary colors of the input digital component signal. The image signal processing device according to claim 1, comprising a memory.