JPH02278597A - Sample hold circuit - Google Patents

Abstract

PURPOSE:To suppress fluctuation in the charging voltage of a capacitor even when a sampling circuit is made inactive for a long time by adding a current source to cancel and leaked current of the capacitor when the sampling circuit is made inactive. CONSTITUTION:A current source IH is newly added to cancel the leaked current of a capacitor C1 when a sampling circuit A is made inactive. When the sampling circuit A is made inactive (when a control signal P is 'L',) any current is not supplied from a current source I0 to the capacitor C1 and the capacitor C1 is charged only by the current source IH. Since the current value of the current source IH is determined to be equal with the leaked current value of the capacitor C1, the charging voltage of the capacitor C1 is not fluctuated even in case the sampling circuit A is made inactive for a long time. As a result, the level of a signal to an output terminal 7 is not changed as well.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a sample hold circuit that is used, for example, in an auto white balance circuit of a color video camera, and is used to prevent the white balance from being extremely distorted. .

[Conventional technology]

FIG. 2 is a circuit diagram showing a conventional sample and hold circuit used in an auto white balance circuit with an external light input type sensor. In the above type of auto white balance circuit, a photosensor is provided in addition to the image sensor.
The output of this photosensor is used to generate a signal representing the color temperature of the light source illuminating the subject. In the figure, 1 is an input terminal to which such a signal X is input, and 2 is a voltage source for determining a hold voltage when a sudden change in brightness occurs and the level of the signal X changes suddenly.

SWI is a switch that is normally connected to the input terminal 1 side, and switches to the voltage source 2 side when the level of the signal X suddenly changes. A buffer circuit 3 buffers and outputs the signal from the switch SWI, and is composed of an operational amplifier 4 and an NPN transistor Q1. The operational amplifier 4 has a -input connected to a switch SWI. The transistor Q1 has a base connected to the output of the operational amplifier 4, a collector connected to the ten inputs of the operational amplifier 4, and an emitter connected to ground. ■. is a current source, and the power supply voltage V
cc and the collector of transistor Q1. The current source Io and the buffer circuit 3 constitute a sampling circuit A. The sampling circuit A operates in response to the control signal P being "H". A signal from the buffer circuit 3 is applied to a voltage follower 6 via an integrating circuit 5 consisting of a resistor R and a capacitor C1. The voltage follower 6 is composed of an operational amplifier, converts the applied signal into impedance, and applies it to the output terminal 7.

Next, the operation will be explained. When a signal X with little level change is applied to the input terminal, the switch SWI is switched to the input terminal 1 side.

The control signal P is always applied to the sampling circuit A, and the sampling circuit A operates only during the period when the control signal P is "H". When sampling circuit A is operating,
The signal X is given to the integrating circuit 5 via the buffer circuit 3,
It is smoothed and applied to the voltage follower 6. The voltage follower 6 converts the impedance of the smoothed signal X and supplies it to the output terminal 7. When the control signal P becomes "L", the sampling circuit A is disabled, and the charging voltage (charging voltage according to the level of the signal X) charged in the capacitor C1 while the control signal P is "H" is displayed at the output terminal 7. is output. Note that if sampling circuit A is disabled, current source ■. There will also be no current supply from the

On the other hand, when a sudden brightness change occurs and the level of the signal X changes suddenly, the switch SWI is switched to the voltage source 2 side. When the sampling circuit A is operating (when the control signal P is "H"), the voltage V of the voltage source 2 is applied to the buffer circuit 3. The signal is outputted to an output terminal 7 via an integrating circuit 5° and a Poldage follower 6. When the sampling circuit A is disabled (when the control signal P is "L"), the charging voltage (the voltage of the voltage source 2) charged to the capacitor C] is output to the output terminal 7 while the control signal P is "H". The signal output to the output terminal 7 is sent to a white balance adjustment circuit (not shown), and the white balance adjustment circuit adjusts the white balance according to the level of the applied signal. do.

[Problem to be solved by the invention]

The conventional sample and hold circuit is configured as described above, and is enabled/disabled depending on the "H"/"L" level of the control signal P. Current source I when sampling circuit A is disabled. There will be no current supply from the Therefore, if the period in which sampling circuit A is disabled continues for a long time, capacitor C
A leakage current flows from the transistor Q1, for example, through the input of the voltage follower 6 and the transistor Q1. This leakage current causes the charging voltage of the capacitor C1 to fluctuate, causing a problem in that the white balance changes.

The present invention was made to solve the above-mentioned problems, and it is an object of the present invention to provide a sample and hold circuit in which the charging voltage of a capacitor does not change even if the sampling circuit is disabled for a long time.

[Means to solve the problem]

The sample and hold circuit according to the present invention includes a switch that is supplied with a signal to be sampled and held and a predetermined voltage, and that switches according to a change state of the signal and selectively outputs the signal to be sampled and held or the predetermined voltage; an operational amplifier having one input connected to the switch, a transistor having a control electrode connected to the output of the operational amplifier, an edge connected to a first potential, and the other end connected to the other input of the operational amplifier;
and a first current source connected between the other end of the transistor and a second potential, the first current source being enabled/disabled in response to an applied control signal to select the signal from the switch to the other end of the transistor. a sampling circuit that outputs a
leakage current of a capacitor connected between a second potential and the other end of the transistor, and the amount of current is the capacitor's leakage current when the sampling circuit is disabled. and a second current source set equal to the amount.

[Effect]

The amount of current of the second current source in this invention is determined to be equal to the leakage current from the capacitor that occurs when the sampling circuit is disabled, so even if the sampling circuit is disabled for a long time, the charging voltage of the capacitor remains unchanged. Since it does not fluctuate, the output level of the sample and hold circuit does not change.

〔Example〕

FIG. 1 is a circuit diagram showing an embodiment of a sample and hold circuit according to the present invention. The difference between the figure and the conventional circuit shown in FIG. 2 is that it is designed to cancel the leakage current of the capacitor C1 when the current ring circuit A is disabled, and the power supply voltage V. 0 and the collector of transistor Q1. Other configurations are the same as before. Note that the resistor R]- was conventionally provided to restrict the discharge of the capacitor C1 to prevent even the slightest variation in the charging voltage of the capacitor C1, but in this embodiment, it is provided as a current source for offsetting the leakage current of the capacitor C1. Since the resistor R1 is provided, the resistor R1 is no longer necessary.Next, the operation will be explained. When a signal X with little level change (amplitude of several hundred mV or less) is applied to input terminal 1,
As in the conventional case, the switch SWI is switched to the input terminal 1 side.

Assuming that sampling circuit A is activated (when control signal P is “H”), signal
The signal is applied to the voltage follower 6 via the voltage follower 6, is impedance-converted, and is output to the output terminal 7. At this time, capacitor C1 is charged according to the level of signal X. Current source■
There is a current source II, but this current value is the current source I.

The current value (several nmA) is very small compared to the current value (several tens of μA).
), so it can be ignored in the above operation.

When the sampling circuit A is disabled (when the control signal P is "L"), the capacitor C1 has a current source ■. The current source is no longer supplied from the capacitor C, and only the current source IH is connected to the capacitor C.
1 is charged. As described above, the current value of the current source '+1 is determined to be equal to the leakage current value of the capacitor C1, and even if the long-term sampling circuit A is disabled, the charging voltage of the capacitor C1 does not change. As a result, output terminal 7
The level of the signal to is also unchanged.

Next, if a sudden change in brightness occurs and the level of the signal
is switched to the voltage source 2 side.

When the sampling circuit A is activated in this state, the voltage V of the voltage source 2 is applied to the voltage follower 6 via the sampling circuit A, impedance-converted, and output to the output terminal 7. At this time, the capacitor C1 is charged according to the magnitude of the voltage V. Note that the current value of current value III is a minute current as described above and can be ignored.

If sampling circuit A is disabled, capacitor C
1 is charged only by the current source IH. Therefore, for the same reason as mentioned above, even if the sampling circuit A is disabled, the charging voltage of the capacitor C1 does not change, and the output terminal 7
The signal level to , too, does not change.

In this way, the current source IH cancels out the leakage current of the capacitor C1, so even if the sampling circuit A is disabled for a long time, the level of the signal to the output terminal 7 does not change and the white balance does not deteriorate. .

〔Effect of the invention〕

As described above, according to the present invention, since the second current source is provided whose current amount is set equal to the leakage current amount of the capacitor when the sampling circuit is disabled,
Even if the sampling circuit is disabled for a long time, the charging voltage of the capacitor does not change, and there is an effect that, for example, in an auto white balance circuit, a signal that would disrupt the white balance is not generated.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a sample hold circuit according to the present invention, and FIG. 2 is a circuit diagram showing a conventional sample hold circuit. In the figure, 1 is an input terminal, 2 is a voltage source, SW1 is a switch, 4 is an operational amplifier, Q] is a transistor, (2) and III are current sources, A is a Zumbling circuit, and C1- is a capacitor. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] (1) A switch to which a signal to be sampled and held and a predetermined voltage are applied, switches according to the state of change of the signal, and selectively outputs the signal or the predetermined voltage; one input is connected to the switch; operational amplifier,
a transistor having a control electrode connected to the output of the operational amplifier, one end connected to a first potential, and the other end connected to the other input of the operational amplifier, and connected between the other end of the transistor and the second potential. a sampling circuit that has a first current source that is activated or deactivated according to a control signal that is applied, and that selectively outputs a signal from the switch to the other end of the transistor; a capacitor connected between a potential and the other end of the transistor; and a capacitor connected between the second potential and the other end of the transistor, the amount of current of which is the same as the amount of current when the sampling circuit is disabled. A sample hold circuit including a second current source set equal to the amount of leakage current of the capacitor.