JPH0227615A - Input and output cable for extremely low temperature integrated circuit - Google Patents

Input and output cable for extremely low temperature integrated circuit

Info

Publication number
JPH0227615A
JPH0227615A JP63178451A JP17845188A JPH0227615A JP H0227615 A JPH0227615 A JP H0227615A JP 63178451 A JP63178451 A JP 63178451A JP 17845188 A JP17845188 A JP 17845188A JP H0227615 A JPH0227615 A JP H0227615A
Authority
JP
Japan
Prior art keywords
insulating layer
ground conductor
parallel
grounding conductor
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63178451A
Other languages
Japanese (ja)
Inventor
Koichi Nakagawa
幸一 中川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP63178451A priority Critical patent/JPH0227615A/en
Publication of JPH0227615A publication Critical patent/JPH0227615A/en
Pending legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/60Superconducting electric elements or equipment; Power systems integrating superconducting elements or equipment

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)

Abstract

PURPOSE:To prevent any trouble on contacts associated with heat contraction under an extremely low temperature by utilizing a vertically orientated polymer insulating layer as an insulating layer, and absorbing a heat strain due to a difference in a linear expansion among foreign materials of a signal wire, the insulating layer and a grounding conductor. CONSTITUTION:The first vertically orientated polymer insulating layer 5 comprising a signal wire (copper) 2, the first grounding conductor (copper) 3, the second grounding conductor (copper) 4 and poly-oxymethylene, and the second vertically orientated polymer insulating layer 6 comprising poly-oxymethylene are prepared. Then, an insulated conductor is formed by lamination by epoxy glue 7 so that the vertically orientated polymer insulating layers 5 and 6 may touch the signal wire 2. In the vertically orientated polymer insulating layers 5 and 6 a polymer crystalline granule block of which a molecule axis is orientated perpendicular to a surface of the grounding conductor intervenes between a surface that correlative signal wires are lined in parallel and the grounding conductor. Due to a spacing existing in a boundary of a crystalline granule within a surface paralleled to the grounding conductor, the heat strain may be absorbed. Accordingly any trouble on contacts associated with the heat contraction under the extremely low temperature may be prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、極低温環境で動作する集積回路と室温環境で
動作する装置間で信号伝送するための入出カケ−プルに
おいて、極低温下での熱収縮に伴う接点障害を引き起こ
すことのない極低温集積回路用入出カケ−プルに関する
ものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an input/output cable for transmitting signals between an integrated circuit operating in a cryogenic environment and a device operating in a room temperature environment. The present invention relates to an input/output cable for cryogenic integrated circuits that does not cause contact failure due to thermal contraction of the circuit.

〔従来の技術〕[Conventional technology]

従来、この種の入出カケ−プルは、−例として第3図に
示すような断面構造をしており (米国特許、4,44
1,088)、人出カケ−プルlにおいて、信号線2に
は銅が、絶縁体12には低温でも弾性を有するポリエス
テルやポリイミドが用いられる(PA、 lJosko
witz et al、、 Cryogenics、2
3.107 (1983)、特開昭6O−125002
)。13は接地導体の銅である。
Conventionally, this type of input/output cable has a cross-sectional structure as shown in Fig. 3 (U.S. Patent No. 4,44
1,088), in the turnout cable l, copper is used for the signal line 2, and polyester or polyimide, which has elasticity even at low temperatures, is used for the insulator 12 (PA, lJosko
witz et al., Cryogenics, 2
3.107 (1983), JP-A-6O-125002
). 13 is a copper ground conductor.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記のような複合体を室温から極低温へ冷却すれば、温
度差は約300にと極めて大きいため熱収縮は無視でき
ない。また、構成材料である金属と高分子材料の線膨張
率が異なるため界面に歪を生ずる。例えば、ケーブル長
を1.4n+とすれば(P、^、 M。
When a composite as described above is cooled from room temperature to an extremely low temperature, the temperature difference is as large as about 300°C, so thermal contraction cannot be ignored. Furthermore, since the linear expansion coefficients of the metal and polymeric materials are different, strain occurs at the interface. For example, if the cable length is 1.4n+ (P, ^, M.

skowitz et al、、 Cryogenic
s、 23.107 (1983)、)、銅は線膨張率
が1.4xlO−’に一’であり、約6mIm収縮する
。一方、ポリエステルは線膨張率が7X10−’に一’
と大きく、29In+++も収縮する。従って、ポリエ
ステルを絶縁体とした第3図に示すような断面構造の入
出カケ−プルでは、極低温下ではバイメタルのようにケ
ーブルが曲がるとともに大きく収縮するため、極低温下
に置かれた集積回路との接点を保持することが困難とな
る。ポリイミドの線膨張率は2.0X10−’に一’ 
と高分子材料の中で小さく、銅の線膨張率に近い材料で
はあるが、このような材料を絶縁体とした人出カケ−プ
ルでさえも、極低温下では熱収縮によりはんだ付は接点
に障害を生ずる。このため、接点をバネで抑えるなどの
複雑な接点構造となっている(P、A、 Mo5kov
itz et al、。
Skowitz et al., Cryogenic
s, 23.107 (1983), ), copper has a coefficient of linear expansion of 1.4 x lO-' and shrinks by about 6 mIm. On the other hand, polyester has a coefficient of linear expansion of 7X10-'
29In+++ also contracts. Therefore, with an input/output cable that uses polyester as an insulator and has a cross-sectional structure as shown in Figure 3, the cable will bend and contract significantly like a bimetal under extremely low temperatures, so it will be difficult for integrated circuits placed under extremely low temperatures. It becomes difficult to maintain contact with the The coefficient of linear expansion of polyimide is 2.0x10-'
Although it is small among polymer materials and has a coefficient of linear expansion close to that of copper, even the popular cables made of such materials as insulators cannot be soldered due to heat shrinkage at extremely low temperatures. cause problems. For this reason, the contact structure is complicated, such as holding the contact with a spring (P, A, Mo5kov
Itz et al.

Cryogenics、 23.107 (1983)
、)。
Cryogenics, 23.107 (1983)
,).

本発明は上記の事情に鑑みてなされたもので、極低温下
での熱収縮に伴う接点障害を引き起こすことのない極低
温集積回路用入出カケ−プルを提供することを目的とす
る。
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an input/output cable for a cryogenic integrated circuit that does not cause contact failure due to thermal contraction at cryogenic temperatures.

〔課題を解決するための手段・作用〕[Means and actions to solve the problem]

本発明は、極低温集積回路用入出カケ−プルの絶縁層に
垂直配向高分子絶縁層を用いたことを最も主要な特徴と
し、異種材料間の線膨張率差に基づく熱歪を垂直配向高
分子絶縁層で吸収できるようにしている点が従来の技術
と異なる。
The main feature of the present invention is that a vertically oriented polymer insulating layer is used as the insulating layer of the input/output cable for cryogenic integrated circuits, and thermal strain due to the difference in linear expansion coefficient between different materials can be reduced by vertically oriented This technology differs from conventional technology in that it allows absorption through a molecular insulating layer.

ポリエチレンやポリオキシメチレンなどの結晶性高分子
を一軸方向に延伸することなどにより、−軸方向に分子
鎖が配向した高分子材料を容易に得ることができる。こ
のような−軸配向高分子の延伸方向の線膨張率は延伸倍
率とともに急速に小さくなり、零から負の値へと変化す
ることはよく知られている (A、 C1ferri 
and 1.M、 Ward、 Eds、。
By uniaxially stretching a crystalline polymer such as polyethylene or polyoxymethylene, a polymer material in which molecular chains are oriented in the -axis direction can be easily obtained. It is well known that the coefficient of linear expansion in the stretching direction of such -axis-oriented polymers rapidly decreases with the stretching ratio and changes from zero to a negative value (A, C1ferri
and 1. M. Ward, Eds.

Ultra−High Modulus Polyme
rs 、 Appl、 Sci、、 I、ondon 
(1979); 1.M、 Ward、 Ed、、 ”
Developmentsin 0riented P
o1yIlers−1″、 Appl、 Sci、、 
London(19g2)、)。例えば、高密度ポリエ
チレンの線膨張率(室温)は未延伸状態の1.2xlO
−’に一’から延伸倍率2倍で零、延伸倍率18倍では
−1,2xlO−’に一’となる。ポリオキシメチレン
では、線膨張率(室温)は未延伸状態の8.0XIO−
’に一’から延伸倍率8倍で零、延伸倍率20倍では−
4,0XIO−”l’″1となる。
Ultra-High Modulus Polyme
rs, Appl, Sci, I, ondon
(1979); 1. M. Ward, Ed.”
Developments in Oriented P
o1yIlers-1″, Appl, Sci,,
London (19g2). For example, the coefficient of linear expansion (room temperature) of high-density polyethylene is 1.2xlO in the unstretched state.
-' to 1' to zero at a stretching ratio of 2 times, and at a stretching ratio of 18 times to -1,2xlO-' to 1'. For polyoxymethylene, the coefficient of linear expansion (room temperature) is 8.0XIO-
From '1 to 1', it is zero at a stretching ratio of 8x, and - at a stretching ratio of 20x.
4,0XIO-"l'"1.

しかし、延伸方向と直角の方向の線膨張率は逆に延伸倍
率と共に若干大きくなる。
However, the coefficient of linear expansion in the direction perpendicular to the stretching direction increases somewhat with increasing stretching ratio.

従って、第4図に示すように、相対する導体14.15
の間に、導体面に対し垂直に分子軸が配向した高分子結
晶塊16の集合体から成り、該結晶塊16はそれぞれ相
対する導体14.15の間にまたがっており、導体面と
平行な面内の該結晶塊16の境界には空隙17を有し、
しかも導体間の所々に設置した製造過程で必要な導体間
隔を所定の値に保つためのスペーサー(図示せず)をそ
のまま有するか該スペーサーを有しない絶縁層を設すた
垂直配向高分子絶縁導体では、絶縁層となる高分子結晶
塊16の高分子の分子軸が導体面に対し垂直に配向して
いるとともに該結晶塊16がそれぞれ相対する導体14
.15の間にまたがっているため、導体面に対し垂直方
向の絶縁層の線膨張率は小さくなる。また、導体面と平
行な面内の該結晶塊16の境界には空隙17を有するた
め導体面と平行方向の絶縁層の線膨張率は、個々の結晶
塊16の線膨張率は大きいにもかかわらず、空隙17に
より歪が吸収されるため、導体14.15の線膨張率と
ほぼ等しくなるか、導体14.15がシリコン等の基板
に接着している場合には基板の線膨張率と等しくなる。
Therefore, as shown in FIG.
In between, it consists of an aggregate of polymer crystal blocks 16 whose molecular axes are oriented perpendicular to the conductor plane, and each crystal block 16 straddles between the opposing conductors 14 and 15, and parallel to the conductor plane. A void 17 is provided at the boundary of the crystal mass 16 in the plane,
In addition, the vertically oriented polymer insulated conductor has spacers (not shown) placed between the conductors in order to keep the distance between the conductors at a predetermined value during the manufacturing process, or an insulating layer without such spacers. In this case, the molecular axes of the polymers in the polymer crystal blocks 16 serving as the insulating layer are oriented perpendicularly to the conductor plane, and the crystal blocks 16 are connected to the conductors 14 facing each other.
.. 15, the coefficient of linear expansion of the insulating layer in the direction perpendicular to the conductor surface becomes small. In addition, since there are voids 17 at the boundaries of the crystal clusters 16 in a plane parallel to the conductor plane, the linear expansion coefficient of the insulating layer in the direction parallel to the conductor plane is large, even though the linear expansion coefficient of each crystal cluster 16 is large. Regardless, since the strain is absorbed by the void 17, the coefficient of linear expansion will be approximately equal to that of the conductor 14.15, or if the conductor 14.15 is bonded to a substrate such as silicon, the coefficient of linear expansion will be the same as that of the substrate. be equal.

絶縁層となる結晶性高分子を相対する導体面に対し垂直
に配向させる方法としては、本出願人のさきの出願にな
る特願昭62−305820号に示したような電場を印
加する方法などがある。このような電場による配向方法
では、絶縁層となる結晶性高分子がその分子軸方向に双
極子モーメントを有するか、もしくは双極子モーメント
を有しない場合はその重合前のモノマーが双極子モーメ
ントを有することが不可欠となる。
As a method for orienting the crystalline polymer that forms the insulating layer perpendicularly to the opposing conductor plane, there is a method of applying an electric field as shown in Japanese Patent Application No. 62-305820 filed earlier by the present applicant. There is. In such an orientation method using an electric field, the crystalline polymer that becomes the insulating layer has a dipole moment in the direction of its molecular axis, or if it does not have a dipole moment, the monomer before polymerization has a dipole moment. This is essential.

汎用のエンジニアリングプラスチックとして知られるポ
リオキシメチレン(POM)は、結晶内で分子鎖が97
5螺旋構造をとり、双極子が互いに打ち消しあうため電
場により配向することはない。しかし、POMのモノマ
ーの一つであるホルムアルデヒドは2.27D(デバイ
)の双極子モーメントを有するため電場により配向する
。本出願人は液状のホルムアルデヒドを電場下で重合す
れば導体面に対し垂直方向に分子軸が配向したPOMの
結晶塊の集合体が得られることを見いだした。これは、
導体面に対し垂直方向に配向したホルムアルデヒドモノ
マーの影響を受けて無極性のPOMもモノマーの方向に
配向することによるものである。走差電子顕微鏡観察に
より、第4図に示したように、POMの結晶塊はそれぞ
れ相対する導体間にまたがっており、導体面と平行な面
内の結晶塊の境界には空隙があることが分かった。この
空隙は、結晶塊の境界に未反応モノマーや低分子量のP
OMが集まり、これらが重合後に蒸発してできたもので
ある。
Polyoxymethylene (POM), known as a general-purpose engineering plastic, has a molecular chain of 97 in the crystal.
It has a five-helical structure, and because the dipoles cancel each other out, it is not oriented by an electric field. However, formaldehyde, which is one of the monomers of POM, has a dipole moment of 2.27D (Debye) and is therefore oriented by an electric field. The present applicant has discovered that by polymerizing liquid formaldehyde under an electric field, an aggregate of POM crystal masses with molecular axes oriented perpendicular to the conductor plane can be obtained. this is,
This is because non-polar POM is also oriented in the direction of the monomer under the influence of the formaldehyde monomer oriented in the direction perpendicular to the conductor surface. As shown in Figure 4, scanning electron microscopy revealed that each POM crystal cluster straddles opposing conductors, and that there are voids at the boundaries of the crystal clusters in a plane parallel to the conductor plane. Do you get it. These voids are caused by unreacted monomers and low molecular weight P at the boundaries of crystal clusters.
The OM is collected and evaporated after polymerization.

このような相対する導体間にあらかじめモノマーを充填
した後に重合し高分子絶縁層を作製する方法では、製造
過程で導体間を所定の値に保つためのスペーサーが必要
となるが、このスペーサーにはガラス繊維や粒状の無機
材料あるいはポリイミドなどのプラスチックフィルムや
延伸配向繊維やフィルムなど種々の材料が使用できる。
This method of filling monomer in advance between opposing conductors and then polymerizing it to create a polymer insulating layer requires a spacer to maintain a predetermined distance between the conductors during the manufacturing process. Various materials can be used, such as glass fibers, granular inorganic materials, plastic films such as polyimide, and stretched oriented fibers and films.

また、この方法では導体表面を粗にすればモノマーが微
細な空孔にも侵入するため、接着性に乏しいPOMでも
いわゆるアンカー効果により強固に接着することができ
る。また、導体面に対し垂直方向、すなわち分子軸方向
の強度は極めて強いため、相対する導体が容易に剥離す
ることもないし、圧壊することもなく、形状安定性に優
れている。、また、延伸配向試料の場合と同様に一方向
に配向しているため極低温下でもぜいせい破壊をするこ
ともない。
In addition, in this method, if the conductor surface is made rough, the monomer can penetrate into fine pores, so even POM, which has poor adhesiveness, can be firmly bonded due to the so-called anchor effect. Furthermore, since the strength in the direction perpendicular to the conductor surface, that is, in the direction of the molecular axis, is extremely strong, the opposing conductors do not easily peel off or collapse, and have excellent shape stability. In addition, as in the case of the stretched and oriented sample, since it is oriented in one direction, it will not break even at extremely low temperatures.

なお、重合法としては特願昭62−305820号に示
した放射線型合法以外にも、重合触媒をあらかじめモノ
マーに添加した後に電場下で重合する方法や、導体表面
にあらかじめ重合触媒を塗布した後に電場下でモノマー
を充填し重合する方法など種々な方法があるがいずれで
もよい。
In addition to the radiation method shown in Japanese Patent Application No. 62-305820, other polymerization methods include a method in which a polymerization catalyst is added to monomer in advance and then polymerized under an electric field, and a method in which a polymerization catalyst is applied to the surface of a conductor in advance and then polymerized. There are various methods, such as a method in which monomers are filled and polymerized under an electric field, and any of them may be used.

〔実施例〕〔Example〕

第1図(a)〜(c)に本発明になる極低温集積回路用
入出カケ−プルlの一部と断面構造の拡大図を示した。
FIGS. 1(a) to 1(c) show enlarged views of a part and cross-sectional structure of an input/output cable l for a cryogenic integrated circuit according to the present invention.

第1図(a)〜(C)において、2は信号線(銅)、3
は第1の接地導体(銅)、4は第2の接地導体(銅)、
5はポリオキシメチレンから成る第1の垂直配向高分子
絶縁層、6はポリオキシメチレンから成る第2の垂直配
向高分子絶縁層、7はエポキシ接着剤である。
In Figures 1(a) to (C), 2 is a signal line (copper), 3
is the first ground conductor (copper), 4 is the second ground conductor (copper),
5 is a first vertically oriented polymer insulating layer made of polyoxymethylene, 6 is a second vertically oriented polymer insulating layer made of polyoxymethylene, and 7 is an epoxy adhesive.

次に、前記極低温集積回路用人出カケ−プルの製造方法
について説明する。相対する市販のプリント板用の厚さ
35μmの電解銅箔の間にスペーサーとして太さ125
μIのガラス繊維を適当な間隔で設置した(図示せず)
。この相対する電解銅箔の間隙に、市販の粉末状パラホ
ルムアルデヒドの熱分解により生成した気相のホルムア
ルデヒドモノマーを、食塩と氷で約−20°Cに冷却し
たトラップ中を通すことにより脱水精製した後、−78
℃の液体状態で充填した。相対する銅箔間に5kVの静
電圧(電解強度0.4MV/am)を印加したまま、C
080によるγ線重合を一78℃の液相で行った。照射
線量率は3X105R/h、照射時間は3時間とした。
Next, a method of manufacturing the above-mentioned lead-out cable for cryogenic integrated circuits will be explained. A spacer with a thickness of 125 μm between opposing commercially available electrolytic copper foils for printed circuit boards with a thickness of 35 μm.
μI glass fibers were placed at appropriate intervals (not shown)
. A vapor phase formaldehyde monomer produced by thermal decomposition of commercially available powdered paraformaldehyde was dehydrated and purified by passing it through a trap cooled to approximately -20°C with salt and ice through the gap between the opposing electrolytic copper foils. After, -78
Filled in liquid state at ℃. While applying a static voltage of 5 kV (electrolytic strength 0.4 MV/am) between opposing copper foils,
080 was carried out in the liquid phase at -78°C. The irradiation dose rate was 3×105R/h, and the irradiation time was 3 hours.

この結果、厚さ約200μmの垂直配向高分子絶縁導体
を得た。
As a result, a vertically aligned polymer insulated conductor with a thickness of about 200 μm was obtained.

この絶縁導体の片面の電解銅箔に複数個の信号線2をエ
ツチングによりバターニングすることでマイクロストリ
ップ線路を構成した。さらに信号線2の上に、上記のよ
うにして作製した垂直配向高分子絶縁導体の片面の電解
銅箔をエツチングにより取り去った厚さ約160μmの
絶縁導体を垂直配向高分子絶縁層が信号線2と接するよ
うにエポキシ接着剤で張り合わせた。この結果、第1図
に示した断面構造の厚さが約360μmの極低温集積回
路用入出カケ−プルを得た。
A microstrip line was constructed by patterning a plurality of signal lines 2 on the electrolytic copper foil on one side of this insulated conductor by etching. Further, on the signal line 2, a vertically oriented polymer insulating layer is placed on the insulated conductor with a thickness of approximately 160 μm, which is obtained by removing the electrolytic copper foil on one side of the vertically oriented polymer insulated conductor produced as described above by etching. I attached them with epoxy adhesive so that they were in contact with each other. As a result, an input/output cable for a cryogenic integrated circuit having a cross-sectional structure shown in FIG. 1 and a thickness of about 360 μm was obtained.

本発明になる極低温集積回路用入出カケ−プルと極低温
下に置かれる集積回路との接続部の一例を第2図(a)
 、 (b)に示した。図において、第1図と同一符号
は同一部品を示す。8はICチップを搭載したシリコン
基板、9ははんだバンブ、lOはシリコン基板上の信号
線(銅)、llはシリコン基板上の接地導体(銅)であ
る。このような接続部を極低温の環境に置けば、従来の
ように絶縁層5および6がポリエステルやポリイミドの
ような線膨張率の大きな高分子材料では銅やシリコン基
板との線膨張率差により熱歪を生じはんだバンプ9がは
ずれて接点障害を引き起こすが、垂直配向高分子絶縁1
15お上び6では、接地導体面に対し垂直に分子軸が配
向した高分子結晶塊が相対する信号線が並列する面と接
地導体との間にまたがっており、しかも接地導体面と平
行な面内の該結晶塊の境界には空隙があるため、熱歪を
吸収することができる。従って、液体窒素温度と室温間
のヒートサイクルを繰り返してもはんだバンプがはずれ
て接点障害を引き起こすことはなかった。
FIG. 2(a) shows an example of the connection between the input/output cable for a cryogenic integrated circuit according to the present invention and an integrated circuit placed under a cryogenic temperature.
, shown in (b). In the figure, the same symbols as in FIG. 1 indicate the same parts. 8 is a silicon substrate on which an IC chip is mounted, 9 is a solder bump, IO is a signal line (copper) on the silicon substrate, and 11 is a ground conductor (copper) on the silicon substrate. If such a connection part is placed in an extremely low temperature environment, if the insulating layers 5 and 6 are made of a polymer material with a high coefficient of linear expansion, such as polyester or polyimide, as in the past, due to the difference in coefficient of linear expansion with the copper or silicon substrate, Thermal distortion occurs and the solder bumps 9 come off, causing contact failure, but the vertically aligned polymer insulation 1
In 15 and 6, a polymer crystal mass whose molecular axis is oriented perpendicular to the ground conductor plane straddles between the ground conductor and the plane where the opposing signal lines are parallel, and is parallel to the ground conductor plane. Since there are voids at the in-plane boundaries of the crystal clusters, thermal strain can be absorbed. Therefore, even after repeated heat cycles between liquid nitrogen temperature and room temperature, the solder bumps did not come off and cause contact failure.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、異種材料間の線
膨張率差に基づく熱歪を垂直配向高分子絶縁層が吸収す
るため、このようなケーブルに室温から極低温へ繰り返
し温度変化を与えても極低温に置かれた集積回路との接
点部で障害を引き起こすことはない。
As explained above, according to the present invention, the vertically aligned polymer insulating layer absorbs the thermal strain caused by the difference in coefficient of linear expansion between different materials. It will not cause any damage at the contact points with integrated circuits placed at extremely low temperatures.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)は本発明になる極低温集積回路用入出カケ
−プルの一部を示す斜視図、第1図(b)は第1図(a
)のA−A’線に沿う拡大断面図、第1図(c)は第1
図(a)のB−B’線に沿う拡大断面図、第2図(a)
は本発明になる極低温集積回路用入出カケ−プルと極低
温下に置かれる集積回路との接続部の一例を示す側断面
図、第2図(b)は第2図(a)のc−c’線に沿う正
断面図、第3図は従来の入出カケ−プルの断面構造を示
す図、第4図は垂直配向高分子絶縁導体の断面斜視図で
ある。 l・・・・・・入出カケ−プル、2・・・・・・信号線
、3・・・・・・第1の接地導体、4・・・・・・第2
の接地導体、5・・・・・第1の垂直配向高分子絶縁層
、6・・・・・・第2の垂直配向高分子絶縁層、7・・
・・・・接着剤、8・・・・・・基板(例えばシリコン
)、9・・・・・・はんだバンプ、10・・・・・・基
板上の信号線、11・・・・・・基板上の接地導体、1
2・・・・・・絶縁体(例えばポリエステルやポリイミ
ド)、13・・・・・・接地導体、14.15・・・・
・・導体、16・・・・・・垂直配向高分子結晶塊、1
7・・・・・・空隙。
FIG. 1(a) is a perspective view showing a part of the input/output cable for a cryogenic integrated circuit according to the present invention, and FIG.
), Fig. 1(c) is an enlarged sectional view taken along line A-A' of
An enlarged sectional view along the line BB' in Figure (a), Figure 2 (a)
2(b) is a side sectional view showing an example of the connection between the input/output cable for a cryogenic integrated circuit according to the present invention and an integrated circuit placed under a cryogenic temperature, and FIG. FIG. 3 is a cross-sectional view of a conventional input/output cable, and FIG. 4 is a cross-sectional perspective view of a vertically oriented polymer insulated conductor. l... Input/output cable, 2... Signal line, 3... First ground conductor, 4... Second
ground conductor, 5... first vertically aligned polymer insulating layer, 6... second vertically aligned polymer insulating layer, 7...
... Adhesive, 8 ... Substrate (e.g. silicon), 9 ... Solder bump, 10 ... Signal line on the board, 11 ... Ground conductor on board, 1
2... Insulator (e.g. polyester or polyimide), 13... Ground conductor, 14.15...
...Conductor, 16... Vertically aligned polymer crystal mass, 1
7...Gap.

Claims (1)

【特許請求の範囲】[Claims] 並列する複数の信号線とこれらと平行に相対する第1の
接地導体との間に、接地導体面に対し垂直に分子軸が配
向した高分子結晶塊の集合体から成り、該結晶塊はそれ
ぞれ相対する信号線が並列する面と接地導体との間にま
たがっており、接地導体面と平行な面内の該結晶塊の境
界には空隙を有し、しかも相対する信号線が並列する面
と接地導体との間の所々に設置した製造過程で必要な相
対する信号線が並列する面と接地導体との間隔を所定の
値に保つためのスペーサーをそのまま有するか該スペー
サーを有しない第1の垂直配向高分子絶縁層を設けたマ
イクロストリップ線路の該信号線上に、さらに上記のよ
うな第2の垂直配向高分子絶縁層を介して第2の接地導
体を設けたことを特徴とする極低温集積回路用入出力ケ
ーブル。
Between a plurality of parallel signal lines and a first ground conductor facing parallel to these lines, there is an aggregate of polymer crystal blocks whose molecular axes are oriented perpendicular to the ground conductor plane, and each of the crystal blocks is It straddles between the surface where the opposing signal lines are parallel and the ground conductor, and there is a gap at the boundary of the crystal mass in the plane parallel to the ground conductor surface, and the surface where the opposing signal lines are parallel The first type has spacers installed at various places between the ground conductor and the ground conductor to maintain a predetermined distance between the ground conductor and the surface where opposing signal lines are parallel, which are necessary during the manufacturing process. A cryogenic method characterized in that a second ground conductor is further provided on the signal line of the microstrip line provided with a vertically oriented polymer insulating layer via a second vertically oriented polymer insulating layer as described above. Input/output cable for integrated circuits.
JP63178451A 1988-07-18 1988-07-18 Input and output cable for extremely low temperature integrated circuit Pending JPH0227615A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63178451A JPH0227615A (en) 1988-07-18 1988-07-18 Input and output cable for extremely low temperature integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63178451A JPH0227615A (en) 1988-07-18 1988-07-18 Input and output cable for extremely low temperature integrated circuit

Publications (1)

Publication Number Publication Date
JPH0227615A true JPH0227615A (en) 1990-01-30

Family

ID=16048749

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63178451A Pending JPH0227615A (en) 1988-07-18 1988-07-18 Input and output cable for extremely low temperature integrated circuit

Country Status (1)

Country Link
JP (1) JPH0227615A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109792840A (en) * 2016-09-15 2019-05-21 谷歌有限责任公司 For reducing the multilayer board of quantum signal crosstalk

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109792840A (en) * 2016-09-15 2019-05-21 谷歌有限责任公司 For reducing the multilayer board of quantum signal crosstalk
US11197365B2 (en) 2016-09-15 2021-12-07 Google Llc Multilayer printed circuit board for reducing quantum signal crosstalk
CN109792840B (en) * 2016-09-15 2022-03-04 谷歌有限责任公司 Multilayer printed circuit board for reducing quantum signal crosstalk

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