JPH02270413A - Signal reproducing circuit - Google Patents

Signal reproducing circuit

Info

Publication number
JPH02270413A
JPH02270413A JP9253189A JP9253189A JPH02270413A JP H02270413 A JPH02270413 A JP H02270413A JP 9253189 A JP9253189 A JP 9253189A JP 9253189 A JP9253189 A JP 9253189A JP H02270413 A JPH02270413 A JP H02270413A
Authority
JP
Japan
Prior art keywords
signal
circuit
output
detection circuit
inputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9253189A
Other languages
Japanese (ja)
Inventor
Keiji Nakatsu
啓二 仲津
Teruo Furukawa
輝雄 古川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9253189A priority Critical patent/JPH02270413A/en
Publication of JPH02270413A publication Critical patent/JPH02270413A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To detect a non signal without being affected by noise by providing a non-signal detection circuit detecting the presence or absence of a pulse signal being an output of a data detection circuit and using a signal of digital system via a differentiation circuit so as to detect the non-signal. CONSTITUTION:High frequency noise is eliminated from a signal S1 reproduced from an optical disk by a low pass filter 1 and the result is inputted to a 1st stage amplifier 2. The signal is amplified therein and inputted to an attenuator circuit 3, where the signal is attenuated and the result is inputted to an automatic gain control(AGC) amplifier circuit 4. A signal S2 amplified by the AGC amplifier circuit 4 is inputted to a differentiation circuit 5. The differentiated output S3 is inputted to a recording data detection circuit 7. Its output S4 is given to a non-signal detection circuit 22. The high frequency noise is eliminated in the low pass filter 1, and the low frequency noise is eliminated by the differentiation circuit 5 and non-signal is detected, then mis-detection hardly takes place.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は光磁気ディスクのような記録媒体からこれに記
録しである信号を再生する信号再生回路に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a signal reproducing circuit for reproducing signals recorded on a recording medium such as a magneto-optical disk.

〔従来の技術] 第5図は本願出願人の出願に係る特願昭62−2202
97号に記されたこの種の信号再生回路の構成を示し、
第6図は各部の信号波形を示している。図示しない光ヘ
ッドによって記録媒体から検出された信号SIはローパ
スフィルタlによって高帯域の雑音が除去され、初段増
幅器2によって増幅され、更にアッテネータ回路3によ
って減衰され、更にAGC(自動利得制御)増幅回路4
によって増幅される。
[Prior art] Figure 5 is a patent application filed in 1982-2202 filed by the applicant of the present application.
The structure of this type of signal reproducing circuit described in No. 97 is shown,
FIG. 6 shows signal waveforms at each part. A signal SI detected from a recording medium by an optical head (not shown) has high-band noise removed by a low-pass filter l, is amplified by a first-stage amplifier 2, is further attenuated by an attenuator circuit 3, and is further attenuated by an AGC (automatic gain control) amplifier circuit. 4
is amplified by

AGC増幅回路4出力S2は微分回路5で微分され、微
分出力S、はヘッダ検出回路6及び記録データ検出回路
7へ入力される。雨検出回路6.7は入力信号から情報
点を検出するものであり、ヘッダ検出回路6はトラック
、セクタを特定するアドレス等を記録しているヘッダ部
のデータを、記録データ検出回路7は記録対象のデータ
等を記録している記録データ部のデータを各々検出する
。記録データ検出回路7出力S、はその出力中に含まれ
る雑音による疑似パルスを除去すると共にパルス幅を広
げて出力S、とするパルス発生回路8へ与えられる。
The output S2 of the AGC amplifier circuit 4 is differentiated by a differentiating circuit 5, and the differentiated output S is input to a header detection circuit 6 and a recorded data detection circuit 7. The rain detection circuits 6 and 7 detect information points from the input signal, the header detection circuit 6 detects data in the header section recording addresses for specifying tracks and sectors, and the recorded data detection circuit 7 detects information points from the input signal. The data in the recorded data section in which target data and the like are recorded is detected. The output S of the recording data detection circuit 7 is applied to a pulse generation circuit 8 which removes spurious pulses due to noise contained in the output and widens the pulse width to produce an output S.

自動利得制御増幅回路4は信号増幅に係るアンプ部20
と、その利得を制御するコントロール回路23と、光デ
ィスクに記録されているVFO信号を検知するためのV
FO信号検知回路21と、記録信号が無いことを検出す
る無信号検出回路22とからなっている。アンプ部20
出力はVFO信号検知回路2I及び無信号検出回路22
へ入力され、前者はVFO信号の有無、後者は何らかの
信号の有無に応じた2値信号”l+82を出力し、これ
をコントロール回路23へ人力する。コントロール回路
23にはこの外にも2値のAGCリセット信号信号炉3
力され、これら3つの2値信号の組合せに応じて定まる
2ビツトの信号C,,C,をアンプ部2oへ与える。こ
の信号C1,Czはアンプ部2oのモードをサンプル、
ホールド、リセットの3モードに切換えるものである。
The automatic gain control amplifier circuit 4 includes an amplifier section 20 related to signal amplification.
, a control circuit 23 for controlling the gain, and a VFO signal for detecting the VFO signal recorded on the optical disc.
It consists of an FO signal detection circuit 21 and a no-signal detection circuit 22 that detects the absence of a recording signal. Amplifier section 20
Output is VFO signal detection circuit 2I and no signal detection circuit 22
The former outputs a binary signal "l+82" depending on the presence or absence of the VFO signal, and the latter outputs a binary signal "l+82" depending on the presence or absence of some signal, which is manually input to the control circuit 23. AGC reset signal furnace 3
2-bit signals C, , C, determined according to the combination of these three binary signals, are supplied to the amplifier section 2o. These signals C1 and Cz sample the mode of the amplifier section 2o,
It switches between three modes: hold and reset.

この信号再生回路においてAGC増幅回路4を用いてい
るのはヘッダ部から得られる再生信号S、のレベルと、
データ部から得られる再生信号S+のレベルとが相違す
るためであり、それより後段の信号レベルを一定にする
ためである。
In this signal reproducing circuit, the AGC amplifier circuit 4 is used to control the level of the reproduced signal S obtained from the header section.
This is because the level of the reproduced signal S+ obtained from the data section is different, and the signal level of the subsequent stage is made constant.

またホールドモードとするのは例えばデータ部中の未記
録の部分の再生時に利得が大幅に上昇すると、次に再生
信号が入力された場合の増幅出力が過大となるため、こ
れを避けるべく直前の利得をホールドさせるのである。
In addition, the hold mode is used because, for example, if the gain increases significantly during playback of an unrecorded part of the data section, the amplification output will become excessive when the next playback signal is input. This causes the gain to be held.

またヘッダ部とデータ部との間には無記録のギャップ部
が設けられる。
Further, an unrecorded gap section is provided between the header section and the data section.

これが検出された場合はリセットモードとして所定利得
に初期化する。
If this is detected, the gain is initialized to a predetermined value as a reset mode.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

而して従来のこのような構成においては雑音によりAG
C増幅回路4のモードが変動することがあった。即ち無
信号検出回路22ではアンプ部20出力S2を閾値T、
(S、に破線で示す)と比較し、これが以上となった時
間からtdO間は“Hルベルとなる信号a!を出力し、
これが“L”レベルになると無信号であるとしてコント
ロール回路23をしてホールドモードとすべき信号C+
、Ctを出力させるものである。この遅延時間tdを設
けて耐雑音対策を図ってはいるが、雑音によりa2がロ
ーレベルからハイレベルに転じることを防止できるもの
ではない。
However, in such a conventional configuration, the AG is affected by noise.
The mode of the C amplifier circuit 4 sometimes fluctuated. That is, in the no-signal detection circuit 22, the output S2 of the amplifier section 20 is set to the threshold T,
(shown by the broken line at S), and from the time when this becomes above to tdO, the signal a! which becomes "H level" is output,
When this goes to "L" level, it is assumed that there is no signal, and the control circuit 23 should set the hold mode to the signal C+.
, Ct are output. Although this delay time td is provided to provide noise resistance, it is not possible to prevent a2 from changing from a low level to a high level due to noise.

本発明は斯かる問題点を解決するためになされたもので
あり、無信号検出を微分回路を経たディジタル系の信号
により行うこととして、雑音に影響されることなく無信
号検出が可能な信号再生回路の提供を目的とする。
The present invention has been made in order to solve such problems, and it is a signal regeneration method that enables detection of no signal without being affected by noise by detecting no signal using a digital signal that has passed through a differentiating circuit. The purpose is to provide circuits.

〔課題を解決するための手段〕[Means to solve the problem]

本発明ではローパスフィルタ、自動利得制御回路、微分
回路、データ検出回路を経た信号により無信号を検出す
る。
In the present invention, no signal is detected by a signal that has passed through a low-pass filter, an automatic gain control circuit, a differentiation circuit, and a data detection circuit.

〔作用〕[Effect]

ローパスフィルタを経た信号は高域の雑音が取除かれて
おり、微分回路を経た信号は低域の雑音が取除かれてい
る。従って本来検出すべき信号以外の成分、つまり雑音
が除かれたものについて無信号が検出されるので誤検出
が生じ難い。
High-frequency noise has been removed from the signal that has passed through the low-pass filter, and low-frequency noise has been removed from the signal that has passed through the differential circuit. Therefore, no signal is detected for components other than the signal to be originally detected, that is, noise is removed, so that false detection is less likely to occur.

〔実施例〕〔Example〕

以下本発明をその実施例を示す図面に基づいて詳述する
。第1図は本発明回路を示すブロック図であり、光ディ
スクから再生された信号S、はローパスフィルタ1によ
って高域雑音が除去されて初段増幅器2に入力され、こ
こで増幅されてアッテネータ回路3へ入力され、ここで
減衰され、AGC増幅回路4へ入力される。 AGC増
幅回路4で増幅された信号S2は微分回路5へ入力され
、ここで微分された出力S、はヘッダ検出回路6及び記
録データ検出回路7へ入力される。データ検出回路7出
力S4はパルス発生回路8へ出力され、ここから再生パ
ルス信号S、が出力される。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below based on drawings showing embodiments thereof. FIG. 1 is a block diagram showing the circuit of the present invention. A signal S reproduced from an optical disk has high-frequency noise removed by a low-pass filter 1 and is input to a first-stage amplifier 2, where it is amplified and sent to an attenuator circuit 3. The signal is input, attenuated here, and input to the AGC amplifier circuit 4. The signal S2 amplified by the AGC amplifier circuit 4 is input to the differentiating circuit 5, and the output S differentiated here is input to the header detection circuit 6 and the recorded data detection circuit 7. The data detection circuit 7 output S4 is output to the pulse generation circuit 8, from which a reproduction pulse signal S is output.

而して実施例においては記録データ検出回路7の出力S
4を無信号検出回路22に与えている。へGC増幅回路
4は、アッテネータ回路3出力を入力して増幅し、これ
を微分回路5へ入力するアンプ部20と、無信号検出回
路22と、VFO信号検知回路21と、アンプ部20の
利得を制御するコントロール回路23とからなり、コン
トロール回路23にはVFO信号検知回路21出力a2
、無信号検出回路22出力a2及びAGCリセット信号
信号炉3力されており、これらに基づいてコントロール
回路23からアンプ部20ヘモードを制御する2ビツト
の信号C,,C。
Therefore, in the embodiment, the output S of the recorded data detection circuit 7
4 is given to the no-signal detection circuit 22. The GC amplifier circuit 4 includes an amplifier section 20 that inputs and amplifies the output of the attenuator circuit 3 and inputs it to the differentiating circuit 5, a no-signal detection circuit 22, a VFO signal detection circuit 21, and the gain of the amplifier section 20. The control circuit 23 includes a VFO signal detection circuit 21 output a2.
, the output a2 of the no-signal detection circuit 22, and the AGC reset signal signal generator 3, and based on these, 2-bit signals C, , C are sent from the control circuit 23 to the amplifier section 20 to control the mode.

を与えている。is giving.

第1表はal t  at l  a、+  CI +
  c2と制御モードとの関係を示している。
Table 1 shows al t at l a, + CI +
It shows the relationship between c2 and control mode.

第1表 *印はH又はLレベルいずれでもよい。Table 1 *mark may indicate either H or L level.

この表に示された如く、無信号検出回路22が無信号を
検出すると出力a!は“L”レベルになりCI、Ctが
共に“H”レベルの出力がコントロール回路23から出
力されアンプ部20の制御モードをホールドモードとす
るのである。
As shown in this table, when the no-signal detection circuit 22 detects no signal, it outputs a! becomes "L" level, and both CI and Ct are outputted from the control circuit 23 at "H" level, setting the control mode of the amplifier section 20 to the hold mode.

第2図は第1図の回路の各部の信号波形を示している。FIG. 2 shows signal waveforms at various parts of the circuit shown in FIG.

この回路の入力信号S、はAGC増幅回路4で増幅され
出力S2となり、微分回路5で微分され信号S、を出力
する。記録データ検出回路7はS3に重ねて破線で示す
閾値T、で入力信号を2値化してパルス信号S4を出力
する。パルス発生回路8はそのパルス幅を拡大してS、
を出力する。また記録データ検出部7出力S4は無信号
検出回路5へ入力される。この無信号検出回路5は例え
ばリトリガラブルマルチバイプレータ等からなり、パル
スが連続的に入力されると“H”レベルを維持し、パル
ス立上り後、時間tdO間に続くパルスが存在しない場
合に“L”レベルに転じる信号a2を出力するものであ
る。
An input signal S to this circuit is amplified by an AGC amplifier circuit 4 to become an output S2, and differentiated by a differentiator circuit 5 to output a signal S. The recorded data detection circuit 7 binarizes the input signal using a threshold value T shown by a broken line superimposed on S3 and outputs a pulse signal S4. The pulse generating circuit 8 expands the pulse width to S,
Output. Also, the output S4 of the recorded data detection section 7 is input to the no-signal detection circuit 5. This no-signal detection circuit 5 is composed of, for example, a retriggerable multivibrator, and maintains the "H" level when pulses are continuously input, and when there is no pulse that continues for a time tdO after the pulse rises. It outputs a signal a2 which changes to "L" level.

第3図は微分回路5出力S、の周波数成分を明示するグ
ラフである。ローパスフィルタ1は高周波成分を除去す
るのでその出力は一点鎖線で示す特性となる。一方微分
回路5は低周波域の信号を大きく減衰させるからその単
独の出力は破線で示す特性となる。従って微分回路5出
力S3の合成特性は実線で示す山形となり、本来検出す
べき信号の周波数帯域(これは山の頂部になるように回
路定数が定められる)外が減衰したものとなる。
FIG. 3 is a graph showing the frequency components of the output S of the differentiating circuit 5. Since the low-pass filter 1 removes high frequency components, its output has the characteristics shown by the dashed line. On the other hand, since the differentiating circuit 5 greatly attenuates signals in the low frequency range, its single output has the characteristics shown by the broken line. Therefore, the composite characteristic of the output S3 of the differentiating circuit 5 becomes a mountain shape shown by a solid line, in which frequencies outside the frequency band of the signal to be detected (circuit constants are determined so as to be at the top of the mountain) are attenuated.

つまり従来のものに比して低周波側の雑音により無信号
であると誤検出される可能性が著しく低くなるのである
In other words, the possibility of erroneously detecting no signal due to noise on the low frequency side is significantly lower than in the conventional case.

第4図は本発明の他の実施例を示し、無信号検出をパル
ス発生回路8出力によって行うようにしたものである。
FIG. 4 shows another embodiment of the present invention, in which no-signal detection is performed by the output of a pulse generating circuit 8.

即ちパルス発生回路8出力Ssを無信号検知回路22へ
入力し、その出力a2をコントロール回路23へ与える
べくなしている。その他については第1図の実施例と同
様であるので、同符号を付して説明を省略する。記録デ
ータ検出回路7出力S、及びパルス発生回路8出力S、
の有無は実質的に同様であるので第4図の実施例と第1
図の実施例と同効を奏する。
That is, the output Ss of the pulse generation circuit 8 is input to the no-signal detection circuit 22, and the output a2 thereof is applied to the control circuit 23. Since the other parts are the same as those in the embodiment shown in FIG. 1, the same reference numerals are given and the explanation will be omitted. Recorded data detection circuit 7 output S, pulse generation circuit 8 output S,
Since the presence or absence of is substantially the same, the embodiment shown in FIG.
It has the same effect as the embodiment shown in the figure.

〔発明の効果〕〔Effect of the invention〕

以上の如き本発明装置によれば耐雑音性に強い無信号検
出が可能であり、適切な利得設定ができる自動利得制御
増幅回路を備えた信号再生回路が実現できる。また本発
明装置は信号再生に従来から必要とされていた回路以外
に特別な回路を必要としないという利点を有する。
According to the device of the present invention as described above, it is possible to detect no signals with strong noise resistance, and it is possible to realize a signal reproducing circuit equipped with an automatic gain control amplifier circuit that can set an appropriate gain. The device of the present invention also has the advantage that it does not require any special circuitry other than the circuitry conventionally required for signal reproduction.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の信号再生回路の第1実施例を示すブロ
ック図、第2図はその動作説明のための信号波形図、第
3図は信号の周波数特性図、第4図は第2実施例を示す
ブロック図、第5図は従来回路のブロック図、第6図は
その動作説明のための信号波形図である。 1・・・ローパスフィルタ 4・・・自動利得制御増幅
回路 5・・・微分回路 7・・・記録データ検出回路
22・・・無信号検出回路 なお、図中、同一符号は同一、又は相当部分を示す。 代理人  大   岩  増  雄 Sl 簗  2  図 弔   3   図 第   6   図 手続補正書(自発) 信号再生回路 3、補正をする者 事件との関係 特許出願人 住 所    東京都千代田区丸の内二丁目2番3号名
 称  (601)三菱電機株式会社代表者志岐守哉 4、代理人 住 所    東京都千代田区丸の内二丁目2番3号5
、補正の対象 明細書の「発明の詳細な説明」の欄 6、補正の内容 (1)明細書の第2頁第19行目に「幅を広げて」とあ
るのを「幅を所定値にした」と訂正する。 (2)明細書の第8頁第4行目に「パルス幅を拡大して
Ss Jとあるのを「パルス幅を所定値にした出力Ss
 Jと訂正する。 以上
FIG. 1 is a block diagram showing a first embodiment of the signal reproducing circuit of the present invention, FIG. 2 is a signal waveform diagram for explaining its operation, FIG. 3 is a signal frequency characteristic diagram, and FIG. FIG. 5 is a block diagram showing the embodiment, FIG. 5 is a block diagram of a conventional circuit, and FIG. 6 is a signal waveform diagram for explaining its operation. 1...Low pass filter 4...Automatic gain control amplifier circuit 5...Differentiating circuit 7...Recorded data detection circuit 22...No signal detection circuit Note that the same symbols in the figures indicate the same or equivalent parts. shows. Agent Masuo Oiwa Sl Yan 2 Condolences 3 Diagram No. 6 Procedural amendment (voluntary) Signal regeneration circuit 3, relationship to the case of the person making the amendment Patent applicant address 2-2-3 Marunouchi, Chiyoda-ku, Tokyo Name (601) Mitsubishi Electric Corporation Representative Moriya Shiki 4, Agent Address 2-2-3-5 Marunouchi, Chiyoda-ku, Tokyo
, Column 6 of "Detailed Description of the Invention" of the specification to be amended, contents of the amendment (1) In the 19th line of page 2 of the specification, the phrase "increase the width" was changed to "increase the width to a predetermined value.""I did it," he corrected. (2) In the 4th line of page 8 of the specification, "Ss J with expanded pulse width" has been replaced with "Output Ss with pulse width set to a predetermined value."
Correct it with J. that's all

Claims (1)

【特許請求の範囲】[Claims] (1)記録媒体から再生した信号をローパスフィルタを
介して自動利得制御増幅回路へ入力し、その出力を微分
回路へ入力し、微分回路出力を所定閾値で2値化してパ
ルス信号を出力するデータ検出回路を備える信号再生回
路において、前記データ検出回路出力のパルス信号の有
無を検出する無信号検出回路を備え、該無信号検出回路
が前記パルス信号が存在しないことを検出した場合に前
記自動利得制御増幅回路の利得を固定すべくなしてある
ことを特徴とする信号再生回路。
(1) Data that inputs the signal reproduced from the recording medium to an automatic gain control amplifier circuit via a low-pass filter, inputs its output to a differentiator circuit, binarizes the output of the differentiator circuit with a predetermined threshold value, and outputs a pulse signal. The signal reproducing circuit including a detection circuit includes a no-signal detection circuit that detects the presence or absence of a pulse signal output from the data detection circuit, and when the no-signal detection circuit detects that the pulse signal does not exist, the automatic gain A signal reproducing circuit characterized in that the gain of a control amplifier circuit is fixed.
JP9253189A 1989-04-11 1989-04-11 Signal reproducing circuit Pending JPH02270413A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9253189A JPH02270413A (en) 1989-04-11 1989-04-11 Signal reproducing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9253189A JPH02270413A (en) 1989-04-11 1989-04-11 Signal reproducing circuit

Publications (1)

Publication Number Publication Date
JPH02270413A true JPH02270413A (en) 1990-11-05

Family

ID=14056942

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9253189A Pending JPH02270413A (en) 1989-04-11 1989-04-11 Signal reproducing circuit

Country Status (1)

Country Link
JP (1) JPH02270413A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006115254A1 (en) * 2005-04-25 2006-11-02 Matsushita Electric Industrial Co., Ltd. Automatic gain control circuit and signal reproducing device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006115254A1 (en) * 2005-04-25 2006-11-02 Matsushita Electric Industrial Co., Ltd. Automatic gain control circuit and signal reproducing device
JPWO2006115254A1 (en) * 2005-04-25 2008-12-18 松下電器産業株式会社 Automatic gain control circuit and signal reproducing apparatus
JP4623677B2 (en) * 2005-04-25 2011-02-02 パナソニック株式会社 Automatic gain control circuit and signal reproducing apparatus
US7894312B2 (en) 2005-04-25 2011-02-22 Panasonic Corporation Automatic gain control circuit and signal reproducing device

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