JPH02266281A - Radar equipment - Google Patents

Abstract

PURPOSE:To suppress the radar interference of other ships which is coincident with the radar pulses of own ship by providing a transmission part which has a reference trigger signal generating circuit, an asynchronous signal generating circuit, a storage delay circuit, and a radar pulse signal generating circuit. CONSTITUTION:The reference trigger signal generating circuit 21 sends out a reference trigger signal (a) which has a reference period to the clock signal terminal CP of a D type FF 22. A high-level voltage H is applied to the input terminal D of the FF 22 at all times and the output signal (c) from the output terminal Q is inputted to the input terminal D of a trailing FF 23. A synchronous pulse signal (b) outputted by the asynchronous signal generating circuit 24 is applied to the clock terminal CP of the FF 23. Further, a synchronous clock signal (f) which is shorter than the signal (b) is applied to the signal terminal CP of the counter 26 from a clock signal generating circuit 28 as the time storage and delay circuit. The radar pulse signal generating circuit 25 outputs a radar pulse signal P in synchronism with the rising of the pulse waveform of the output signal (h) of an FF 27. The signal P is radiated from an antenna through a transmission switch.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a radar device that receives a reflected signal from a target of a radar pulse signal radiated from an antenna and displays it on a display unit, and particularly relates to a radar device that receives a reflected signal from a target of a radar pulse signal radiated from an antenna and displays it on a display unit. The present invention relates to a radar device that can prevent interference caused by radar pulse signals emitted from the device.

[Prior Art] A radar device that identifies the position of a target by emitting a radar pulse signal and receiving a signal reflected by the target is generally configured as shown in FIG.

That is, the antenna 1 for both transmitting and receiving purposes is rotationally driven by a driving section 2, and the direction of rotation of the antenna 1 is detected by an azimuth detecting section 3. On the other hand, a radar pulse signal is supplied to the antenna 1 from a transmitting section 5 via a transmitting/receiving switch 4 . The transmitting/receiving switch 4 switches the antenna 1 to the receiving section 6 side every time the radar pulse signal is outputted once, and guides the reflected signal of the radar pulse signal reflected at the target to the receiving section 6. Note that this transmit/receive switch 4 is switched to the transmitter 5 side only at the moment when the radar pulse signal is output, and is switched to the receiver 6 side for the rest of the period.
It has been switched to the side. The received signal of the radar pulse signal received by the receiving section 6 is input to the display section 7. The display section 7 displays the received signal in polar coordinates, for example, as shown in FIG. 5, based on the direction signal inputted separately from the direction detection section 3.

In such a radar device, when a radar pulse signal Pl having a white fundamental period To shown in FIG. 4 is emitted from the transmitter 5 via the antenna 1, if a target exists in the radiation direction, the received signal R3 has each waveform 8 caused by the target.
appears. Since the antenna 1 is rotated at a constant speed by the drive section 2, the display section 7 is rotated as shown in FIG. 5(a).
When polar coordinates are displayed on the display screen 7a, an image 8a corresponding to each waveform 8 is displayed.

However, if another ship (other ship A) also equipped with a radar device exists near the ship equipped with this radar device, the radar pulse signal P2 is periodically emitted from the radar device of this other ship A. . Then, the period of the radar pulse signal P2 in the radar device of other ship A is set to T2.
Then, the radar pulse signal P2 emitted by the other ship A is
is directly transmitted to the receiving unit 6 via the antenna 1 of the own ship's radar system.
incident on the In this case, the received signal R2 sent from the receiving section 6 to the display section 7 includes, as shown in FIG. A pulse waveform 9 appears. The period in which this pulse waveform 9 appears is equal to the period T2 of the radar pulse signal P2 of the other ship A. Generally, the period T2 of the radar pulse signal P2 of the other ship A does not match the period T1 of the own ship's radar pulse signal P1, so the delay time from the reference trigger 1o at which the pulse waveform 9 appears changes sequentially. Therefore, such a received signal R2 is displayed on the display screen 7a.
When displayed above, as shown in FIGS. 5(a) and 5(b), in addition to the image 8a corresponding to the target described above, points 11 caused by each of the pulse waveforms 9 are continuously displayed. That is, radar interference occurs.

In order to prevent radar interference in which such a point 11 is displayed on the display screen 7a, the AND signal between a pair of received signals R2 adjacent to each reference bird 10 is set as a new received signal R2-. This is commonly practiced. That is,
Comparing each signal waveform in data N and data N+1 in Figure 4, the position of waveform 8 caused by 1 target hardly changes, but the position of pulse waveform 9 caused by radar pulse signal P2 of other ship A changes significantly. do. Therefore, the pulse waveform 9 caused by the other ship A is deleted from the AND signal.

[Problem to be Solved by the Invention] However, in addition to the other ship A, the period T of the radar pulse signal P1 of the own ship's radar device. exactly the same period T. When another ship B equipped with a radar device that outputs a radar pulse signal P3 having
appears in

The period of this pulse waveform 13 is the period To of the reference trigger 10.
are exactly the same, so the reference bird appears at the same delay time position for 10. Therefore, even if the above-described AND signal processing is performed on this received signal R3, the pulse waveform 13 will not be erased. As a result, Figure 5 (
As shown in C), each pulse waveform 13 is displayed on the display screen 7a.
An annular point 14 appears due to . Therefore, in this case, the radar interference phenomenon is not completely eliminated.

In order to eliminate such inconveniences, instead of fixing the period To of the radar pulse signal Pl output from the own ship's radar device to a constant value, the period To is randomly changed to match the reference trigger 10 and the pulse A radar interference cancellation method has been proposed in which the component of the pulse waveform 13 contained in the above-mentioned AND signal is removed by randomly changing the delay time between the pulse waveform 13 and the waveform 13 (Japanese Patent Application Laid-Open No. 54-32).
Publication No. 091).

According to the above radar interference cancellation method, a pseudo-random number called a maximum period sequence is generated using a multi-stage shift register and an arithmetic circuit, and the period of the radar pulse signal is randomly assigned by assigning the period of the radar pulse signal to the random number. It is changing to

However, in order to make the pseudo-random numbers of the maximum period sequence described above more effective random numbers, the shift register and the arithmetic circuit become complicated, and a circuit for assigning random numbers to the period of the radar pulse signal is required. There was a problem with the cost increasing significantly.

The present invention was made in view of these circumstances, and
By simply adding an inexpensive and simple circuit to a conventional device, such as a storage delay circuit that can be easily configured with a circuit that generates an asynchronous pulse signal and an up/down counter, the period of the radar pulse signal can be varied within a certain range. It is an object of the present invention to provide a radar device capable of almost completely suppressing the occurrence of radar interference even if another ship approaches that transmits a radar pulse signal having a period that almost matches the period of the own ship's radar pulse signal.

[Means for Solving the Problems] In order to solve the above problems, the present invention radiates a radar pulse signal output from a transmitter via an antenna, and radiates a radar pulse signal reflected at a target via an antenna. In a radar device that receives a signal at a receiving section and displays the received signal on a display section, the transmitting section includes a reference trigger signal generation circuit that generates a reference trigger signal having a reference period, and a reference trigger signal generation circuit that generates a reference trigger signal having a reference period, and a signal having a period shorter than the reference period. and an asynchronous signal generation circuit that generates an asynchronous pulse signal that is asynchronous to a reference trigger signal, and a reference trigger that stores each trigger of the signal and the time from the output time of the corresponding trigger to the next pulse output in the asynchronous pulse signal. A memory delay circuit outputs a pulse delayed by a time corresponding to the stored time after the next pulse output time, and a radar pulse signal generation circuit outputs a radar pulse signal to the antenna in synchronization with this output signal. It is equipped with the following.

[Operation] According to the radar device configured in this manner, the reference trigger signal having the reference period To output from the reference trigger signal generation circuit is input to the storage delay circuit. This memory delay circuit has a period TA shorter than the reference period To,
Further, an asynchronous pulse signal asynchronous to the reference trigger signal is input. The memory delay circuit stores the time from the reference trigger signal input time to the next pulse manual time of the asynchronous pulse signal, and delays the pulse input time of the method by an amount corresponding to this memory time. It outputs a pulse signal and guides this delayed pulse to a radar pulse signal generation circuit. With this configuration, since the reference trigger signal period To and the asynchronous pulse signal period TA are asynchronous, the storage time varies from minimum zero to maximum T for each trigger.
These two 4. until A. It changes with the beat period of the i number.

Even if the basic trigger signal and the asynchronous pulse signal each have perfect periodicity, the period of the delayed pulse that is delayed from the asynchronous pulse signal by a time corresponding to this fluctuating storage time changes with the beat period described above. It turns out.

Therefore, the period of the radar pulse signal output from the radar pulse signal generating circuit to the antenna changes within a certain range around the reference period. Therefore, radar interference can be removed by employing, for example, the above-mentioned AND signal processing on the receiving side.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the main parts of a transmitting section 20 in a radar device according to an embodiment. Note that antennas other than the transmitter 20 1. Drive part 2. Direction detection section 3, transmission/reception switch 4.
The receiving section 61 and display section 7 are the same as those shown in FIG. Note that the receiving section 6 has a function of removing radar interference by processing the received signal into an AND signal and sending it to the display section 7, as described above.

In the transmitter 20 of FIG. 1, 21 is a reference trigger signal generation circuit, and this reference trigger signal generation circuit 21 has a reference period T. A reference trigger signal a having a value of 0 is sent to the clock signal terminal CP of the D-type flip-flop 22. A voltage of H (high level) is always applied to the input terminal of this flip-flop 22, and the output signal C of the output terminal Q is applied.
is input to the input terminal of the next D-type flip-flop 23.

An asynchronous pulse signal outputted from an asynchronous signal generating circuit 24 is applied to a clock terminal CP of the flip-flop 23 . This asynchronous pulse signal has a reference period T of the reference trigger signal a.

It is a pulse signal having a short period TA, for example, 1/10 or less compared to . Note that the value of this period TA is 1/10. '1/8.

It is desirable to set the value to a value that is not divisible by an integer such as 1/4, but is not easily divisible, that is, a value that does not have a simple harmonic relationship.

Further, the output signal d of the inverting output terminal Q of the flip-flop 23 is applied to the inverting reset terminal R of the flip-flop 22. Further, the output signal C of the output terminal Q of the flip-flop 22 is applied to the up/down switching terminal U/D of the up/down counter 26.

On the other hand, the reference trigger signal a is also sent to the clock terminal CP of the flip-flop 27. flip flop 2
An H (high level) voltage is always applied to the input terminal 7, and the output signal e of the output terminal Q is applied to the inverting reset terminal R of the up/down counter 26.

Also, the clock signal terminal C of the up/down counter 26
A clock signal f having a shorter period than the asynchronous pulse signal is applied to P from a clock signal generation circuit 28 for time storage and delay.

For example, the clock signal f is 1/1 of the asynchronous pulse signal
This clock signal f is a pulse signal having a short period Tc of 0 or less, and the time from the input time to of the reference trigger signal a to the next pulse input time of the asynchronous pulse signal is counted by the up/down counter 26, for example, by an up operation. After the next pulse input time, a down operation is performed to delay the carry signal g until the carry signal g is output.
Although it is not necessary to take into account synchronization/asynchronousness with the reference trigger signal a and the asynchronous pulse signal S, there is no need to take into account synchronization or asynchronousness with the reference trigger signal a or the asynchronous pulse signal S, but among the changes in the storage time mentioned above, there is a period in which the up/down counter 26 does not fully count during TA, which is the largest change. It is necessary to take into account.

Note that the carry signal g of the ripple carry terminal RCO of the up/down counter 26 is applied to the inverting reset terminal R of the flip-flop 27. Then, the output signal from the inverting output terminal Q of the flip-flop 27 is sent to the radar pulse signal generation circuit 25. This radar pulse signal generation circuit 25 outputs a radar pulse signal P in synchronization with the rise of the pulse waveform of the output signal of the flip-flop 27. The radar pulse signal P output from the radar pulse signal generation circuit 25 is radiated from the antenna 1 via the transmission/reception switch 4 shown in FIG.

Next, the operation of the transmitter 20 configured as described above will be explained using the time chart of FIG. 2.

First, when one trigger of the reference trigger signal a rises at time to, the flip-flop 22 takes in the high level voltage of 5V applied to the input terminal, so the output signal C of the output terminal Q goes high. Change to level. Then, the signal level at the input terminal of the flip-flop 23 changes to high level.

Next, when the pulse of the asynchronous pulse signal S rises at time 11, the flip-flop 23 takes in the high-level voltage at the input terminal, changes the output signal d of the inverting output terminal Q to low level, and turns the flip-flop 22 on. Reset.

On the other hand, the reference trigger signal a is also applied to the clock terminal CP of the flip-flop 27, changes the output terminal Q to high level, and releases the reset of the up/down counter 26. With this release, the up/down counter 26 is incremented by the clock signal f while the output terminal Q of the flip-flop 22 is at a high level. Next, as described above, when the flip-flop 22 is reset, the output terminal Q changes to a low level, and the up/down counter 26 is switched to a down operation, and is counted down by the clock signal f.

When the up/down counter 26 completes the down operation by the amount counted in the up operation, it outputs a carry signal g, resets the flip-flop 27, and changes the output terminal Q to a low level. The up/down counter 26 is reset by this signal e and stops operating until the next cycle.

By resetting the flip-flop 27 mentioned above, this inverted output Q changes to a high level, and in synchronization with this, one radar pulse 29 is generated from the radar pulse signal generation circuit 26.
is output.

In this way, when the trigger of the base trigger signal a rises at the time to, the up/down counter 26 performs the same operation during the latch time ΔT from the rising time to to the next pulse rising time t2 of the asynchronous pulse signal. After the asynchronous pulse signal rises by the amount of up-counting, the radar pulse 2 is counted down for a time of ΔT1.
Since 9 is output, the reference bird is 2・ΔT1 from signal a.
Configure a delayed storage delay circuit.

In this way, each time the reference trigger signal a is manually triggered, two radar pulses are output at a time delayed by 2·ΔT. Here, in FIG. 2, the delay time from the rise of the second trigger of the reference trigger signal a to the second radar pulse output is ΔT2, the third delay time is ΔT3, and the fourth delay time is ΔT4. Then, the output interval between two radar pulses in the radar pulse signal P, that is, each output period T sl, T s2 .
T s3 is expressed by the following formula.

Tsl-T, ) -2-ΔT, +211 ΔT2
Ts2-TO-2・ΔT2+2-ΔT3Ts3=TO-
2・ΔT3+2・ΔT4. In these formulas,
As mentioned above, since the reference trigger signal a and the asynchronous pulse signal are asynchronous, the respective delay times 2·ΔT1, 2·Δ
The probability that T2+2・ΔT1 will be equal to each other is very small, and if the periods TOr''A are also set so that they do not have a simple harmonic relationship with each other, the probability that they will be equal will be further reduced. The value of 2.DELTA.T does not exceed twice the period TA of the asynchronous pulse signal.

Therefore, Tsl, Ts2, Ts3, etc., and the period of the radar pulse signal P emitted from the antenna 1 changes within the range of ±2・TA around the reference period To of the reference trigger signal a. do.

By receiving the signal reflected from the target in response to the radar pulse signal P whose period changes in this way at the receiving section 7 and performing the above-described AND signal processing, radar interference can be almost completely removed.

That is, only the pulse waveform 8 resulting from the radar pulse of another ship A that outputs a radar pulse signal with a period different from the basic period To of the own ship's radar pulse signal is included in the received signal R of the receiving unit 6 of the own ship's radar device. The period T is exactly the same as the basic period To of the own ship's radar pulse signal. Even if a pulse waveform 13 caused by the radar pulse of another ship B that outputs a radar pulse signal of By performing the processing, points 11, 12, and 14 caused by the respective pulse waveforms 9 and 13 can be erased from the display screen 7a of the display unit 7.

Furthermore, even if other ship B is equipped with the exact same radar equipment as your own ship, it is unthinkable that your own ship and other ship B would turn on the radar equipment at exactly the same time, so own ship's radar It is inconceivable that the period of change of the pulse signal is synchronized with the period of change of the radar pulse signal of the other ship B.

Therefore, even if ships equipped with the same model of radar equipment approach each other, they will not cause radar interference with each other.

Further, in the transmitting device 20 shown in FIG. 1, a reference trigger signal generation circuit 21 and a radar pulse signal generation circuit 2
5 is a circuit that is naturally incorporated in the conventional transmitter 5 shown in FIG. 3, so the circuits newly incorporated this time are an asynchronous signal generating circuit 24 and three flip-flops 22, 23, .
27, an up/down counter 26, and a clock signal generation circuit 28. Of these, the clock signal generation circuit 28 can also be generated from a clock for another digital circuit. Therefore, these circuits can be constructed relatively small and inexpensively, so that manufacturing costs do not increase significantly compared to conventional devices. Moreover, the device does not become larger.

In this embodiment, the storage delay circuit is configured using an up/down counter, but it may also be configured using an analog circuit using a ramp circuit or the like.

Furthermore, in this embodiment, the memorized time and the delayed time are made the same, but they do not need to be exactly the same; for example, they may be related, such as by making the delayed time twice the memorized time. Bye.

In addition, the present invention can be implemented in various modifications without departing from the spirit thereof.

[Effects of the Invention] As explained above, according to the present invention, the period of a radar pulse signal can be kept constant by simply adding an inexpensive and simple circuit, ie, a circuit for generating an asynchronous pulse signal and a memory delay circuit, to a conventional device. It is varied within the range. Furthermore, even if another ship approaches that transmits a radar pulse signal with a period that almost matches the period of the own ship's radar pulse signal, it is an economical and high-performance method that can almost completely suppress radar interference. We can provide high-performance radar equipment.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a transmitter of a radar device according to an embodiment of the present invention, FIG. 2 is a time chart showing the operation of the same transmitter, and FIG. 3 is a block diagram showing a schematic configuration of a conventional radar device. 4 are time charts showing the operation of the conventional device, and FIG. 5 is a diagram showing the display screen of the conventional device. DESCRIPTION OF SYMBOLS 1... Antenna, 4... Transmission/reception switch, 6... Receiving section, 7... Display section, 20... Transmitting section, 21...
Kiou trigger signal generation circuit, 22, 23. 27... flip-flop, 24... asynchronous signal generation circuit, 25.
. . . Radar pulse signal generation circuit, 26 . . . Up/down counter, 28 . . Clock signal generation circuit. Applicant's agent Patent attorney Takehiko Suzue (a) Figure

Claims (1)

[Claims] A radar pulse signal outputted from a transmitter (20) is radiated through an antenna (1), and the radar pulse signal reflected at a target is transmitted through the antenna to a receiver (6). In the radar apparatus that receives the received signal and displays the received signal on a display section (7), the transmitting section (20) includes a reference trigger signal generation circuit (21) that generates a reference trigger signal having a reference period; an asynchronous signal generating circuit (24) that generates an asynchronous pulse signal having a period shorter than a reference period and asynchronous to the reference trigger signal; A memory delay circuit (26) that stores the time until the next pulse output in the pulse signal and outputs a pulse delayed by a time corresponding to the stored time after the next pulse output time, and a memory delay circuit (26) that is synchronized with this output signal. and a radar pulse signal generation circuit (25) that outputs the radar pulse signal to the antenna.