JPH02263385A - Semiconductor storage device - Google Patents

Semiconductor storage device

Info

Publication number
JPH02263385A
JPH02263385A JP1085002A JP8500289A JPH02263385A JP H02263385 A JPH02263385 A JP H02263385A JP 1085002 A JP1085002 A JP 1085002A JP 8500289 A JP8500289 A JP 8500289A JP H02263385 A JPH02263385 A JP H02263385A
Authority
JP
Japan
Prior art keywords
data
output
circuit
switching circuit
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1085002A
Other languages
Japanese (ja)
Inventor
Hideyuki Ozaki
尾崎 英之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1085002A priority Critical patent/JPH02263385A/en
Publication of JPH02263385A publication Critical patent/JPH02263385A/en
Pending legal-status Critical Current

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  • Static Random-Access Memory (AREA)
  • Dram (AREA)

Abstract

PURPOSE:To facilitate switching of truth/complement between input data and output data by providing a switching circuit which selects truth or complement relations between the input and the output. CONSTITUTION:The switching circuit is provided which switches truth/ complement relations between input data and output data in accordance with bonding/non-bonding to a bonding pad 4, and truth/complement relations between input data and output data are switched by the output signal of the switching circuit in a data input buffer circuit 7 or an output buffer circuit formed on the same chip as the switching circuit. For example, a bonding switching circuit is provided with a bonding pad 4, an inverter 5, and a resistance element 6 of about 1MOMEGA. Thus, switching of truth/complement between input data and output data is facilitated and the productivity is not damaged.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、半導体記憶装置の人力データと出力データ
の関係の正補を切り換え可能にする構成法に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a configuration method that makes it possible to switch the correction of the relationship between manual data and output data of a semiconductor memory device.

[従来の技術] 第4図は従来の半導体記憶装置の人、出力を示すブロッ
ク図である。図において(1)は半導体記憶装置、(2
)は入力端子、(3)は出力端子である。
[Prior Art] FIG. 4 is a block diagram showing the output of a conventional semiconductor memory device. In the figure, (1) is a semiconductor memory device, (2
) is an input terminal, and (3) is an output terminal.

次に動作について説明する。半導体記憶装置(1)の人
力データDIJ1と出力データQの関係は一義的な関係
にあった。すなわち、人力データDINとして論理値の
“1”を半導体記憶装置(1)に人力し、記憶保持させ
た場合、読み出し時の半導体記憶装置(1)から9出力
グータQは、通常、論理値の“1”が読み出される。そ
して“0”の入力に対しては“0”が出力される。その
関係を示せば次のとおりである。
Next, the operation will be explained. The relationship between the human input data DIJ1 and the output data Q of the semiconductor memory device (1) was unique. In other words, when a logical value "1" is manually input to the semiconductor storage device (1) as the data DIN and stored, the 9 output guter Q from the semiconductor storage device (1) at the time of reading is normally the logical value. “1” is read. In response to an input of "0", "0" is output. The relationship is shown below.

[発明が解決しようとする課題] 従来の半導体記憶装置は以上のように構成されていたが
、半導体記憶装置を使用する場合、必ずしも、入力デー
タと出力データとの関係は、正である場合ばかりではな
く、補の関係にある方が便利である場合もある。このよ
うな場合は半導体記憶装置への書き込みデータを反転さ
せる。あるいは半導体記憶装置からの読み出しデータを
反転させるためのインバータを外付けする必要があった
。一方、半導体記憶装置を製造する方にとっても、2種
類のデバイスを作り分けることは、例えば、ウェハプロ
セス中の一部のマスクを変えることにより実現可能であ
るが、その場合、生産性が低下するなどの問題があった
[Problems to be Solved by the Invention] Conventional semiconductor memory devices have been configured as described above, but when using a semiconductor memory device, the relationship between input data and output data is not always positive. In some cases, it may be more convenient to have a complementary relationship instead of a . In such a case, the data written to the semiconductor memory device is inverted. Alternatively, it was necessary to externally attach an inverter to invert the data read from the semiconductor memory device. On the other hand, for those who manufacture semiconductor memory devices, it is possible to make two types of devices separately by, for example, changing some masks during the wafer process, but in that case, productivity will decrease. There were other problems.

この発明は上記のような従来のものの欠点を除去するた
めになされたもので、人力データと出力データとの関係
を正補のいずれかに選択できる半導体記憶装置を提供す
ることを目的とする。
The present invention has been made in order to eliminate the above-mentioned drawbacks of the conventional device, and an object of the present invention is to provide a semiconductor memory device in which the relationship between human input data and output data can be selected as either correction or correction.

[課題を解決するための手段] この発明に係る半導体記憶装置は、入力と出力との関係
を正補のいずれにするかの選択を行う切り替え回路を設
け、半導体記憶装置のアセンブリ工程のワイヤボンディ
ング時に切り替えを行う。
[Means for Solving the Problems] A semiconductor memory device according to the present invention is provided with a switching circuit that selects whether the relationship between input and output is correct or correct, and the semiconductor memory device is equipped with a switching circuit that selects whether the relationship between input and output is correct or correct. Switch from time to time.

[作用] この発明における半導体装置は、データ人力バッファ回
路に付加した切り換え回路によって人力と出力との関係
を正補のいずれにするかを選択する。
[Operation] The semiconductor device according to the present invention selects whether the relationship between human power and output should be corrected or corrected by a switching circuit added to the data human power buffer circuit.

[実施例] 以下、この発明の一実施例を図について説明する。第1
図はボンデイング切り換え回路の回路図である。図にお
いて(4)はボンディングパッド、(5)はインバータ
、(6)は通常IMΩ程度の抵抗素子である。
[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
The figure is a circuit diagram of a bonding switching circuit. In the figure, (4) is a bonding pad, (5) is an inverter, and (6) is a resistance element that is usually about IMΩ.

次に動作について説明する。Next, the operation will be explained.

ボンディングパッドに何もワイヤリングしないとき、或
は接地レベルの電位をボンディングにより接続した場合
、第1図に示すノードA点は“し”レベルになり、した
がって信号φはH”、φは“L”レベルになる。
When nothing is wired to the bonding pad, or when a ground level potential is connected by bonding, the node A point shown in FIG. 1 is at the "Yes" level, so the signal φ is "H" and φ is "L". become the level.

一方、ボンディングパッドに電流レベルの電位をボンデ
ィングにより接続した場合、ノードA点は“H”レベル
になるので信号φは“L“、Tは“H“レベルになる。
On the other hand, when a current level potential is connected to the bonding pad by bonding, the node A becomes "H" level, so that the signal φ becomes "L" and the signal T becomes "H" level.

この関係をまとめると次のとおりである。This relationship can be summarized as follows.

また、第2図は第1図のボンディング切り換え回路の出
力である。
Further, FIG. 2 shows the output of the bonding switching circuit of FIG. 1.

信号φ、φが人力される切り替え回路を、データ人力バ
ッファ回路に付加した回路の回路図である。図において
(2)は入力端子、(1)はデータ人力バッファ回路、
(8)〜(11)はnチャンネルのMOS )ランジス
タである。MOSトランジスタ(8)〜(11)はゲー
トが“H“レベルのときに導通する。したがって信号φ
が“H” φが“L”の時MO5トランジスタ(8) 
、 (9)が導通し、MOS トランジスタ(10) 
、 (11)が非導通になる。したがってデータ人力バ
ッフ7回路(7)より送られる人力データDINはデー
タ人力口に、また人力データDINはデータ人力DI8
2に接続され、この場合は人力データDIN、Dlnと
正の関係でチップ内に人力データDIN□、酊がか取り
込まれる。一方、信号φが“L“、信号φが“H”の場
合はMOS トランジスタ(8) 、 (9)は非導通
、MOS トランジスタ(10)、(11)が導通する
。この場合はデータ人力バッファ回路(7)より送られ
る人力データDINは人力データ[−に、また人力デー
タ丁工は入力データDIN2に接続され、この場合は、
入力データDIN、DINと補の関係でチップ内に入力
データDIN2. DIN2が取り込まれる。以上によ
うにして正補の関係を容易に選択することができる。
FIG. 2 is a circuit diagram of a circuit in which a switching circuit for manually inputting signals φ and φ is added to a data manually operated buffer circuit. In the figure, (2) is an input terminal, (1) is a data manual buffer circuit,
(8) to (11) are n-channel MOS transistors. MOS transistors (8) to (11) are conductive when their gates are at "H" level. Therefore the signal φ
is “H” When φ is “L” MO5 transistor (8)
, (9) becomes conductive, and the MOS transistor (10)
, (11) becomes non-conductive. Therefore, the human power data DIN sent from the data human power buffer 7 circuit (7) is sent to the data human power port, and the human power data DIN is sent to the data human power port DI8.
In this case, the human power data DIN□ and drunkenness are taken into the chip in a positive relationship with the human power data DIN and Dln. On the other hand, when the signal φ is "L" and the signal φ is "H", the MOS transistors (8) and (9) are non-conductive, and the MOS transistors (10) and (11) are conductive. In this case, the human power data DIN sent from the data human power buffer circuit (7) is connected to the human power data [-, and the human power data input is connected to the input data DIN2, and in this case,
Input data DIN, input data DIN2 . DIN2 is imported. As described above, the correction relationship can be easily selected.

なお、上記実施例では、入力バッファ回路に切り換え回
路を付加した場合を示したが、この発明の他の実施例と
して出力バッファ回路に切り替え回路と付加しても良い
。第3図は第1図のボンディング切り替え回路の出力で
ある。信号φ、φが人力される切り換え回路を、出力バ
ッファ回路に付加した回路の回路図である。図において
(5)はインバータ、(8)〜(11)はMOSトラン
ジスタ、(12)は出力バッファ回路である。
In the above embodiment, a switching circuit is added to the input buffer circuit, but as another embodiment of the present invention, a switching circuit may be added to the output buffer circuit. FIG. 3 shows the output of the bonding switching circuit of FIG. FIG. 2 is a circuit diagram of a circuit in which a switching circuit to which signals φ and φ are input manually is added to an output buffer circuit. In the figure, (5) is an inverter, (8) to (11) are MOS transistors, and (12) is an output buffer circuit.

[発明の効果コ 以上のように、この発明によればボンディング切り換え
回路を設け、その出力信号でデータ人力バッファ回路、
あるいは出力バッファ回路の信号経路を切り換えるよう
に構成したので、人力データと出力データの正補の切り
換えを容易にし、また、生産性も損わないという効果が
ある。
[Effects of the Invention] As described above, according to the present invention, a bonding switching circuit is provided, and the output signal is used to control the data buffer circuit,
Alternatively, since the signal path of the output buffer circuit is configured to be switched, switching between manual data and output data correction is facilitated, and there is an effect that productivity is not impaired.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、この発明の一実施例による半導体記憶装置の
ボンディング切り換え回路の回路図、第2図は第1図の
回路の出力により切り替えられる切り替え回路をデータ
人力バッファ回路に付加した回路の回路図、第3図はこ
の発明の他の実施例を示す出力バッファ回路に第1図の
回路の出力により切り替えられる切り替え回路を付加し
た回路の回路図、第4図は従来の半導体記憶装置の人出
力を示すブロック図である。 図において(2)は入力端子、(4)はボンディングパ
ッド、(5)はインバータ、(6)は抵抗素子、(7)
はデータ人力バッファ回路、(8)〜(11)はMOS
トランジスタ、(12)は出力バッファ回路である。 なお、図中、同一符号は同一、又は相当部分を示す。
FIG. 1 is a circuit diagram of a bonding switching circuit for a semiconductor memory device according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a circuit in which a switching circuit that can be switched by the output of the circuit in FIG. 1 is added to a data manual buffer circuit. 3 is a circuit diagram of a circuit in which a switching circuit that can be switched by the output of the circuit in FIG. 1 is added to an output buffer circuit showing another embodiment of the present invention, and FIG. 4 is a circuit diagram of a conventional semiconductor memory device. FIG. 3 is a block diagram showing output. In the figure, (2) is the input terminal, (4) is the bonding pad, (5) is the inverter, (6) is the resistive element, and (7)
is a data manual buffer circuit, (8) to (11) are MOS
The transistor (12) is an output buffer circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] 人力データと出力データとの関係を正にするか補にする
かを選択するための専用のボンディングパッドを具備し
、上記ボンディングパッドにボンディングするかしない
かで入力データと出力データの正補の関係を切り換える
切り換え回路を有し、上記切り替え回路と同一チップ上
に形成されたデータ人力バッファ回路、あるいは、出力
バッファ回路にて、上記切り替え回路の出力信号により
、人力データと出力データの正補の関係の切り替えを行
うことを特徴とする半導体記憶装置。
Equipped with a dedicated bonding pad to select whether the relationship between human input data and output data is positive or complementary, and the relationship between input data and output data is corrected or compensated depending on whether or not to bond to the bonding pad. A data manual buffer circuit or an output buffer circuit, which is formed on the same chip as the switching circuit, determines the relationship between manual data and output data by using the output signal of the switching circuit. A semiconductor memory device characterized by performing switching.
JP1085002A 1989-04-03 1989-04-03 Semiconductor storage device Pending JPH02263385A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1085002A JPH02263385A (en) 1989-04-03 1989-04-03 Semiconductor storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1085002A JPH02263385A (en) 1989-04-03 1989-04-03 Semiconductor storage device

Publications (1)

Publication Number Publication Date
JPH02263385A true JPH02263385A (en) 1990-10-26

Family

ID=13846474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1085002A Pending JPH02263385A (en) 1989-04-03 1989-04-03 Semiconductor storage device

Country Status (1)

Country Link
JP (1) JPH02263385A (en)

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