JPH02261209A - Matching device in common use for antenna - Google Patents

Matching device in common use for antenna

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Publication number
JPH02261209A
JPH02261209A JP8336389A JP8336389A JPH02261209A JP H02261209 A JPH02261209 A JP H02261209A JP 8336389 A JP8336389 A JP 8336389A JP 8336389 A JP8336389 A JP 8336389A JP H02261209 A JPH02261209 A JP H02261209A
Authority
JP
Japan
Prior art keywords
matching
circuit
load
antenna
matching circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8336389A
Other languages
Japanese (ja)
Other versions
JP2736112B2 (en
Inventor
Hideyuki Domon
土門 英之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Radio Co Ltd
Original Assignee
Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Radio Co Ltd filed Critical Japan Radio Co Ltd
Priority to JP1083363A priority Critical patent/JP2736112B2/en
Publication of JPH02261209A publication Critical patent/JPH02261209A/en
Application granted granted Critical
Publication of JP2736112B2 publication Critical patent/JP2736112B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To obtain an optimum selectivity by setting an optimum value of a variable capacitor of a primary circuit of a matching circuit. CONSTITUTION:A relay K4 is activated and a frequency from a transmitter 1 is detected, then a preset data set for each frequency is read from a memory 9 and a motor control circuit 8 presets capacitors C1-C4. A load detector 4 and a phase detector 5 adjust the capacitors C1, 2 to activate relays K1-3, and a transmission output is inputted to a secondary, circuit to adjust the capacitors C3, 4, thereby matching the secondary circuit and the transmitter 1. The processing above is repeated alternately and the primary and secondary circuits of the matching circuit 2 respectively converge the output impedance of the transmitter 1 and the impedance of a pseudo load R, thereby completing the matching to the load R. The antenna 6 is matched with the secondary circuit by adjusting the capacitors C3, 4 based on a signal from the detectors 4, 5 with the relays K1-4 inactivated, thereby matching the transmitter 1 and the primary circuit. Thus, optimum selectivity is obtained.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、空中線共用整合装置、特にその高精度整合に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an antenna common matching device, and particularly to high precision matching thereof.

[従来の技術] 第4図は、空中線共用整合の原理を示す。空中線共用整
合においては、複数の送信機IA、IB。
[Prior Art] FIG. 4 shows the principle of antenna common matching. In antenna common matching, multiple transmitters IA, IB.

ICと、整合回路2A、2B、2Cが1本の空中線6に
接続され、各送信機IA、IB、ICはそれぞれ異なる
送信周波数fl、f2.f3で空中線6の共用使用が可
能となる。このような空中線共用整合に使用する整合回
路2A、2B、2Cは自己の送信波に対し送信機出力イ
ンピーダンスを空中線インピーダンスに整合する機能の
他に、次の機能が必要となる。すなわち、送信機IAに
ついて見ると、送信波f1に対して整合回路2Aは他の
共用整合回路群2B、2Cの負荷効果を含めた空中線イ
ンピーダンスに整合動作することと、他の送信波f2.
f3が送信機]Aに入り込むことを阻止する選択特性を
有することである。空中線共用整合を行うためには、各
送信機IA、IBICの分離度を十分に得られる選択特
性を有する整合回路2A、2B、2Cが必要となり、こ
の選択特性が良いほど、各送信機IA、IB、ICの送
信周波数fl、f2.f3の差を小さくできる。
IC and matching circuits 2A, 2B, 2C are connected to one antenna 6, and each transmitter IA, IB, IC has a different transmission frequency fl, f2 . With f3, the antenna 6 can be used in common. The matching circuits 2A, 2B, and 2C used for such antenna common matching must have the following functions in addition to the function of matching the transmitter output impedance to the antenna impedance with respect to its own transmitted waves. That is, regarding the transmitter IA, the matching circuit 2A performs matching operation for the transmission wave f1 to the antenna impedance including the load effect of the other shared matching circuit groups 2B and 2C, and the matching circuit 2A performs matching operation for the transmission wave f1 to the antenna impedance including the load effect of the other shared matching circuit groups 2B and 2C.
f3 has a selection characteristic that prevents it from entering the transmitter ]A. In order to perform antenna common matching, matching circuits 2A, 2B, and 2C are required that have selection characteristics that can sufficiently obtain separation between each transmitter IA and IBIC. IB, IC transmission frequencies fl, f2. The difference in f3 can be reduced.

第5図は、従来の複同調回路を用いた空中線共用整合装
置の概略構成を示す。共用整合回路2はコンデンサC1
,C2とコイルL1で構成される1次回路とコンデンサ
C3,C4とコイルL2でt1■成される2次回路から
成る。また、共用整合回路2は狭帯域のバンドパスフィ
ルタ構成となっており、周波数差を持つ複数の送信機で
空中線の共用使用が可能である。この共用整合回路2と
送信機1の間には、周波数カウンタ3と、負荷検出器4
と位相検出器5とが接続されている。
FIG. 5 shows a schematic configuration of an antenna common matching device using a conventional double-tuned circuit. Shared matching circuit 2 is capacitor C1
, C2 and a coil L1, and a secondary circuit consisting of capacitors C3, C4 and a coil L2. Further, the shared matching circuit 2 has a narrowband bandpass filter configuration, and the antenna can be shared by a plurality of transmitters having different frequencies. A frequency counter 3 and a load detector 4 are connected between the shared matching circuit 2 and the transmitter 1.
and a phase detector 5 are connected.

次に、第5図の整合装置における空中線への整合手順を
以下に示す。
Next, the procedure for matching to the antenna in the matching device shown in FIG. 5 will be described below.

(イ)コンデンサC4を最小値にする。スイッチS1を
閉じる。
(a) Set capacitor C4 to the minimum value. Close switch S1.

(ロ)周波数カウンタ3で送信周波数を測定し、測定周
波数に基づきコンデンサC1,C2゜C3をプリセット
する。
(b) Measure the transmission frequency with the frequency counter 3, and preset the capacitors C1, C2 and C3 based on the measured frequency.

(ハ)位相検出器5の出力により、コンデンサC2を制
御し、コイルL1と並列同調させる。
(c) The capacitor C2 is controlled by the output of the phase detector 5 and tuned in parallel with the coil L1.

(ニ)スイッチS1を開放、位相検出器5の出力による
コンデンサC3の制御と負荷検出器4の出力によるコン
デンサC4の制御によって空中線6に整合させる。
(d) Switch S1 is opened, and matching with antenna 6 is achieved by controlling capacitor C3 using the output of phase detector 5 and controlling capacitor C4 using the output of load detector 4.

上記の手順(ロ)、(ハ)において、1次回路のコンデ
ンサC1,、C2が決定されるが、1次回路を考える場
合、1次回路に対する2次回路の負荷効果を考慮しなけ
ればならず、また、この負荷効果は送信機1と空中線6
との整合においても重要な意味を持つ。すなわち、送信
機1と空中線6との整合は上記手順(ニ)において、2
次回路のコンデンサC3,C4を制御し、送信機1と1
次回路の整合を行うことによって達成されるが、これは
1次回路に対する2次回路の負荷効果の変動を利用する
ものである。
In the above steps (b) and (c), the capacitors C1, C2 of the primary circuit are determined, but when considering the primary circuit, the load effect of the secondary circuit on the primary circuit must be considered. Also, this loading effect affects the transmitter 1 and the antenna 6.
It also has an important meaning in terms of consistency. That is, the matching between the transmitter 1 and the antenna 6 is performed in step 2 in the above procedure (d).
Controls capacitors C3 and C4 in the next circuit, transmitters 1 and 1
This is achieved by matching the secondary circuit, which takes advantage of variations in the loading effect of the secondary circuit on the primary circuit.

従って、2次回路のコンデンサC3,C4の制御によっ
て、1次回路と送信機1が整合したとき、2次回路と空
中線6との整合が達成されるように、1次回路のコンデ
ンサCI、C2を設定する必要があり、空中線6への整
合精度はコンデンサC1゜C2の設定精度に依存する。
Therefore, by controlling the capacitors C3 and C4 of the secondary circuit, when the primary circuit and the transmitter 1 are matched, matching between the secondary circuit and the antenna 6 is achieved. The accuracy of matching to the antenna 6 depends on the accuracy of setting the capacitors C1 and C2.

従来の整合手順においては、手順(イ)でコンデンサC
4を最小として空中線から見たインピーダンスを大とし
、スイッチS1を閉じることによって1次回路に対する
2次回路の影響を避け、手順(ロ)、(ハ)にお・いて
1次回路単独でコンデンサCI、C2を決定している。
In the conventional matching procedure, capacitor C is
4 as the minimum to increase the impedance seen from the antenna, and close switch S1 to avoid the influence of the secondary circuit on the primary circuit. , C2 are determined.

そのため、コンデンサc1と02を設定後、コンデンサ
C2とコイルL2との同調を行い、コンデンサC2の再
調整を行う際に、スイッチs1で短絡されているコイル
L2の影響は避けられない。
Therefore, after setting the capacitors c1 and 02, when tuning the capacitor C2 and the coil L2 and readjusting the capacitor C2, the influence of the coil L2 short-circuited by the switch s1 cannot be avoided.

更に、従来の装置においては、2次回路の整合状態を検
出する方法がないため、1次回路で得られたコンデンサ
CI、C2が妥当な値であるがを確認することはできな
かった。
Furthermore, in the conventional device, since there is no method for detecting the matching state of the secondary circuit, it has not been possible to confirm that the capacitors CI and C2 obtained in the primary circuit are appropriate values.

[発明が解決しようとする課題] 従来の空中線整合装置は、以上のような構成たったので
、共用整合回路の可変コンデンサの設定が妥当な値であ
るか否かを確認することが不能で、空中線との整合状態
が得られず、選択特性が不十分であるという問題点があ
った。
[Problems to be Solved by the Invention] Since the conventional antenna matching device has the above configuration, it is impossible to check whether the setting of the variable capacitor of the shared matching circuit is a reasonable value, and the antenna There was a problem in that a state of consistency could not be obtained and the selection characteristics were insufficient.

この発明は、かかる問題点を解決するためになされたも
ので、共用整合回路の可変コンデンサ値を正確に求め、
高精度な空中線との整合を実現し、充分な選択特性を得
られる空中線共用整合装置を提供することを目的とする
This invention was made to solve such problems, and it is possible to accurately determine the variable capacitor value of the shared matching circuit.
It is an object of the present invention to provide an antenna common matching device that achieves high-precision antenna matching and obtains sufficient selection characteristics.

[課題を解決するための手段] この発明による空中線共用整合装置は、共用整合回路の
調整時に接続される擬似負荷器と、送信側から見たイン
ピーダンスを検出する負荷検出器と位相検出器と前記擬
似負荷器とを共用整合回路の1次側と2次側とに選択的
に切り替え接続する手段と、前記負荷検出器と位相検出
器よりの信号に基づいて、共用整合回路の可変コンデン
サ駆動モータを制御するモータ制御回路に制御信号を出
力するマイクロコンピュータとを有するものである。
[Means for Solving the Problems] An antenna common matching device according to the present invention includes a pseudo load device connected during adjustment of a common matching circuit, a load detector for detecting impedance seen from the transmitting side, a phase detector, and the above-mentioned. means for selectively switching and connecting a pseudo load to a primary side and a secondary side of a shared matching circuit; and a variable capacitor drive motor of the shared matching circuit based on signals from the load detector and the phase detector. and a microcomputer that outputs a control signal to a motor control circuit that controls the motor.

また、この発明による空中線共用整合装置は、送信側か
ら見たインピーダンスを検出する負荷検出器と位相検出
器との信号に基づいて、共用整合回路の可変コンデンサ
駆動モータを制御するモータ制御回路に制御信号を出力
するマイクロコンピュータと、送信機から擬似負荷器へ
の出力を検出して、共用整合回路の2次側の調整を可能
にする出力検出器とを有するものである。
Further, the antenna common matching device according to the present invention provides control to a motor control circuit that controls the variable capacitor drive motor of the common matching circuit based on signals from a load detector and a phase detector that detect the impedance seen from the transmitting side. It has a microcomputer that outputs a signal, and an output detector that detects the output from the transmitter to the pseudo load and makes it possible to adjust the secondary side of the shared matching circuit.

[作用] この発明によれば、擬似負荷器を共用整合回路°の2次
側に接続して精密整合するので負荷効果は最小直となり
、1次回路の可変コンデンサの設定が正確に求められる
[Operation] According to the present invention, the pseudo loader is connected to the secondary side of the shared matching circuit for precision matching, so that the load effect is minimized and the setting of the variable capacitor of the primary circuit can be accurately determined.

従って、最良の選択特性が達成できるものとなる。Therefore, the best selection properties are achievable.

第1の発明においては、負荷検出器と位+rJ検出器と
擬似負CI器を共用整合回路の1次回路と2次回路とに
交互に接続して送信機の送信波を交互に入力することに
より、各可変コンデンサを調整して精密整合を行う。
In the first invention, the load detector, the +rJ detector, and the pseudo-negative CI device are alternately connected to the primary circuit and secondary circuit of the shared matching circuit, and the transmitted waves of the transmitter are alternately inputted. adjust each variable capacitor for precise matching.

第2の発明によれば、共用整合回路の2次回路を介して
擬似負荷器に送信機から得られる出力を検出する出力検
出器を用いて簡略に整合し、この場合第1の発明の回路
構成に比較して簡略化され、整合動作も簡単となる。
According to the second invention, matching is simply performed using an output detector that detects the output obtained from the transmitter to the pseudo load via the secondary circuit of the shared matching circuit, and in this case, the circuit of the first invention The structure is simplified compared to the configuration, and the matching operation is also simple.

いずれの場合も、あらかじめ周波数カウンタからの情報
に基づいて、共用整合回路の可変コンデンサを整合状態
の近くにプリセットする機能、例えばメモリを設ければ
、高速な整合が可能となる。
In either case, high-speed matching can be achieved by providing a function, for example, a memory, to preset the variable capacitor of the shared matching circuit near the matching state based on information from the frequency counter.

[実施例] 次に第1図、第2図及び第3図に示すこの発明の一実施
例に基づいて、この発明を更に詳細に説明する。
[Example] Next, the present invention will be described in more detail based on an example of the present invention shown in FIGS. 1, 2, and 3.

第1図は、この発明による共用整合回路2の整合の基本
回路である。同図に示す通りこの発明によれば、共用整
合回路2の2次回路に擬似負n:j器Rを接続して、負
荷効果を最小とした状態で、共用整合回路2の1次回路
に送信機1よりの送信波を入力して、1次回路の可変コ
ンデンサc1とC2を正確に設定するものである。
FIG. 1 shows a basic matching circuit of a shared matching circuit 2 according to the present invention. As shown in the figure, according to the present invention, a pseudo negative n:j resistor R is connected to the secondary circuit of the shared matching circuit 2, and the primary circuit of the shared matching circuit 2 is connected with the load effect minimized. The transmission wave from the transmitter 1 is input to accurately set the variable capacitors c1 and C2 of the primary circuit.

この発明の思想を具体化した実施例が、第2図及び第3
図に示されている。第2図は第1の1清水項の最適実施
例、第3図は請求項(2)項の最適実施例を示すもので
ある。
Examples embodying the idea of this invention are shown in Figures 2 and 3.
As shown in the figure. FIG. 2 shows an optimal embodiment of the first 1-Shimizu term, and FIG. 3 shows an optimal embodiment of claim (2).

第2図において、送信機1の出力は、送信周波数を検出
する周波数カウンタ3、送信機から見た入力インピーダ
ンスを検出する負荷検出器4および位tU検出器5を経
て、整合回路2に入力される。
In FIG. 2, the output of the transmitter 1 is input to the matching circuit 2 via a frequency counter 3 that detects the transmission frequency, a load detector 4 that detects the input impedance seen from the transmitter, and a tU detector 5. Ru.

リレーに4は空中線6又は擬似負荷器Rへ送信出力を切
り換える。
Relay 4 switches the transmission output to antenna 6 or pseudo load R.

整合回路2の1次回路の可変コンデンサC1゜C2の整
合値を求める時は、リレーに4をONにして擬似負荷器
Rを使用する。切り替え接続する手段を形成するリレー
Kl、に2.に3は連動し、整合回路2の1次回路か2
次回路へ送信出力を選択的に切り換えて入力する。
When determining the matching value of the variable capacitor C1°C2 in the primary circuit of the matching circuit 2, turn on relay 4 and use the pseudo load R. 2. to a relay Kl forming means for switching connection; 3 is interlocked with the primary circuit of matching circuit 2 or 2.
Selectively switch and input the transmission output to the next circuit.

整合動作は、空中線6への整合を行う準備として擬似負
6り器Rへの整合を行い、1次回路のコンデンサCI、
C2の最適値を求めた後、空中線6との整合が行われる
In the matching operation, in preparation for matching to the antenna 6, matching is performed to the pseudo negative amplifier R, and the primary circuit capacitor CI,
After determining the optimum value of C2, matching with the antenna 6 is performed.

まず、リレーに4をONとし、送信機1からの送信周波
数を周波数カウンタ3で検出し、あらかじめ周波数ごと
に設定されているブリセットデータをメモリ9から読み
出しモータ制御回路8を動作させて、コンデンサCI、
C2,C3,C4をプリセット値に設定する。次に、負
荷検出器4および位相検出器5からの信号に基づいてコ
ンデンサC1,C2を調整し、1次回路の整合が完了後
、リレーK1.、に2.に3をONにして送信出力を2
次回路に入力し、1次回路と同様にコンデンサCB、C
4を調整し、2次回路と送信機1との整合を行う。この
1次回路と2次回路の整合を交互にくり返すことによっ
て、整合回路2の1次回路と2次回路はそれぞれ送信機
1の出力インピーダンス(50Ω)および擬似負荷器R
のインピーダンス(50Ω)に収束し擬似負荷器Rへの
整合を終える。この時、1次回路のコンデンサci、c
2は最適値を得る。
First, turn ON the relay 4, detect the transmission frequency from the transmitter 1 with the frequency counter 3, read the preset data for each frequency from the memory 9, operate the motor control circuit 8, and CI,
Set C2, C3, and C4 to preset values. Next, the capacitors C1 and C2 are adjusted based on the signals from the load detector 4 and the phase detector 5, and after the matching of the primary circuit is completed, the relay K1. , to 2. Turn on 3 and set the transmission output to 2.
Input into the next circuit and capacitors CB and C as in the primary circuit.
4 to match the secondary circuit and transmitter 1. By repeating this matching of the primary circuit and the secondary circuit alternately, the primary circuit and the secondary circuit of the matching circuit 2 are connected to the output impedance (50Ω) of the transmitter 1 and the pseudo load R, respectively.
The impedance converges to (50Ω) and the matching to the pseudo load R is completed. At this time, the capacitors ci, c of the primary circuit
2 obtains the optimal value.

空中線6への整合は、リレーKl、に2.に3゜K4を
OFFとし、負荷検出器4および位相検出器5からの信
号に基づいてコンデンサC3,C4を調整し、送信機1
と1次回路の整合を行うことによって、2次回路と空中
線6の整合が行われる。
Matching to the antenna 6 is performed by relay Kl, 2. 3°K4 is turned OFF, capacitors C3 and C4 are adjusted based on the signals from load detector 4 and phase detector 5, and transmitter 1
By matching the primary circuit with the antenna 6, the secondary circuit and the antenna 6 are matched.

以上の動作はマイクロコンピュータ7によって自動制御
され、空中線インピーダンスの変動に対しても1次回路
の整合状態を維持することで、自動追尾が可能である。
The above operations are automatically controlled by the microcomputer 7, and automatic tracking is possible by maintaining the matching state of the primary circuit even when the antenna impedance changes.

このように、整合動作が開始されると、整合回路2のコ
ンデンサC1,C2,C3,C4は、あらかじめ算出さ
れたプリセットデータに基づいてプリセットされるが、
プリセットデータはコンデンサCI、C2についてメモ
リされている。擬似負荷器Rのインピーダンスを送信機
1の出力インピーダンス(50Ω)とすることで、整合
回路は対称回路と考えられるため、コンデンサCI、C
2、C3,C4のプリセットはC1−C4、C2−C5
とする。プリセット後、1次回路の整合と2次回路の整
合を1ステツプとし2次回路の整合後、1次回路の整合
をする必要がなくなるまでこのステップをくり返し、整
合状態に収束させる。
In this way, when the matching operation is started, the capacitors C1, C2, C3, and C4 of the matching circuit 2 are preset based on preset data calculated in advance.
Preset data is stored for capacitors CI and C2. By setting the impedance of the pseudo load R to the output impedance (50Ω) of the transmitter 1, the matching circuit can be considered to be a symmetrical circuit, so the capacitors CI and C
2, C3, C4 presets are C1-C4, C2-C5
shall be. After presetting, matching of the primary circuit and matching of the secondary circuit are made into one step, and after matching the secondary circuit, this step is repeated until it is no longer necessary to match the primary circuit to converge to a matching state.

コンデンサC1,C4は可変負荷素子、コンデンサC2
,C3は可変位相素子として働く。
Capacitors C1 and C4 are variable load elements, capacitor C2
, C3 act as variable phase elements.

以上の整合動作4こよって2次回路が整合状態にあると
きに1次回路が送信機に整合するための01、C2の値
が求まり、この値に固定される。空中線6への結合にお
いては、2次回路のコンデンサC3,C4の調整によっ
て、1次回路への負荷効果を最小にすれば、1次回路と
送信機1の整合ができ、この時、2次回路と空中線6と
の整合も同時に達成される。従って、−度1次回路のコ
ンデンサCI、C2が求められると、空中線インピーダ
ンスの変動に対してもコンデンサC3,C4の調整によ
り1次回路の整合を維持することによって、最良の選択
特性を維持したまま自動追尾が可能となる。
As a result of the above matching operation 4, the values of 01 and C2 for matching the primary circuit to the transmitter when the secondary circuit is in the matching state are determined and fixed to these values. When coupling to the antenna 6, the primary circuit and transmitter 1 can be matched by adjusting capacitors C3 and C4 in the secondary circuit to minimize the load effect on the primary circuit. Matching of the circuit and the antenna 6 is also achieved at the same time. Therefore, when the capacitors CI and C2 of the −degree primary circuit are determined, the best selection characteristics can be maintained by maintaining the matching of the primary circuit by adjusting capacitors C3 and C4 even when the antenna impedance changes. Automatic tracking is now possible.

第3図において、1次回路のコンデンサCI。In FIG. 3, the capacitor CI of the primary circuit.

C2を求める手段は第2図に示した実施例と同様に、擬
似負荷器Rへの整合による。
The means for determining C2 is based on matching to the pseudo load R, as in the embodiment shown in FIG.

まず、リレーに4をONにして、送信周波数に基づいて
、コンデンサC1,C2,C3、C4をプリセットし、
負荷検出器4および位相検出器5の信号に基づいてコン
デンサC1,C2を調整し、送信機1と1次回路の整合
を行う。
First, turn on relay 4 and preset capacitors C1, C2, C3, and C4 based on the transmission frequency.
The capacitors C1 and C2 are adjusted based on the signals from the load detector 4 and the phase detector 5, and the transmitter 1 and the primary circuit are matched.

次に、2次回路と擬似負荷器Rとの整合は、送信機1か
ら擬似負荷器Rへの送信出力を検出する出力検出器10
からの出力をコンデンサC3,C4の調整によって最大
とすることで、2次回路と擬似負荷器Rとの整合が行わ
れる。この1次回路と2次回路の整合を交互にくり返す
ことによって、第2図に示す実施例と同様の結果が得ら
れる。なお、空中線6への整合は第2図に示す実施例と
同様の方法で行われ、以上の動作はマイクロコンピュー
タ9によって自動制御される。
Next, matching between the secondary circuit and the pseudo load R is performed by the output detector 10 that detects the transmission output from the transmitter 1 to the pseudo load R.
By maximizing the output from the capacitors C3 and C4, matching between the secondary circuit and the pseudo load R is achieved. By repeating this matching of the primary circuit and the secondary circuit alternately, a result similar to that of the embodiment shown in FIG. 2 can be obtained. The alignment with the antenna 6 is performed in the same manner as in the embodiment shown in FIG. 2, and the above operation is automatically controlled by the microcomputer 9.

上記の通りこの発明によれば、擬似負荷器を共用整合回
路の2次側に接続して負荷効果を最小として、整合回路
2の1次回路の可変コンデンサC1、C2を整合させる
ので正確な設定ができ、選択特性の良い装置が得られる
As described above, according to the present invention, the pseudo loader is connected to the secondary side of the shared matching circuit to minimize the load effect, and the variable capacitors C1 and C2 of the primary circuit of the matching circuit 2 are matched, so that accurate settings can be made. A device with good selection characteristics can be obtained.

[発明の効果] この発明は以上説明した通り、整合回路の1次回路の可
変コンデンサの最適値を設定できる構造としたため、空
中線への精密なインピーダンス整合が可能とな、す、最
適な選択特性を持つ、た装置を提供できる効果が得られ
る。
[Effects of the Invention] As explained above, this invention has a structure in which the optimum value of the variable capacitor in the primary circuit of the matching circuit can be set, so that precise impedance matching to the antenna is possible, and optimum selection characteristics are achieved. This has the effect of providing a device with

また、マイクロコンピュータによる自動整合、及び可変
コンデンサのプリセットを行うことで、高速な整合動作
が可能となる効果も得られる。
Further, by performing automatic matching using a microcomputer and presetting the variable capacitor, it is possible to achieve the effect of enabling high-speed matching operation.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明によるインピーダンス整合の基本回路
図、 第2図はこの発明の第1請求項の一実施例を示すブロッ
ク構成図、 第3図はこの発明の第2請求項に相応な一実施例のブロ
ック構成図、 第4図は空中線共用整合の概念を示す説明図、第5図は
従来の空中線共用整合装置のブロック構成図である。 1 ・・・ 送信機 2 ・・・ 空中線共用整合回路 3 ・・・ 周波数カウンタ 4 ・・・ 負荷検出器 5 ・・・ 位相検出器 6 ・・・ 空中線 7 ・・・ マイクロコンピュータ 8 ・・・ モータ制御回路 9 ・・・ メモリ 10 ・・・ 出力検出器 CI、C2,C3,C4・・・ 可変−iンデンサL1
.  L2  ・・・ コイル R・・・ 擬似負荷器
FIG. 1 is a basic circuit diagram of impedance matching according to the present invention, FIG. 2 is a block diagram showing an embodiment of the first claim of the present invention, and FIG. 3 is a basic circuit diagram of an impedance matching according to the present invention. FIG. 4 is an explanatory diagram showing the concept of antenna common matching, and FIG. 5 is a block diagram of a conventional antenna common matching device. 1 ... Transmitter 2 ... Antenna common matching circuit 3 ... Frequency counter 4 ... Load detector 5 ... Phase detector 6 ... Antenna 7 ... Microcomputer 8 ... Motor Control circuit 9... Memory 10... Output detector CI, C2, C3, C4... Variable-i capacitor L1
.. L2... Coil R... Pseudo load device

Claims (2)

【特許請求の範囲】[Claims] (1)空中線と複数の送信機との間に接続され単一の空
中線を共用する整合回路と、送信機から共用整合回路に
入力される送信波の周波数を検出する周波数検出器と、
送信側から負荷側をみたインピーダンス値を検出する負
荷検出器と、送信側から負荷側をみたインピーダンスの
位相を検出する位相検出器と、これらの検出器からの信
号に応じて共用整合回路の動作状態および整合状態を検
知して共用整合回路を制御する信号を出力するマイクロ
コンピュータと、共用整合回路の調整時に接続される擬
似負荷器と、前記周波数検出器と負荷検出器と位相検出
器と擬似負荷器とを共用整合回路の一次側又は二次側に
選択的に切り替え接続する手段と、前記マイクロコンピ
ュータの出力する信号に応じて共用整合回路の可変コン
デンサを駆動調整する駆動モータを制御するモータ制御
回路とを備える空中線共用整合装置。
(1) A matching circuit that is connected between an antenna and a plurality of transmitters to share a single antenna, and a frequency detector that detects the frequency of a transmission wave input from the transmitter to the shared matching circuit;
A load detector detects the impedance value seen from the transmitting side to the load side, a phase detector detects the phase of the impedance seen from the transmitting side to the load side, and the operation of the shared matching circuit according to the signals from these detectors. a microcomputer that detects the state and matching state and outputs a signal for controlling the shared matching circuit; a pseudo load device that is connected when adjusting the shared matching circuit; the frequency detector, the load detector, the phase detector and the pseudo load device; means for selectively switching and connecting the load device to the primary side or the secondary side of the shared matching circuit; and a motor for controlling a drive motor that drives and adjusts the variable capacitor of the shared matching circuit in accordance with the signal output from the microcomputer. An antenna common matching device comprising a control circuit.
(2)空中線と複数の送信機の間に接続される共用整合
回路と、送信機から共用整合回路に入力される送信波の
周波数を検出する周波数検出器と、送信側から負荷側を
みたインピーダンス値を検出する負荷検出器と、送信側
から負荷側をみたインピーダンスの位相を検出する位相
検出器と、これらの検出器からの信号に応じて共用整合
回路の動作状態及び整合状態を検知して共用整合回路を
制御する信号を出力するマイクロコンピュータと、共用
整合回路の調整時に接続される擬似負荷器と、送信機か
ら前記擬似負荷器への出力を検出する出力検出器と、前
記マイクロコンピュータの出力する信号に応じて共用整
合回路の可変コンデンサを駆動調整する駆動モータを制
御するモータ制御回路とを備える空中線共用整合装置。
(2) A common matching circuit connected between the antenna and multiple transmitters, a frequency detector that detects the frequency of the transmitted wave input from the transmitter to the common matching circuit, and an impedance seen from the transmitting side to the load side. A load detector detects the impedance value, a phase detector detects the phase of the impedance seen from the transmitting side to the load side, and the operating state and matching state of the shared matching circuit are detected according to the signals from these detectors. a microcomputer that outputs a signal for controlling the shared matching circuit; a pseudo load connected when adjusting the shared matching circuit; an output detector that detects an output from a transmitter to the pseudo load; An antenna shared matching device comprising a motor control circuit that controls a drive motor that drives and adjusts a variable capacitor of the shared matching circuit in accordance with an output signal.
JP1083363A 1989-03-31 1989-03-31 Automatic alignment method Expired - Fee Related JP2736112B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1083363A JP2736112B2 (en) 1989-03-31 1989-03-31 Automatic alignment method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1083363A JP2736112B2 (en) 1989-03-31 1989-03-31 Automatic alignment method

Publications (2)

Publication Number Publication Date
JPH02261209A true JPH02261209A (en) 1990-10-24
JP2736112B2 JP2736112B2 (en) 1998-04-02

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ID=13800345

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Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2736112B2 (en)

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Patent Citations (1)

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