JPH0225565B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a switched capacitor filter that can be monolithically mounted on a semiconductor substrate even if it has strict specification conditions in the pass frequency band or environmental conditions that prevent sufficient element precision from being obtained. We would like to propose a new switch capacitor filter that can be configured with high yield.

(Background Art) An example of a conventionally proposed differential input switch capacitor integration circuit is shown in FIG. This circuit consists of a capacitor _C1 , an inverting input terminal m, and a normal input terminal p.
An integrating capacitor _C2 is connected between the inverting input terminal m and the output terminal O of an operational amplifier A having a large gain and an output terminal O, and a non-inverting input terminal p of the operational amplifier A is grounded. This is an integrating circuit configured such that a signal output terminal is derived from an output terminal O, and switches S ₁ ,
By sequentially switching the movable contacts w ₁ and w ₂ of S ₂ to the fixed contacts x ₁ and x ₂ and then to the other fixed contacts y ₁ and y 2, the movable contacts w ₁ and _{w 2 of} the switch are fixed. Contact x ₁ ,
When on the y ₁ side, the capacitor C ₁ is charged with a charge corresponding to the magnitude of the input signal given to the signal input terminal T ₁ , and the movable contacts of the switches S ₁ and S ₂
When w ₁ and w ₂ are switched to the fixed contacts x ₂ and y ₂ , the capacitor C ₁ stores a charge corresponding to the magnitude of another input signal applied to the signal input terminal T ₂ . Therefore, at that time, the capacitor _C1 transfers a charge corresponding to the voltage difference between the two input signals to the capacitor _C2 of the integrating circuit, and the integrated output is delivered to the signal output terminal _T3 .

The signal voltage V ₁ at the two input terminals of this integrator
(z), V ₂ (z) and the output terminal voltage V ₀ (z) is expressed in the z variable domain, V ₀ (z) = z ^-1/2 /1 - z ^-1 C ₁ /C ₂ (V ₁ (z) − V ₂ (z)
)(1) have the following relationship. That is, the transmission from input terminal T ₁ to signal output terminal T ₃ is a negative phase integrator, and the transmission from input terminal T ₂ to signal output terminal T ₃ is a positive phase integrator, and these are one capacitor C ₁ and via a switch.

Figure 2 shows a leapfrog type switch capacitor filter constructed using such a differential input integrator (Jacobs, GMetal.
“Design Techniques for MOS Switched
Capcitor Ladder Filters”IEEE.Trans., CAS
−25 P1014 (DEC1978)). This leapfrog configuration circuit is a double-terminated resistor as shown in Figure 3.
This is a circuit that simulates the operation of an LC filter. That is, the voltage at each part of the LC filter shown in Fig. 4,
In the current signal flow graph, the output of each integrator represents the voltage V ₁ at the node n ₁ in FIG. 3, the current I ₂ flowing through the inductor L, and the voltage V ₃ at the node n ₂ in FIG. Point A in the signal flow graph of FIG. 4 represents the capacitor current in the LC filter of FIG. 3, and the following relationship holds: SC ₁ V ₁ =E/R-V ₁ /R+I ₁ (2).

In Fig. 4, taking as an example the case where both terminal resistors have the same resistance value 1, each reactance element is represented by an integrator, and the input signal voltage E is in the positive phase of the first integrator _M1 . Therefore, it is considered that the output of the second integrator _M2 is input in reverse phase. Similarly, the outputs of the first and third integrators are input to the second integrator _M2 in positive phase and negative phase, respectively, and the outputs of the third integrator
In _M3 , the outputs of the second and third integrators are each in positive phase,
This is a signal flow graph in which the input is in reverse phase.

The leapfrog configuration circuit as shown in Fig. 2 converts the integrator of the positive phase and negative phase inputs in the signal flow graph of the resistor double-terminated LC filter shown in Fig. 4 into the positive phase and negative phase input as shown in Fig. 1. This is a filter circuit constructed by replacing the differential input switch with a capacitor integrating circuit.

In FIG. 2, the _first
The integrator circuit M ₁ includes a capacitor C ₁ with a switch.
and capacitor C ₂ are connected to the input signal voltage and the second integration circuit through one capacitor C ₁
The output of _M2 is the first integrator circuit with positive phase and negative phase, respectively.
In the differential input integrator shown in Figure ₁ , capacitor _C2 is used as the positive phase input terminal.
By grounding T ₂ , only the function of negative phase integral input from the first integrating circuit M ₁ to the first integrating circuit M ₁ is realized. Similarly, capacitor C ₄ ,
Differential input integrator circuit M ₂ consisting of C ₅ and differential input integrator circuit M ₃ consisting of capacitors C ₆ and C ₇
are constructed to simulate integrators M ₂ and M ₃ having positive-phase and negative-phase inputs in the signal flow graph of FIG.

By the way, as an index for determining the quality of a filter, the relative fluctuation of the frequency amplitude characteristic |T(z)| with respect to the relative fluctuation (Δx/x) of the element x (capacitors C ₁ to C 7 in Figure ₂ ) (Δ|T(z)|/|T
The relative element sensitivity S| ^T(z) | _x S| ^T(z) | _x = lim Δx→OΔ|T(z)|/|T(z) is the limit value of the ratio of (z)|) |/Δx/x = x/|T(z)| ∂|T(z)|/∂x is used. In the case of such a leapfrog type switched capacitor filter, the sum of the absolute values of the relative element sensitivities S| T( _z ⁾ | It has the characteristic of being able to
In a resistor-double-terminated LC filter, when the filter is in a matching state, the sensitivity with respect to the amplitude characteristics of the reactance element is zero. This resistor has both ends
Even in a leapfrog configuration circuit obtained by simulating an LC filter, the sensitivity to the amplitude characteristic of the integral constant of the integrating circuit corresponding to the reactance element has the characteristic that it becomes zero at the frequency point where the filter is in a matching state. It becomes a filter with low sensitivity in the pass frequency band. However, in a resistor double-terminated LC filter, even if the filter is in a matching state, the element sensitivity of the termination resistor is not zero, and the second
Even in the leapfrog configuration circuit shown in the figure, the sensitivity to the amplitude characteristics of the capacitors C ₁ and C ₂ simulating the input-side terminating resistance does not become zero even in a matched state.

(Problems to be solved by the invention) The present invention eliminates the above-mentioned drawbacks, and the sum of the absolute values of element sensitivities is extremely small in the pass frequency band, and especially at the center frequency, all elements including the element corresponding to the terminating resistor It is an object of this invention to propose a zero-low frequency and bandpass switched capacitor filter circuit with zero amplitude sensitivity.

(Structure and operation of the invention) In order to achieve the above object, the present invention uses the principles shown below. In a differential input integrating circuit as shown in Fig. 1, which receives positive-phase and negative-phase inputs through one capacitor _C1 , at a certain frequency point, a positive-phase input signal V ₁ (z) and a negative-phase input signal V ₂ ( z)
have the same values including phase and amplitude, the movable contacts w ₁ and _{w 2} of switches S ₁ and S ₂ are the fixed contacts x ₁ and x ₂
The voltage is always the same when the movable contacts w ₁ and w ₂ of switches S ₁ and S ₂ are switched to the fixed contacts y ₁ and y ₂ , and the charge is proportional to the magnitude of the input voltage. is stored, but no charge is transferred to capacitor _C2 of the integrating circuit. Therefore, the value of the capacitance of capacitor C ₁ is irrelevant to the operation of the integrator at this time, and the element sensitivity of capacitor C ₁ becomes zero at the frequency point where the positive-phase input signal and the negative-phase input signal are the same. .

Based on the above principle, the present invention maintains the same basic structure in order to maintain low sensitivity in the pass frequency band of the leap-frog configuration circuit, but uses capacitors to provide positive and negative phase inputs to all differential input integrators. Both positive phase and negative phase input signals are input to
Moreover, improvements have been made so that the voltage values of the positive-phase and negative-phase input signals are equal at the center frequency.
This is a switch capacitor filter configured so that all element amplitude sensitivities are zero at the center frequency.

FIG. 5 shows a first embodiment of the invention. True aspect,
An example of a differential input integrator with negative phase input is when four integrating circuits shown in Fig. 2 are used, and the first integrating circuit _M1 is connected to capacitors _C1 and _C2 for differential input. The input signal voltage E(z) is connected to the positive phase input via capacitor _C1 , the output voltage _V1 (z) of the first integrating circuit _M1 is connected to the negative phase input, and the positive phase input via capacitor _C2 is connected to the input signal voltage E(z). Input signal voltage E(z) is used for the phase input, and second integration circuit M ₂ is used for the negative phase input.
is connected to the output voltage V ₂ (z) of the second integrator circuit.
One differential input capacitor called capacitor _C4 is connected to _M2 , and the first integration circuit is connected to the positive phase input.
The output voltage V ₁ (z) of M ₁ is connected to the negative phase input, and the output voltage V ₃ (z) of the third integration circuit M ₃ is connected to the _third integration circuit M ₃ . A differential input capacitor is connected, the output voltage V ₂ (z) of the second integrating circuit M ₂ is connected to the positive phase input, and the output voltage V ₄ (z) of the fourth integrating circuit M ₄ is connected to the negative phase input. is connected,
One differential input capacitor, which becomes capacitor _C8 , is connected to the fourth integrating circuit M ₄ , and the output voltage V 3 (z) of the third integrating circuit M 3 is connected to the positive phase input, and the output voltage V ₃ (z) of the third integrating circuit M ₃ is connected to the negative phase input. is connected to the output voltage V ₄ (z) of the fourth integration circuit M ₄ . The output is derived from the output voltage of the fourth integrating circuit _M4 .

The above is the configuration of the first embodiment of the present invention,
With such a configuration, a filter with a 4th-order non-polar low-pass characteristic can be constructed, but since each integrating circuit has an extremely large gain at direct current with a frequency of zero, which is the center frequency, the output voltage of each integrating circuit is If is a finite value, there is no charge transfer from the differential input capacitor in each integrating circuit to the capacitor connected between the inverting input terminal and output terminal of the operational amplifier of each integrating circuit. Integrating circuits having one differential input capacitor such as the second, third, and fourth capacitors operate with equal DC voltage applied to the differential input terminals due to the properties of the differential input integrating circuit described above.

Since the voltages applied to the differential input terminals of the second, third, and fourth differential input integrators are equal in direct current, V ₁ (z) = V ₃ (z) (4) V ₂ (z) = V ₄ (z) (5) V ₃ (z)=V ₄ (z) (6). From equations (4) to (6), V ₁ (z) = V ₂ (z) = V ₃ (z) = V ₄ (z) (7) holds true. Furthermore, the charge transfer from the two differential input capacitors C ₁ and C ₂ connected to the first integration circuit to the capacitor C ₃ is not carried out using direct current with a frequency of zero, but is instead C ₁ (E(z)−V ₁ ). (z)) +C ₂ (E(z)-V ₂ (z)) = 0 (8) holds, and from equations (7) and (8), the output voltages of all the integrating circuits are input as DC signals with zero frequency. Voltage E(z)
is equal to Therefore, all the differential input capacitors of the differential input integrating circuit satisfy the principles related to the present invention described above. Furthermore, in the circuit configuration shown in FIG. 5, if the capacitors C ₁ and C ₂ , which have the role of inputting the input signal voltage to the circuit, are removed, the role of inputting the input signal voltage to the circuit in the conventional leapfrog configuration circuit can be eliminated. This corresponds to a circuit in which the part with the same part is removed in the same way. Therefore, with such a configuration, the filter has low sensitivity in the pass frequency band, and the sensitivity of the integral constant is zero at direct current with a frequency of zero. Therefore, since the element sensitivities of the capacitors C ₃ , C ₅ , C ₇ , and C ₈ that determine the integral constants are also zero, it is possible to realize a filter that has no element sensitivity at all at the DC frequency, which is the center frequency.

In the above, a configuration example using four integrating circuits was shown as an embodiment of the present invention regarding a low-pass filter, but even when N general integrating circuits are used, the first integral input signal voltage is input. The invention can be practiced using similar circuit configurations. Please note that during actual production, the switch
Since the potentials of S ₁₂ and S ₁₃ are always equal, they can be replaced with one switch.

FIG. 6 shows a second embodiment of the invention. As in the first embodiment, the differential input integrator having positive phase and negative phase inputs is an example in which four integrating circuits shown in FIG. 2 are used, and the first and second integrating circuits M ₁ , M ₂ and Third
and fourth integrating circuits M ₃ and M ₄ form a pair, and the output voltage V ₁ (z) of the first integrating circuit M ₁ is positively supplied to the second integrating circuit M ₂ via the capacitor C ₃ . input as a phase input, and furthermore, the output voltage of the integrating circuit _M2
The basic structure is a loop in which V ₂ (z) is input as a negative phase input to the first integrating circuit M ₁ via the capacitor C ₄ , and the same applies to the third and fourth integrating circuits M ₃ and M ₄ . It has a basic structure of a loop structure, and selects the input and output of the first integrating circuit _M1 and the input and output of the third integrating circuit _M3 as the input and output of these two basic structures, respectively, Similar to the configuration of the low-pass filter shown in the first embodiment of the present invention, the input of the first basic structure including the first and second integrating circuits M ₁ and M ₂ , that is, the first integrating circuit M ₁ The input signal voltage is input in positive phase to the input terminal of , through one capacitor C ₁ , and the output of the first basic structure, that is, the output of the first integrating circuit M ₁ is input in reverse phase, and further, Input signal voltage in positive phase through another capacitor _C2 ,
The output of the second basic structure, that is, the third integrator circuit
The output of _M3 is input in reverse phase, and the input terminal of the second basic structure including the third and fourth integrating circuits _M3 and _M4 , that is, the input terminal of the third integrating circuit _M3 , is connected to a capacitor C. ₁₁ , the output of the first basic structure, that is, the output of the first integrating circuit _M1 , is in positive phase, and the output of the second basic structure, that is, the output of the third integrating circuit _M3, is in reverse phase. Connections are made for input.

The above is the configuration of the second embodiment of the present invention,
According to such a configuration, a filter having fourth-order non-polar bandpass characteristics can be constructed. In the circuit having the basic structure described above, a positive-phase integrator and a negative-phase integrator form a loop to form a secondary resonant circuit with infinite Q. As mentioned above, in the second embodiment, the differential input integrating circuit of the low-pass filter shown in the first embodiment is replaced with the basic structure circuit shown in FIG. If the capacitance values of the capacitors in the basic structural circuit are selected so as to make the resonant frequencies of the structural circuits the same, this replacement means conversion from a filter having low-pass characteristics to a filter having band-pass characteristics. Moreover, since the basic structure circuit is a resonant circuit with infinite Q, there is a large gain between the input and output of the basic structure circuit at the resonant frequency, which is the center frequency. For exactly the same reason, the output voltage of each basic structure circuit, that is, the output of the first integrating circuit _M1 and the output of the third integrating circuit _M3 , match the input signal voltage at the center frequency. Therefore, the capacitors C ₁ , C ₂ , and C ₉ which receive these voltages as differential inputs have element sensitivity of zero at the center frequency based on the above-mentioned principle. Capacitor for positive phase and negative phase input in basic structure circuit
Although C ₃ , C ₄ , C ₆ , and C ₇ do not satisfy the above principle,
These capacitors together with other capacitors in the basic structure circuit determine the resonant frequency of the resonant circuit, and only the resonant frequency changes with respect to changes in these capacitance values. Therefore, the phase sensitivity of the capacitors in these basic structure circuits is not zero at the center frequency, but the amplitude sensitivity is zero. On the other hand, in the second embodiment as well, the circuit in which the capacitors C ₁ and C ₂ for inputting the input signal voltage to the filter are removed is the input of a leapfrog configuration circuit configured to simulate a resistor double-terminated LC bandpass filter. This corresponds to a circuit in which the part that inputs the signal voltage to the filter is removed. Therefore, the circuit of the second embodiment is a circuit that has low sensitivity at the passband frequency and also makes all element amplitude sensitivities zero at the center frequency.

In the above, a configuration example using four integrating circuits was shown as an embodiment of the present invention related to a bandpass filter, but it can also be applied to a case where 2N general integrating circuits are used, and the low-pass filter of the present invention can be applied. The present invention can be implemented by replacing the basic structure circuit, which is the above-mentioned secondary resonant circuit, in each integrator. The same applies to a circuit in which the positive phase integrator circuit in the basic structure circuit of FIG. 6 is replaced with a negative phase integrator circuit, and the negative phase integrator circuit is replaced with a positive phase integrator circuit at the same time.

In addition, for the actual production, the Switch S ₁₂ ,
Since S ₁₃ and S ₁₆ are always at the same potential, it is possible to realize this with one switch. Similarly, switch
S ₃₂ and S ₃₃ can also be realized with one switch.

The above has only shown a few embodiments of the present invention,
For example, various modifications and changes may be made without departing from the spirit of the present invention, such as using not only the differential input integrator shown in FIG. 1 used in the constituent circuit of the present invention but also other types of differential input integrating circuits. will be able to do it.

(Effects of the Invention) The present invention has the above-described configuration, and according to the present invention, the sensitivity is lower within the pass frequency band than the conventional low sensitivity switch capacitor filter, and the element is particularly sensitive at the center frequency. Since it is possible to construct a switched capacitor filter that has no sensitivity at all, when it is constructed monolithically on a semiconductor substrate, there are advantages such as miniaturization due to the small minimum capacitance and the ability to construct precision filters with high yield. can get.

[Brief explanation of drawings]

Fig. 1 is a connection diagram showing a differential input switch capacitor integration circuit, Fig. 2 is a connection diagram showing a conventional leapfrog type switch capacitor filter,
Fig. 3 is a connection diagram of a resistor-double-terminated LC low-pass filter, Fig. 4 is a signal flow graph of the filter in Fig. 3, and Fig. 5 shows a first embodiment of the switch capacitance filter of the present invention. The connection diagram, FIG. 6, is the second one of the switch capacitor filter of the present invention.
It is a connection diagram showing an example of. S ₁₁ , S ₁₂ , S ₁₃ , S ₁₄ , S ₂₁ , S ₂₂ , S ₃₁ , S ₃₂ , S ₄₁ ,
S ₄₂ ; Switch, C ₁ , C ₂ , C ₄ , C ₆ , C ₈ ; Capacitor, (M ₁ , C ₃ ), (M ₂ , C ₅ ), (M ₃ , C ₇ ), (M ₄ ,
C ₉ ); Integrating circuit.

Claims (1)

[Scope of Claims] 1. N switch capacitor integration circuits (N is a natural number of 2 or more) are provided, each of which performs differential input integration of positive-phase and negative-phase inputs using one capacitor with a switch. The signal voltage and the output of the first integrating circuit are input to the first integrating circuit in positive phase and negative phase through one capacitor and a switch, respectively, and the input signal voltage and the output of the second integrating circuit are The signals are input to the first integrating circuit in positive phase and negative phase through another capacitor and a switch, and the I-1 and I+
The output of the first integrating circuit is input to the first integrating circuit in positive phase and negative phase through one capacitor and switch, and the Nth integrating circuit
A switched capacitor filter characterized in that the outputs of the -1 and Nth integrating circuits are inputted in positive phase and negative phase through one capacitor and one switch, respectively. 2. The switch capacitor filter according to claim 1, wherein the value of N is 4. 3. N switched capacitor integration circuits (N is a natural number of 2 or more) are provided, each of which performs differential input integration of positive-phase and negative-phase inputs using one capacitor with a switch. In each pair of two integrating circuits, such as the third and fourth, the output of one integrating circuit becomes the positive phase input of the other integrating circuit,
Furthermore, while forming a loop in which the output becomes the opposite phase input of the original integrating circuit, the input signal voltage and the output of the first integrating circuit are connected to one capacitor and the output of the first integrating circuit. The input signal voltage and the output of the third integrating circuit are inputted through a switch in positive phase and negative phase, respectively, and the input signal voltage and the output of the third integrating circuit are inputted through one capacitor and a switch, and the third integrating circuit is connected to the 2N-3 integrating circuit. In this case, the outputs of the 2I-1 and 2I+3 integrator circuits are input to the 2I+1 integrator circuit in positive phase and in reverse phase through one capacitor and switch, respectively, and the outputs of the 2N-1 integrator The integrator circuit has a 2nd N−
The outputs of the 3rd and 2N-1 integrating circuits are each in positive phase,
A switch capacitor filter characterized by inputting in reverse phase. 4. The switch capacitor filter according to claim 3, wherein the value of N is 2.