JPH02254569A - Segment display device - Google Patents

Abstract

PURPOSE:To shorten the data transfer to and from hardware and the data storage time to improve the display performance by coupling a control processor and a coordinate transformer or a clipper with a shared memory and making information related to apexes of a segment string into a table having a systematic data structure. CONSTITUTION:The control processor sets coordinates of apexes of a segment string to an apex input table, and coordinate transformation is performed and results are set to a coordinate transform table. The pointer of each table is advanced to the table of the next processing step, and information of apex information on the pertinent table is indicated to the coordinate transformer and the clipper, and the clipper discriminates the inside or the outside of a clip area. When a part of a segment is in the clip area, apex coordinates or clip point coordinates are sent to a segment generator to draw the segment. After this operation, the pointer of each table is switched to perform the processing of the next apex, and this operation is repeated to the last apex. Thus, it is unnecessary to transfer data to the coordinate transformer and the clipper and to store coordinates of the end point of the preceding segment, and segments are quickly displayed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to graphic display, and particularly to a graphic display device using a plurality of processors.

[Conventional technology]

As shown in FIG. 2 of Japanese Patent Application Laid-Open No. 65-85988, a conventional graphic display device includes a control processor section consisting of a sequencer, a microprogram storage memory, and an ALU, and a multiplier and a clipper for performing clipping processing. The hardware is connected via a bus. The multiplier mainly performs coordinate transformation, but in order to execute coordinate transformation faster, it was developed in Japanese Patent Laid-Open No. 65-8075.
A coordinate conversion device such as that described in Publication No. 1 may be connected in some cases.

Under such a hardware configuration, the span display process is performed as described below.0 Line segments to be displayed are usually defined as a line segment sequence. Now, if we consider the case of displaying a three-dimensional line segment sequence, the 15th
The processing procedure is as shown in the figure. In other words, the coordinates of each vertex of the line segment sequence are subjected to Zazen transformation and clipping is performed. Here, after clipping in two directions, XY force direction clipping is performed. Finally, line segments are generated based on the clipping results.

Applying the above procedure to specific hardware processing, first, the control processor operates a multiplier for each vertex of the line segment sequence, and the multiplier multiplies a matrix by a vector. Coordinate transformation is performed. This result is clipped in two directions using a clipper.

At this time, a line segment starting from the vertex processed immediately before and ending at the vertex processed this time is clipped. Subsequently, the result of clipping in two directions is clipped in the XY force directions using a clipper. Line segments are displayed by sending this result to a vector generator.

In this way, conventionally, a control processor has controlled data transfer to multipliers and clippers.

[Problem to be solved by the invention]

In the above-mentioned conventional technology, it is necessary for the control processor to set necessary data to the coordinate transformation device or the clipper via the bus, and to take out the processing results in the coordinate transformation device or the clipper via the bus. Furthermore, in the case of a line segment sequence, clipping requires the start and end points of each line segment, but since the end point of the previous line segment is on the start point of the next line segment, in order to process the next line segment, It is necessary to retain information about the end point of the previous warehouse. Therefore, the control processor performs this process in addition to the transfer process. Therefore, there is a problem in that the load on the control processor becomes heavy and the display speed cannot be increased.

An object of the present invention is to improve display performance by reducing the time used for data transfer and data storage between a control processor and hardware such as a coordinate transformation device and a clipper.

[Means to solve the problem]

To achieve the above object, as shown in FIG. 1A, the present invention combines a control processor, a coordinate transformation device, and a clipper with a shared memory, and creates a table with a data structure that unifies information regarding the vertices of a line segment sequence. By doing this, the control processor, zazen conversion device, and clipper can read and write information about vertices without performing any special processing. A table is provided for each processing stage of line segment display processing so that when one vertex is in a certain processing stage, the next vertex can be processed using the table of the previous processing stage.

Furthermore, information on the end point of the previous line segment, which is necessary for displaying the line segment sequence, is left as one of the tables.

Furthermore, when the processing stage ends and the process proceeds to the next processing stage, by passing the pointer of the table to be processed to the next processing stage without moving data between the tables for each processing stage, Execute processing. In other words, by using the table cyclically, each vertex of the line segment sequence can be processed one after another.

[Effect]

Effect of the present invention) The details will be explained with reference to FIG. 1A.

The control processor sets the coordinates of the first vertex of the line segment string in the vertex input table, passes the pointer of this table to the coordinate converter, and causes the coordinate converter to perform coordinate conversion. The coordinate transformation result is
This table, that is, the table that has been changed to the coordinate conversion table, is set. Simultaneously with this processing, the control processor switches the pointer of the previous end point storage table to a vertex input table, and inputs the coordinates of the #X2 vertex into this table.

When the coordinate transformation processing is completed, the control processor moves the pointer of each table to the table of the next processing stage and instructs the coordinate transformer and ripper to process the vertex information on the corresponding table.

The clipper determines whether the clip area is inside or outside. At the same time as these processes, the position of the fifth vertex of the tail line is set in the vertex input table.

When these three processes are completed, the inside/outside determination result of the clipper is referred to, and if it is inside, the converted vertex coordinates are sent to the line segment generator (not shown) on the starting point of the line segment to be drawn.

The control processor then moves each table's pointer to the table for the next stage of processing. By doing this, the first vertex remains in the previous end point storage table.

Also, set the fourth vertex of the line segment string in the new vertex input table, and instruct the coordinate transformation process and the clipper to process the third and second vertices, respectively. The clipper is made to perform clipping/grabbing sensing if necessary by referring to the results of determining whether the two vertices are inside or outside the clip area, and by referring to the results in the previous end point storage table. If within a clip or as a result of a clip,
If part of the line segment is within the clip area, the line segment generation fSt sends the vertex coordinates themselves or the clip point coordinates to draw the line segment.

After completing these steps, switch the pointer 8 to Q for each table.
Process the next vertex and repeat until the last vertex.

By processing in this way, it becomes unnecessary to transfer data to a coordinate converter or a clipper, or to store the end point coordinates of the previous line segment, and high-speed line segment display becomes possible.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1B is a diagram showing the overall configuration of a line segment display device that displays line segments in five dimensions.

1B 1cb, 1 is G P B O (Graph
ieProcessor Block O, which interprets graphical commands and executes processing of the commands. 2 is G P B 1 (Graphic Proc
essor Block 1) and G P B
(0) Receives commands from 1 and executes process 8 related to line segment display. 3 is RCP (Ra5terCont
orolProcessor) and GPB(1)
04 is a segment buffer that receives the commands indicating the geometric information of the displayed figure and the commands indicating the explicit attributes from 2 and expands the figure into image information. Display attribute command that specifies how to display.

A graphics command string 401 consisting of coordinate system commands that specify a coordinate transformation system, control system commands that control the execution of these commands, etc. is stored.

Reference numeral 5 denotes a segment buffer controller, which sequentially reads out the graphic command string 401 from the segment buffer 4 and stores the FIFO (first-in-first-out memory, hereinafter abbreviated as PIF"0) (1) of G P B (0) 1. ) 211 &C transfer fl[, (riC
Processing for P U 7 to activate G P B (0) 1 and (!ll G P R (0) 1 is C
A pipeline bus 06, which performs processing for returning a response to the PU 7, connects the RCP 3 and the segment buffer controller 5.

7 is CPt), a graphic command string 4018 is created on the segment buffer 4, and G P B (0) 1 #
G P B (0) 1 , 0 P B (
1) 2°RCP5. Reference numeral 08 is a main memory used by the CPU 7, which controls a portion that performs drawing processing, including the pipeline bus 6, segment buffer 4, and segment buffer controller 5. 9G = system bus, C
Connect input/output devices and file devices to PU7.

The internal hardware configurations of GPB(0)1 and GPB(1)2 are the same. That is, 51 is a microprocessor 1, and 41 is a RAM that stores the program and data of the microprocessor (1) 51. A GP bus 71 is a local bus used by the microprocessor (1) 51. 61 is a signal processing processor 1, which includes a floating point multiplier 611 and an ALU 612 . RAM 615 for data storage. This signal processing processor (
1) 6[-RO that stores the controlling microprogram
It consists of an M614, a sequencer (not shown), etc. which control these by the above-mentioned microprogram. 51G;
Dual port RAM, microprocessor (1
) 51 and the signal processing processor (1) 61, the dual port RAM 51 includes:
Common command area 5119 that stores general DSP commands that instruct processing to the signal processing processor (1) 61
Vertex information area (1) 512 to Tj 4-point information area (5) 514 are arranged to store information regarding the vertices of the display line segment sequence. In addition, the dual baud) RAM 51 is composed of a memory chip, and due to the function of this memory chip, 7FF address 515 and 7FF' address 5168
A write access generates a signal, and a read access stops the signal. By using this function, 7
Write access to FF address 5158.

In other words, dual baud 1 RAM is located at 7FF address 515.
When you write the start address of the DSP command on 51,
An interrupt signal is generated and the signal processing processor (1) 61.
An interrupt occurs in the signal processing processor (S61 is 7FF).
The address of the DSP command is read from address 515 and execution of the DSP command is started.

At this time, the interrupt signal is reset. When the processing of the DSP command is completed, 7 of the dual port RAM 51
Write the return code to FF address 516. As a result, the pipeline bus interface register (hereinafter referred to as P
A DSP end flag 2123 of 212 (abbreviated as B I FSTS) is set. Microprocessor (11
51G! , the DSP sees this DSP end 7 lag 2123.
Kill by knowing the end of the command. At this time, the microprocessor (1) 31 uses dual port RAM
Read 7FF address 5168 of sl and reset DSP end flag 212t%.

21 is PBI F 1 (Pipline Bus
InterFace 1: Pipeline bus interface (hereinafter abbreviated as PBIF) and FIFO (
PBIFSTS(t) 211 and PBIFSTS(t) 212, and performs exclusive control between ammonium water from the bi-line bus 6 and requests from the GP bus 71.

The FIFO (1) 211 is used to capture the graphic command i G P B (o) 1 sent from the segment buffer 4 . P B I F S T 5(1)
212G! , GPB(0)1 is a register that holds internal and external ellipse information. Here, N F I F O F U
The L L flag 2121 indicates the free state of the next stage F'IFO, that is, the FIFO (221) of GPB (1) 2, '0" indicates that there is no space, and 11" indicates that there is space. Flag 2122 indicates own P I
Indicates the presence or absence of data on F'0;10'' indicates that there is no data, and '1'' indicates that there is data. The DSP end flag 2123 is a flag indicating the end of the DSP command, and '0' indicates that it has not ended.

11" indicates the end.

The hardware configuration of GPB(1)2 is GPB (
0) The hardware configuration is exactly the same as 1, but the vertex information area (1) 522 on the dual port RAM 52
- The size of the vertex information area (5) 524 is different, and the DSP command of the signal processing processor (2) 62 is different, so the microprograms in the ROM 624 are different.

Each W16 will be briefly explained below.

52 is microprocessor 2.42 is RAM, 72 is G
There is P Babasu. 62 is a signal processing processor 2, and 621 inside this is a multiplier. 622 is ALU.

623 is RAM, and 624 is tOM. 52 is a dual port RAM, 521 above this is a common command area, and 512 to 514 are vertex information areas 1 to 5°5.
25 indicates the area of address 7FF, and 526 indicates the area of address 7FF. 22 is PBIF2, 221i Engineering FI
F02, 222 is PBIFSTS2゜2221 is NFI
FOFULL flag, 2222 is FIFODA flag, and 222S is DSP end flag.

The configuration of RCP5 is as follows. 35 is the microprocessor 3, 454-1 is the RAM used by this, 73 is the G
Pbabus 8!1 is a vector generator. The vector generation 1185 stores each pixel of the line segment in the frame memory 84 using Bresenbam's algorithm.
write to. 25 is PBIF5, PBIF (S2
1 and all (same, but P B I F S T
S (3) 252 sets the FIFODA flag 2522
It has no meaning other than that. An RCP command for line segment generation is set in F I F 0 (5) 231 by GPB (1) 2.

In the RCP5, by receiving the RCP command that defines the start point and the RCP command that defines the end point, the microprocessor (3) 35 creates parameters for line segment generation, sets them in the vector generator 85, and generates the vector. Line segment generation processing is performed by activating the generator 85.

Figure 2 shows the format of graphic commands.

Figure 2 (a) shows SET for setting the coordinate transformation matrix.
- Shows the format of the MTX command 4011.

This command gives the elements of the matrix shown in equation (1). Here, (X,
Y, Z) are coordinate values of a point in a coordinate system (generally a world coordinate system or a model link coordinate system) in which the figure is defined. (xd * yd * z d ) indicates the coordinate value in the device coordinate system subjected to the coordinate conversion.

First entry 401 of SET-MTX command 4011
11GCG! , S E T -MT X :ff W
OP CODE is set to indicate that the command is 4o11. Parameters 311 to a54 of the matrix of equation (1) are set in subsequent entries 40112 to 40119 and 401110 to 401115.

The procedure for executing the SET-MTX command 4011 will be described below.

First, the control mechanism of the program that processes graphic commands in 'G P B O1 will be explained.

When starting up GPBOl from CPU7, the third
The command control program 91 shown in the figure starts running.

In step 911, the command control program 91
P C0DE8 is imported, and in step 912, OP
Process graphical commands according to C0DE (step 91
5 to 915).

When one of the branched processes ends, it is determined in step 916 whether the graphic command sequence has ended, and if it has ended, the CPU 7 is notified of the end (step 917).

SET as one of the graphic command strings 401 on the segment buffer 4 via F I F 0(t) 21t
-When MTX command 4011 is included, SET
- Branch to the MTX command processing program 92.

FIG. 4 shows a flowchart of processing for the SET-MTX command 4011.

First, in step 921, the command parameters are read, and in step 922, the coordinate transformation matrix is stored in the common command area 511 on the dual-baud RAM 51. ) Create a SET-MTX-D command 4051, which is an SP command. S
E T-MT

and subsequent end IJ, aos12~4051
Elements a11 to a348 of the coordinate transformation matrix are set to 9 and 405101 to 405104. Next, SE
T-MTX-[)=y The address where the cloak 4051 is stored, that is, the address of the common command area 511, is the dual port RA? VI51 7FE address 5
15, the signal processing processor (1) 61 executes the 5ET-7N Emperor TX-D command 4051.
starts. Thereafter, in step 923 of FIG. 4, the process waits until the processing of the DSP command is completed.

Figure 2(b) is a 5E that defines a five-dimensional clip area.
T-CLI P-AREAff cloak 4o12 format This command is for GPB(o)i signal processing processor (1)
This is for setting clip area information in a predetermined area of the RAM 611 of 61 and the RAM 625 of signal processing processor (2) 62 of GPB (1) 2.

5ET-CLIP-AREA=r my 4o12's 4c
1 entry 40121 is set to OP C0DE, entries 40122 to 40124 are set to the coordinate value of the lower left vertex of the three-dimensional clip area in the device coordinate system 0, and entries 40125 to 40127 are set to the clip area. The hand I11 in which the 08ET-CLIP-AREA command 4012 in which the coordinate value in the device coordinate system of the top right front vertex of is executed is executed will be described below.

First, the 5ET-CLXP-A shown in the flowchart of FIG.
The program branches to a program 95 that processes the REA command 4012. In step 931 of FIG.
F I F the parameters included in 21 to 40127
0(1) Import via 211. Step 932
Now, convert the clip area to the signal processing processor (1) 61
DSP for setting in a predetermined area of RAM 613 of
Create a command 5ET-CLIP-AREA-D command 4052 on the common command area 511, and
The signal processing processor (1) 61 is caused to execute the ET-CLI P-AREA-D command 4032.

5ET-CLIP-AREA-D command 4032 Tori 40521 includes OP C0 that identifies the DSP command.
DE is set and subsequent entries 40522 to 4032
7 has the same format as the 5ET-CLIP-AREA command 4012. The method of starting the 5ET-CLIP-AREA-D command 4032 is the SET-MTX-D command 40
This is the same as the starting method of No. 31.

Subsequently, in step 955 of FIG. 5, the signal processing processor (2) 6 of the clip area information 8GPB (1) 2
In order to set it in a predetermined area of RAM 625 of
5ET-CLIP-AREA-G for PB(1)2
Command 4021 is GPB (1) 2 F I F 0 (
2) 0 sent via 221, where G P B (
o) The command for requesting processing from GPB(1)2 from 1 is called the 8GPBt command.

5ET-CL I P-AREA-G command 4021
The format is shown in FIG. 8(a).

The first entry 40212 is set with OP C0DE indicating which command among the GPB1 commands, and the subsequent end 'J' 40215 to 40218 are 5
The format is exactly the same as the ET-CLIP-AREA command 4012.

GPB (132 is 5ET-CLIP-AREA-G command ao21'&Uke is throat, GP B (o)
A program that controls GPBt commands similar to the command control program 91 of No. 1 operates, branches to the GPB1 command processing program, and performs actual processing.
The processing of the A-G command 4021 is the same as the processing flowchart of the 5ET-CLIP-AREA command 4012 shown in FIG. However, in 08ET- there is no process to request clip area setting in step 953.
Returning to the flowchart 93 of the CLIP-AREA command 4012, in step 934, the end of the DSP command is waited, and the 7FFII area 5 of the dual port RAM 51 is
16 and clears the DSP end flag 2125.

FIG. 2(c) is a diagram showing the format of the POLYI, INE command 4015 that defines a line segment sequence.

In the first entry 40151, OP C0DE is set. In 40152, the number of vertices of the line segment sequence is set.
59 and 40151-401! +11 is set to the coordinate value of the vertex, that is, the coordinate value in the world coordinate system or modeling coordinate system, which is the coordinate system in which the figure is defined. Step 4015 (7) Process 80) The flow will be explained.

First, prior to POLYLINE command 4015, 5
ET-11/ITX Command 4011 and 5ET-C
LIP-AREA command 4012 is executed and
It is assumed that the I conversion matrix and the clip area are set in either or both of the RAM 615 of the signal processing processor (1) 61 and the RAM 625 of the signal processing processor (2) 62.

P OL Y L I N E =r mydo4013
When G P B (0) 16C is entered, the command control program 91 shown in FIG. 3 branches to a program 94 in the flowchart shown in FIG. This program 94 performs coordinate transformation and clipping in two directions, and sends the results to GPB(1)2. GPB (
1) In 2, clipping is performed in the XY force direction according to the program 95 of the flowchart shown in FIG. 9, the vertex coordinates of the line segment are converted from floating point format to fixed point format, and sent to RCP3 to display the vernal equinox.

Figure 12 shows a state D8 in which the line segment array is clipped in two directions.
show.

In Figure 12, the line segment sequence V1V2V3V4V5V6V
When 7V8V9V10 is clipped on the front and back faces, three line segment sequences VIV2V3'.

V4'V5V6V7' and V7''V8V9
V 10 IC will be divided. These line segment sequences are expressed as G
It will be processed by PB(1)2.

In step 941 of FIG. 6(a), the vertex information area (1) 512 on the dual port RAM 51 shown in FIG.
The address seen from the microprocessor (1) Sl is
As shown in FIG. 11, a microprocessor (1) 51
aO register 311 of the signal processing processor (
1) Set the address %dO register 314 as seen from 61. Regarding m point information area (2) 515, a vertex information area (2) is added to a register 512 and d register 515.
514 and a2 register 315 and 2 register 5
16, respectively. Furthermore, TRN5-C)I
In order to be able to immediately execute the K-Z-D command 4055 in the vertex information area, the OP C0DE is set in advance to the above 5.
Set it at the beginning of the area.

Note that the dO register 514. d Lujistar 515 and d
Setting the address seen from the signal processing processor (1) 61 in the 2 register 316 is to set the start address of the DSP command at address 515 of the dual port memory 7F'E in order to start the DSP:1 mant. This is for storing. By using registers, DSP commands can be activated at high speed.

Further, the m-point information area pointed to by the aO register 511 and the dO register 514 is called a command area #O. Similarly, the a register 612 and the d register 515
The vertex information area pointed to by the a2 register '515 and the d2 register 516 is called the command area #2.

In step 942 of FIG. 6(a), a message indicating that processing of the POLYLINE command 4015 has started for GPB(1)2 is sent to GPB(1)2 as shown in FIG. 8(b).
OLYLINE-G command 4022 OP C0D
Notify by sending E40221. This results in
In GPB (1) 2, processing is started according to the flowchart shown in FIG. 9. In step 945, the coordinate information of the first vertex of POLYLINE is fetched via F Set to . In other words, Fig. 7 (C
), command area: TRN5- on #2
CHK-Z-D=rmy)"4033r,n)IJ
x, y, z of vertices from 40552 to 403344 Ci
Set up s.

TRN5-CHK-Z-D command l"4055 c. Coordinate transforms the above X, Y, Z coordinates, outputs the area code representing the relationship between the result and the front and back surfaces of the clip area to entry 40555, and executes the coordinate transformation. Entry 40 results
0 step 944 TeG$ output to 336-4015B
, TRN5-C) IK-Z-D command 4053, d
It is activated by setting the contents of the 2 register 516 to the 7FE address 515.

In step 945, the coordinate value of the second vertex of POLYLINE is set in command area #1 in the same manner as in step 943.

Step 946 refers to the DSP end flag 2123 and waits until the DSP command ends.
Read FF address 516 and 1) SP end flag 212
Reset 3. As a result, the coordinate-converted locus ljI value and two-directional area code are set in command area #2.

In step 947, 1) S on command area key 1
P: I-f/do TRN S-C)'L K
-Z-D code 4035 is activated. In step 948, it is determined whether the first vertex is inside or outside the front surface or the rear surface by referring to the area code in two directions on command area #2, and if it is outside, step 949 is skipped.

In step 949, the POLYLINE-G 0P-C
Send to GPB(1)2 along with ODE.

The format of the POLYLINE-G command 4022 is
As shown in Figure (b), the first engine l' IJ 4022
1 is set to OP C0DE, and subsequent entry 4
0222-40229 and 402210-40221
5, the coordinates are transformed for every 4 entries and Z
5UB-OP-CODE representing the coordinates of the vertex of the line segment clipped in the direction and the type of the vertex is entered.

5UB-OP-CODE is placed in the first entry of four entries.

The details of 5UB-OP-CODE are as shown in FIG. 8(c), and f17 lag 402223. f 2 flag 4
02222 and f5 flag 402221, and the meaning of each flag is as shown in Table 1.

Table 1 In other words, the f1 flag 402225 is used to instruct Myo80PB(1)2 at 3m in the POLYLINE area when all points are outside the front and rear surfaces as a result of two-way clipping. . In case of termination, 5UB-O
Coordinate values are not sent only by P-CODE.

Entry 402214 roars at this.

f27 lug 402222 and f57 lug 402221
has meaning only when the f1 flag 402225 is +10 //.

f 57 rough 402221 is one POLYLIN
This is a flag indicating whether or not it is the starting point of a plurality of line segment sequences obtained by processing G P B (G) 1 for E, and 'o
〃 indicates the starting point, and '1'' indicates that it is other than the starting point.

f27 lag 4o2222 indicates whether the line segment is continuous at a point other than the above starting point, and if it is 0, it is continuous;
“If so, it indicates a break.

Therefore, in step 949, the f1 flag 4022
25kl'0", f27 lag 402222 is undefined, f57 lag 402221 is 10" 5UB-OP
-COL)E and the coordinate values after coordinate transformation on command area I2 are sent to GPB(1)2.

In step 9410, it is determined whether or not information on full length points has been transferred from the segment buffer 4 based on the number of vertices of POLYLINE. Once imported, step 9
423 Hejjump.

In step 9411, the coordinates of the next vertex of POLYLINE are read into command area #0.

In step 9412, the signal processing processor (i) 61
waits for the operation to end, and resets the DSP end 7 lag 2123. In step 9413, TRN5-C)iK-Z-D is applied to the vertex coordinates observed in step 9411.
Start the command ao5sfr and request the signal processing processor (S61) to perform coordinate transformation and calculation of a two-way area code.

In step 9414, it is determined whether the starting point is within the front and back surfaces based on the two-directional area code on the command area I2 containing the starting point information.

If it is outside, jump to step 9418.

In step 9415, whether the end point is inside or outside is determined using command area #1. Here, if both the start point and end point are within the clip area, step 9416
Proceed to.

In step 9416), the coordinate value on the command area well 1 and the 5UB-
Both OP-CODEs are sent to GPB(1)2.

This becomes the end point for the start point sent to GPB(1)2 in step 949. If the end point is outside the clip area, the process advances to step 9417.

,X? For rough 9417, clip the end point,
The clipping result is sent to GPB(1)2 as a non-contiguous end point, that is, as a final point. When clipping, the starting point information remains in command area #2, and the clipping process can be performed using the ending point information in command area #1. The details of the clipping process are not relevant to the present invention, so a description thereof will be omitted.

In step 9418, it is determined from the area codes of the start and end points whether they are both before the front surface or after the rear surface, and if they are completely outside, jump to step 9422.

In step 9419, processing similar to step 9415 is performed.

In step 9420, the starting point - is clipped and sent to the starting point and ending point 8GPR(1)2. At this time, 5UB
-OP-CODE shall be in accordance with Table 1 above. In step 9421, the start point and end point are clipped and sent to GPB(1)2.

In step 9422, command area #2 (starting point) is set to command area #0. command)'=I-IJ7$11'
point) command area $2 (starting point), command area #
The contents of the aO register 'S11 to d3 register 516 are replaced so that 0 (newly fetched vertex) becomes command area 1 (end A), and the process returns to step 9410.

In step 9425, the POLYLINE scattering point is processed. The details of this process are shown in FIG. 6(b). Here, steps 9425t to 94239 excluding step 94240G are replaced by step 9425t to step 94239.
12 and steps 9414 to 9421.

In step 94220, the polyline ends 8GPB (1
)2. By doing this, processing information can be given to the subsequent processor without moving data 8s between tables, and information on the starting point can be left.

Next, in GPB(1)2, GPB(1)2 processes one or divided line segment sequence that has been subjected to coordinate transformation and clipping processing in two directions by GPB(o)1.
The processing of POLYLINE will be explained below.

The processing of GPB(1)2 is performed by the command POLYLINE-G command 4022 shown in FIG. 9(b). G P B (1) Also in 2, G P B (
o) Processed in the same way as in step 1, but using DSP
The commands are different. CHK-XY shown in Figure 10 et al.
-D command 4042 and XY direction clipping.

C) First entry 4 of IK-XY-D command 4042
0421 contains OP C0DE, entry 404
22 to 40425 input the vertex information sent from G P B (0) 1. In addition, the XY direction area code and integer coordinate values indicating the positional relationship with the XY force direction clip area are input. It is output to entries 40426 to 40429.

Note that the clipping is performed at step 95 in the flowchart of the program 95 for processing the POLYLINE-G command 4022% shown in FIG.
1, Gl, G P B (0) Similarly to the processing in 1, the points by register and the UP C0DE of CHK-XY-D command 4042 are set in advance (0 command area #0 to command area #2 is also G
P B (o) shall be defined in the same way as in the case of 1.

In step 952, the input 5tJB-OP-CO
The DE is determined, and if the polyline ends, the process ends.

From step 955 to step 9525, G P B
(0) Same processing as 1. However, the DSP command on the command area is C) IK-XY-D command 4042, and RCP! The only difference is that a fixed point coordinate value is sent to i as the start point or end point, and that the clipping is clipping in the XY force direction.

In step 9524, the same processing as that in step 9515 and steps 9515 to 9522 is performed.6 After that, the process returns to step 952, and the F I F O22
Read 5UB-OP-CODE from 1 to determine whether 5UB-OP-CODE in command area #1 is the end of the polyline 0 This is a two-way clipping process, where one polyline is divided into multiple line segment sequences. It is from.

Through the above processing, it is possible to display eight line segment sequences without moving the vertex information.

Note that the line segment display device of the present invention can be widely applied to displaying graphics having line segments. It can also be applied to things other than displaying line segments. For example, the present invention can be applied to operations on data having a chain relationship, such as geometric information of a line segment sequence. If similar processing is possible, it may be applied to other uses.0 [Effects of the Invention] As explained above, according to the present invention, unnecessary data movement of line segment vertex information is eliminated, so high-speed processing is possible. This has the effect of making it possible to display line segments.

[Brief explanation of drawings]

FIG. 1A is a block diagram showing an overview of the functions of the line segment display device of the present invention, FIG. 1B is a block diagram showing the entire operation of the line segment display device for displaying three-dimensional line segments, and FIG. FIG. 3 is an explanatory diagram showing the format of commands, and FIG. 3 is a flowchart of the command control program. Figure 4 is a flowchart of the processing for the SET-MTX command, and Figure 5 is the 5ET-CLIP-AR
Flowchart of processing for EA Nearmant, Figure 6 is a flowchart of GPBO processing for POLYLINE commands, Figure 7 is an explanatory diagram showing the command format of DSP commands used in GPBO, Figure 8 is GPBI
An explanatory diagram showing the command format of the command, Figure 9 is POL
A flowchart of the processing in GPBl for the YLINE command, Fig. 10 is an explanatory diagram showing the command format of the GPB1 command used in GPBl, Fig. 13 is an explanatory diagram showing the procedure for displaying three-dimensional line segments, and Fig. 11 is an explanatory diagram showing the vertex information An explanatory diagram showing how to access the area, Figure 12 shows the line segment column 2
It is an explanatory view showing a result after clipping in a direction. 1-G P B O (Graphic Process
or Block O)2-” G P B 1 (G
rapic Processor Block 1
)3-RCP (Ra5ter Contoroi P
rocessor) 4...Segment buffer 5
...Segment buffer controller 6...Pipeline bus 7...CPU 8...Main memory 9
...System bus ￥ff1lA Figure 2 (α) δET-1'lTX frame: a+'fl symbol input
(b 5εT-CLIP-A scale EA command type % formula % 5 fig. Eight
(b) 5E-CLIP-A shaku εA-D komashito ff5
Wu (C) T shaku NS -C) IK-1-D Mon 6 diagram (b) Confucian diagram 8 (QJ, SE ding-(, LTP-AREA-G) Mashi F
Wato (b) POLYLINE-G Kode Shito format 3 figures, 411 figures, 10 figures (1), 5ET-CLIP-A scale EA-1-D (b)
CHK-VY-D View 12 Front I and ω Go

Claims (1)

[Claims] 1. A line segment display device that displays a line segment sequence on a display device based on geometric information of the line segment sequence, including one or more arithmetic processors that perform arithmetic processing including coordinate transformation and clipping. , and a control processor that mainly controls this arithmetic processor, are composed of one or more processing blocks connected by a shared memory, and intermediate information of the processing regarding the vertices of the line segment sequence is stored on the shared memory. 1. A line segment display device, characterized in that a table is provided for storing included information, and the arithmetic processor performs arithmetic processing based on the information stored in the table. 2. The line segment according to claim 1, wherein the table has a number greater than or equal to the maximum number of the arithmetic processors that operate simultaneously, and one of them is an object of calculation for each operating processor. Display device. 3. When passing the processing result of the arithmetic processor or control processor as input data to another arithmetic processor or control processor, the data is not moved between the tables, but the pointer pointing to the position of the table is switched, 3. The line segment display device according to claim 2, wherein said table is used cyclically. 4. The line segment display device according to claim 2 or 3, wherein information on vertices processed before the vertices to be processed is left in the table to be subjected to calculation by the arithmetic processor.