JPH02252085A - Commodity identification system - Google Patents

Abstract

PURPOSE:To detect the generation of a memory error at the time of storing data by accessing the memory only when the data of a data carrier coincide with a key comparing value at the time of applying a writing or reading command to the data carrier. CONSTITUTION:When the data carrier 4 receives a command and decides the command as a key address command(KAC), the key value is written and its response is sent to an ID controller 14 to end the processing. When the command is not the KAC, a key address in the memory 35 is read out and whether the read key address coincides with the key comparing value set up in a control part 34 or not is checked. At the time of discrepancy, a memory error response is transmitted. When the command is a reading or writing command at the time of coincidence, the data are read out from the memory 35 or data are written in the memory 35 and a writing response is transmitted to end the processing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to an identification system for tools for machine tools, parts in factories, products used in product management, distribution systems, and the like.

[Conventional technology]

In order to mechanize the tool management of conventional machine tools and the identification of parts and products on assembly lines in factories, tools 1
A system is needed to identify and manage various items such as parts and products. Therefore, as disclosed in Japanese Patent Application Laid-Open No. 63-221950, a memory unit having a memory is provided in the object to be identified, and necessary information is written into such memory by external data transmission, and the information is read as necessary. An article identification system has been proposed in which the article is displayed on the screen.

[Problem to be solved by the invention]

However, according to such conventional identification systems,
A so-called memory garbled state may occur in which noise is added to a memory unit that holds data, or data in the memory is changed due to static electricity, magnetic fields, or the like. Conventional memory unit control units have the function of reading data from or writing data in the memory unit in response to commands from the ID controller, but there is no check function when the data in the memory changes, and incorrect data may be detected. It has the disadvantage that it reads out the data as is.

Further, when a static RAM or the like is used as the memory, a bank-up battery is required, but there is a drawback that the data in the memory may change if the voltage of the backup battery drops.

The present invention was made in view of the problems of the conventional article identification system, and focuses on the fact that when data in a memory unit changes, the data often changes across almost all areas. The technical challenge is to make it possible to check the state of data changes in advance.

[Means to solve the problem]

As shown in FIG. 1, the present invention comprises a memory 1 that holds data, a memory control means 2 that controls writing and reading of data to the memory, and a memory control means that demodulates commands and data given from the outside. It has a data transmission means 3 for transmitting data given to and read out, a data carrier 4 attached to the article to be identified, and a data transmission means 5 for transmitting data to the data carrier and receiving the transmitted data. An article identification system comprising a write/read control unit 6, wherein the memory of the data carrier has a key value area 1a holding predetermined data, and the data carrier or the write/read control unit , is characterized by having a match determining means 7 for determining whether a key value read from the memory matches a held key comparison value when a write or read command is sent.

[Effect]

According to the present invention having such characteristics, a data carrier attached to an article or the like and holding data is provided with a key value area in which fixed data is stored in advance. When giving a write or read command to the data carrier, first enter the data carrier's key (!E 9M
The area is read out, a match determining means determines whether the data matches the key comparison value, and only if they match, the memory is accessed to write or read the data in the memory. .

〔Effect of the invention〕

Therefore, according to the present invention, a memory error can be detected if memory corruption occurs in all memory areas due to noise, static electricity, magnetic fields, etc. generated during data carrier storage. Therefore, it is possible to avoid reading erroneous data or writing data to a memory where the data cannot be reliably retained. Furthermore, by changing the key value or key address data in the data carrier, it is also possible to make necessary data unreadable from the data carrier.

[Explanation of Examples]

FIG. 2 is a block diagram showing the structure of an article identification system according to an embodiment of the present invention. In this figure, the article identification system uses a pallet 11 on which parts to be identified are transported.
A data carrier I2 that is directly attached to the data carrier I2, a read/write head (hereinafter referred to as RW head) 13 that writes and reads data to and from the data carrier I2, and an RW head 13.
ID controller 14 that is connected to and controls its operation.
is provided. RW head 13 and ID controller 1
4 constitutes a write/read control unit 6. Also ID
The controller 14 is connected to a host computer 15.

Now, as shown in the block diagram in FIG. 3, the ID controller 14 includes a microprocessor (CPU) 21 that controls writing and reading of data to and from the data carrier 12, and a memory 22 that holds the system program and data.
An input/output interface 23 for inputting and outputting data to and from the father's computer 15 is provided. CPU2
An encoding circuit 24 and a decoding circuit 25 for encoding data to be transmitted to the data carrier 12 are connected to the input/output terminal of the data carrier 12. Now, the RW head 13 has a modulation circuit 26 that modulates the output of the encoding circuit 24, and a transmitter 27 driven by the output.

The transmitter 27 transmits data to the data carrier by outputting, for example, an FSK-modulated signal from a coil. Further, the received signal obtained from the data carrier is given to the demodulation circuit 29 via the receiving section 28. The demodulation circuit 29 demodulates this signal and provides it to the decoding circuit 25.

Next, the configuration of the data carrier 12 will be explained with reference to FIG. 4. In FIG. 4, a transmitting/receiving section 31 receives and transmits a frequency signal emitted from the RW head 13, and its received output is given to a demodulation circuit 32. The demodulation circuit 32 demodulates this signal and provides its output to the decoding circuit 33. The decoding circuit 33 decodes the encoded data into an original signal and provides it to the control section 34. A memory 35, such as a static RAM or E2FROM banked up by a battery 36, is connected to the control unit 34 via a bus. The control unit 34 is a memory control means 2 that controls writing or reading of data according to commands and data given from the ID controller 14, and the read data is converted into a serial signal and given to the encoding circuit 37. . The encoding circuit 37 encodes the applied signal similarly to the encoding circuit 24 of the ID controller 14, and its output is applied to the transmitting/receiving section 31 via the modulating circuit 38. The transmitter/receiver 31 converts the signal into RW by changing the resonance frequency of the resonance circuit, for example, as in the conventional example.
This is given to the head 13 side. Here, the transmitting/receiving section 31
．． The demodulating circuit 32 and the modulating circuit 38 constitute a data transmitting means 3 that demodulates command data given from the ID unit and supplies the demodulated data to the memory control means, and transmits the read data.

Now, in this embodiment, the key comparison value and the key value address of the memory are held in the control section 34.

The key comparison value is fixedly held as the same value as the key value held in the memory 35, and may be set, for example, by a dip switch, or fixedly set by a wiring pattern, or may be set fixedly by a ROM. It is also possible to write in . It is also assumed that the key value address holds the address of the key value area in the memory 35.

Next, the operation of this embodiment will be explained with reference to a flowchart. In FIG. 5, a match determining means is provided for determining whether or not a command matches a key value when a command is received within the data carrier 12. When the data carrier 12 starts operating, first in step 41 it waits to receive a command. If the command is received, the process advances to step 42 to check whether it is a key address write command. The key address write command is a command that instructs to write a key value to the memory 35 in the data carrier 12. If this command is given, the process proceeds from step 42 to step 43.44, and the key value given to the predetermined key address is written. It writes, sends a write response to the ID controller 14, and ends the process. And if it is not a key address write command, step 4
2, the process proceeds to step 45 and the key address in the memory 35 is read.

Then, it is checked whether the key comparison value matches the key comparison value set in the control section 34. If most of the data in the memory within the data carrier 12 has been destroyed by external influences such as noise, the key comparison value does not match, and the process proceeds to step 47 to transmit a memory error response. If it matches the key comparison value, the process advances to step 48 to check whether the given command is a read or write command, and if it is not one of these commands, a command error response is sent (step 49).

And if it is a read or write command, step 50
The process advances to step 51 to read data from the memory 35 or write the given data to the memory, and then proceeds to step 51 to transmit a read or write response and end the process. In this way, in this embodiment, when a command is sent, the key value in the memory is first read and it is determined whether it matches the key comparison value, and only if it matches, the command to read or write the memory is executed. Therefore, if memory data is corrupted, the abnormality can be checked in advance. Such a match determining means may be provided within the ID controller 14. Furthermore, when setting a key comparison value or a key value address in a data carrier using a dip switch, it is also possible to make it impossible to read or write data from the data carrier by changing the set values.

FIG. 6 is a flowchart showing the operation when the ID controller 14 has a match determination function. In this case, the key comparison value and key value address are
It is assumed that it is fixedly held in the memory in the D controller. When the operation starts in this figure, the ID controller 14 first waits to receive a command from the higher-level computer 15 (step 61). and step 6
Step 2 checks to see if it is a key address write command, and if it is, then step 63 sends a command to write a key value to the key address using a normal write command. At this time, the data carrier 12 accesses the memory and returns a response if the command is a read or write command, as in the conventional example, and the ID controller 14 receives a write response to the key address. Furthermore, the response is sent to the host computer 15, and the process ends (step 64). If it is determined in step 62 that the command is not a key address write command, the process advances to step 65 to check whether it is a read or write command. If the command is other than this, the process advances to step 66, transmits a command undefined error, and returns to step 61. If it is a read or write command, the process advances to step 67 and the key address is read. This read is also performed by reading data from the data carrier 12 using a normal read command.

Then, the process proceeds to step 68 and checks whether the key comparison value matches the key comparison value held in the ID controller 14. If it does not match, a memory error is sent to the host computer 15 (step 69) and the process ends. .

If it matches the key comparison value, the process advances to step 70 to perform read or write processing, send the response to the host computer 15, and end the process.

As described above, in the present invention, memory access is performed by confirming data corruption in the data carrier 12 by using a key value.

[Brief explanation of drawings]

Figure 1 is a functional block diagram showing the overall configuration of the present invention, Figure 2 is a functional block diagram showing the overall configuration of the present invention.
The figure is a perspective view showing the overall structure of the article identification system, FIG. 3 is a block diagram showing the structure of the ID controller, FIG. 4 is a block diagram showing the structure of the data carrier, FIG. 5 is the data carrier, and FIG. is a flowchart showing the operation of the ID controller. Write/read control unit 7 --- Match determination function 13
- ...-Read/write head 14-------・
-ID controller 15--Host computer 21--CPU 34--1--
-Control unit patent applicant Tateishi Electric Co., Ltd. agent Patent attorney Yoshiki Okamoto (and 1 other person) 1.35... -Memory 1 a--------
Key value area 2--Memory control means 3. 5-
-------Data transmission means 4, 12-・--1--Data carrier 6--~----Figure 4~----Take'+v rear diagram Figure 164 Diagram

Claims (1)

[Claims] (1) A memory that holds data, a memory control means that controls writing and reading of data to the memory, demodulating commands and data given from the outside, and transmitting the read data to the memory control means. a data carrier that is attached to an article to be identified, and a write/read control unit that has a data transmission means that transmits data to the data carrier and receives the transmitted data. an article identification system, wherein the memory of the data carrier has a key value area holding predetermined data, and the data carrier or write/read control unit controls the memory when sending write and read commands. 1. An article identification system, comprising a match determining means for determining whether a key value read from the key value matches a key comparison value held.