JPH02249189A - Subcode reproducing device - Google Patents

Abstract

PURPOSE:To read out desired package data from a memory in a short period by deciding the item of the package data when reproduced package data on the memory, and performing parity check simultaneously with writing the package data on a memory area based on the item. CONSTITUTION:The memory areas corresponding to 16 kinds of item codes are provided in the memory 203, and the item code of a package is detected when the reproduced package data is written on the memory 203, and the data is written on the memory area corresponding to the item code, and also, simultaneously, the parity check is performed on the package data. When a satisfactory parity check result by a parity check circuit 204 is obtained, the write of the package data on the memory 203 is prohibited hereafter even when the package data with the same item code is inputted. Also, in readout, the package data in the memory area corresponding to the desired item code is read out. In such a way, it is possible to dispense with item retrieval time when the package is read out, which accelerates processing speed.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION This invention relates to a subcode reproducing device for a rotary head type digital audio recorder (hereinafter referred to as rRIATJ).

[Prior Art] FIG. 3 shows the arrangement of an R-1) ΔT head, drum, and magnetic tape. In the figure, the △ magnetic head (5028) and the B magnetic head (502B) are 7T and 180°.
The magnetic tape +5041 is attached to a drum f5011 with a diameter of 30 mm rotating at 200 Or, p, m. Magnetic head +502A), +502B) T magnetic tape f504)
(7) Recording is performed by sequentially forming tracks diagonally with respect to the longitudinal direction.

FIG. 4 is a diagram showing a magnetization pattern when a signal is recorded on the magnetic tape (504). In the figure, the arrow (50
6) is the running direction of the magnetic tape (5041), the arrow (507
) is the scanning direction of the magnetic head, the magnetization pattern (track) f5obA), (5or+B) is the magnetic head A (5
02Al, B magnetic head +502B), respectively.

Also, Figure 4 shows one track "2" (here (505)
Only A) is shown, indicating the division of the signal recording area.
It has a PCM area (510) for recording audio signals, and a subcode area 1.2 (5111, (5121) for recording additional information (subconid) such as time information.
PC, M area (5101 is +28 blocks, subcode area 1, 2 +5111. (512) is 8 each
It is composed of blocks.

Figure 5 shows the PCM area +510) and subcode area (
5111, (5121) is a diagram showing the configuration of one block configuring 5121, and the first byte block synchronization transmission (6
00), the ID part (610) in which the identification code Jτ5 (hereinafter referred to as "rlD code") and block address of the second and third bytes, the parity check data (6+1) of the fourth byte and the fifth byte are recorded. - The data part (620) of the 36th byte consists of a total of 36 bytes, and the data part (6201) includes the PCM area (510
1, the audio signal is recorded and the subcode area (
'511)'+ (5121 records subcode data.

Since the present invention relates to the reproduction of subcodes, the structure of the R-DAT subcodes will be further explained below.

Subcodes include elapsed time within the song (tP-time), absolute time (A-time), etc., and each of these is 1
1 pack 1].

FIG. 6 shows the structure of one pack. One pack consists of 8 bytes from Do to D part, and the first byte D. A 4-bit item code corresponding to the contents of the pack is added to the beginning of the pack, so that 16 types of items can be identified. The subcode data is recorded from the last 4 bits of the first byte Do to the seventh byte Da+, and the i-th=Q i is recorded. The reliability of the pack data can be checked using this parity D7.

FIG. 7 shows subcode areas 1, 2 +5111. +
Pack data P recorded in 5121. - It is a figure showing the signal arrangement of P7. The subcode area 1.2 is composed of 16 blocks as described above, and the I of each block is
Block addresses from 0 to 15 are added to the D section (610).

In FIG. 7, the block address is 2n.

It is expressed as 2n+l, where n is an integer from n-0 to 7. In addition, P, ~P6 indicate pack data, and pack P
? A redundant signal for error correction is recorded. Therefore, up to 7 subcodes can be recorded in 2 blocks, and the track has a subcode recording area for 7×8=56 packs.As mentioned above, the usable subcode is composed of 16 types of item codes. Since the data is identified, any pack can be multiple-recorded any number of times using the recording area for 56 packs.

FIG. 8 shows a block circuit diagram of a conventional subcode reproducing apparatus that retrieves desired pack data by searching for an item code when reproducing a subcode recorded in the above format. In the figure, (2011 is a terminal for inputting data reproduced by a magnetic head, (202
) is a demodulation circuit, (203) is a memory with 8-bit input/output terminals, (204) is a parity check circuit for packed data, (205) is a selector, +206) is an input terminal for item specification code, (207) is a match Detection circuit, (2081 is a memory control circuit, (2091 is an output terminal for pack data, (210) is an input terminal for an item search start signal, +211 is a clock generation circuit).

Next, the operation will be explained.

The reproduced data input from the terminal (201) is demodulated to the original data by the demodulation circuit +2021 and then sent to the memory (20
19 in 31. At this time, the data writing clock and ID information are input from the demodulation circuit (202) to the memory control circuit (208), and the memory control circuit (208)
) controls so that all blocks of subcode data in subcode area 1.2 are written into areas corresponding to predetermined memory addresses, respectively, as shown in FIG. The numbers from O to 655 in the diagram are the back area numbers (all 56
The hatched area indicates the area in which the error correction redundant signal is written.

Next, the operation of extracting desired pack data from the pack data stored in the memory (203) by specifying the item code from the terminal T2O61 will be explained. Manually input the item search start signal from the terminal (2101,
Set the clock generation circuit +2111 to search mode. In this mode, the first byte D of each back is sequentially read starting from the back area number 0. Store the item code included in the memory (2
03) and repeats the check to see if it matches the item code specified by the minus number output circuit (207) until it matches, then reads out the clock generation circuit (2+1) from the third Switch to the first bite D of the item's back. Selector (2
The packed data is output from the terminal f2091 via the terminal f2091 through the terminal f2091, and the packed data is simultaneously input to the parity check circuit (2041).The final byte D7 is selected by the selector (205) as the B input, that is, the parity check result. It is output from the terminal (209).

Based on this check result and the pack data, processing such as time display is performed by a microcomputer, etc. (not shown).

The above operation is performed by the clock generation circuit +2111 and the memory control circuit (2081), which generate memory addresses for sequential back searching and generate timing clocks for each circuit.

[Problem to be solved by the invention]

Since the conventional subcode playback device is configured as described above, it takes, for example, the last back ( If the back area 56) contains desired packed data, there is a problem in that it takes a long time.

The present invention was made to solve the above-mentioned problems, and it is an object of the present invention to provide a subcode reproducing device with a short search time.

[Means for Solving the Problem] The subcode reproducing device according to the present invention stores 16
A memory area corresponding to each type of item code is provided,
When writing playback pack data to memory, the item code of the back is detected and written to the memory area corresponding to the item code, and at the same time, a parity check is performed on the pack data, and if the parity check result is OK, the same item code will be used from now on. The present invention is characterized in that even if pack data of an item code is input, writing to the memory is prohibited, and at the time of reading, pack data in a memory area corresponding to the detection of a desired item is read.

[Effect]

Since the memory according to the present invention has a memory area corresponding to the item: ]-, there is no need for item search time during back reading, and the processing speed can be increased.

In addition, when writing pack data to the area corresponding to the item code of memory, rewriting is prohibited after writing pack data whose parity check result is OK, so erroneous pack data may be written to the memory. It is never written.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (11 is a latch for holding the item code of playback pack data, (2) is a memory control circuit, (
3) is a selector that selects the specified item code and the output from latch (1), and (4) is a flag register that stores the parity check results of playback pack data for each of 16 types of items, and memory [203] has an area for storing pack data of IDEMs from 0 to 15.

FIG. 2 shows the addresses of the pack data storage area in the memory +2031, where the X address corresponds to the byte number within one pack, and the X address corresponds to the item number of the pack data.

By generating this x, That is, the demodulation circuit (202) extracts the item code of the first 4-bit pack of the first byte of the pack data and outputs it to the latch (1), and the item code of the reproduced pack data is held in the latch (1)'. . The memory control circuit (2) receives the output of the latch (1) and supplies the corresponding X address to the memory (203), and also counts the clock output for each byte from the demodulation circuit (2021) The X address is sequentially advanced and input to the memory (203), and the sequentially input pack data is written to the memory +2031.At the same time as the 1jJ write operation to this memory (203), the pack data is manually input to the parity check circuit (204). Then, a parity check is performed, and the result of the parity check is manually input to the flag register (4).

This flag register (4) is provided for each item code from 0 to 615, and after initial setting,
Input parity check results are stored sequentially.

The item code of the latch (1) is supplied to the flag register (4) via the selector (3), one of the flag registers 0 to 15 corresponding to this item code is selected, and the parity check result is OK. In this case (hereinafter referred to as "validation OKJ"), the flag register of the item code is reset. Then, the memory (20
3) is controlled by the memory control circuit (2) so that data is not written again. That is, when the output of the flag register (4) specified by the item code stored in the latch (fl) is in the reset state, writing to the memory (203) is prohibited. This prohibited operation causes the parity OK pack data to become parity N.
This prevents it from being rewritten to G pack data.

Due to the above-mentioned operation of reproducing pack data,
Only pack data with OK parity will be stored in the area corresponding to each item code of the memory (203). Memory areas in which no pack data is recorded and memory areas in which pack data for which parity check was NG are recorded can be identified because the flag register (4) corresponding to the item code is not reset. .

Next, when reading desired pack data from the memory (203), the desired item code is inputted from the terminal (206) as in the conventional case. In this embodiment, since the address of the memory (2031) and the number of the flag register (4) corresponding to the item code are known in advance, there is no need to write the item code as in the conventional case.

That is, the memory control circuit (2) changes the X address while retaining the X address corresponding to the designated item, and stores the desired 8-byte packed data in the memory (2).
03) and output from the terminal (209). If you want to output the parity check results, select the selector (2
By selecting and outputting the 8 manuals of 05), it is possible to output the parity check result corresponding to the specified item. Since the parity check result is already known, by sending the parity check result at the beginning of the output data, it is possible for the receiving side to process such as not importing data that is invalid, reducing the processing burden on the receiving side. Also useful.

In the above embodiment, the X address and the memory address to write the pack data are determined by the X address, but other addresses can be specified if there is a one-to-one correspondence between the area where the pack data is recorded and the address for each item code. It may be a method.

In addition, in the above embodiment, the playback device was explained, but
It goes without saying that similar effects can be obtained by applying the present invention to the reproducing circuit section of a recording/reproducing apparatus.

[Effects of the Invention] As stated in the following, according to the present invention, when writing reproduced pack data to memory, the item of the pack data is determined, and the pack data is written to a predetermined memory area based on the item. Since a parity check is also performed at the same time, it is possible to obtain a DΔ-f' subcode reproducing apparatus that can read desired packed data from the memory in a short time.

[Brief explanation of drawings]

Fig. 1 is a block circuit diagram of a subcode reproducing device according to an embodiment of the present invention, Fig. 2 is a diagram showing a memory map of this embodiment, and Fig. 3 is a positional relationship between the R-DAT head, drum, and tape. FIG. 4 is a diagram showing the magnetization pattern of DΔ1゛ and the signal recording area on one track.
Figure 5 is a diagram showing the signal configuration within one block, Figure 6 is a diagram showing the data configuration and item code position of one back that makes up the subcode area, and Figure 7 is recorded on one track. 8 is a block circuit diagram of a conventional subcode reproducing device, and FIG. 9 is a diagram showing a memory map of this conventional device. (1)...Latch, (2)...Memory control circuit, (
3) (205)...Selector, (4)...Flag register, (202)...Demodulation circuit, (203)...
Memory, (204)... Parity check circuit. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] (1) Information data, an item code indicating the classification of the information data, and redundancy for error detection generated from the information data and item code are placed in a part of the track formed diagonally with respect to the longitudinal direction of the tape. A subcode reproducing device that reproduces the pack data using m rotary heads from a magnetic tape on which n pack data consisting of signals are recorded, and an area for storing the pack data for each item code. A memory in which is predetermined, a memory control means for controlling writing and reading of this memory, an error detection means for detecting errors in the reproduced pack data, and an error detection result of the pack data for each item code. A memory means to store,
When writing the reproduced pack data to the above memory, the pack data is written to the memory area corresponding to the item code of the pack, and the memory area where the pack data of the item code once determined to be error-free is written. . A subcode reproducing device comprising: means for prohibiting subsequent writing; and means for reading stored pack data from a memory area corresponding to a desired item code when reading pack data from the memory.