JPH02246618A - Logic circuit - Google Patents

Abstract

PURPOSE:To constitute a NOR gate whose input and output level is matched even when a saturated voltage between the collector and the emitter is high and a component whose input and output characteristic is complicated is employed by using a current mirror circuit. CONSTITUTION:A NOR gate 1 consists of two RHET 2, 3, input resistors R1, R8 and a load resistor R3. Bases and emitters of the two RHET 2, 3 are connected in common and the collector of the RHET 2 connects to the base. The two RHET 2, 3 constitute a so-called current mirror circuit. When both input signals A, B are at 'L', the current I1 scarcely flows. Moreover, when one input is at 'H' level and both the input signals A, B at 'H', the current I1 flows and the current I8 flows to a load resistor R3 by the nature of the current mirror circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a logic circuit, and more particularly to a logic circuit called a NOR gate.

All combinational logic circuits can be constructed with only NAND gates or only NOR gates, so these gates are used extremely often, but with the recent demand for higher integration and higher speeds in LSIs, the number of elements has become smaller. It is required to be able to configure NOR gates and the like.

[Conventional technology]

Conventional NOR gates include those using, for example, bipolar transistors, which have a circuit configuration in which the base input is directly input and the output is taken out from the collector.

[Problem to be solved by the invention]

However, in such a conventional NOR gate circuit configuration, when an "H" level is applied to the base of a transistor and the output is set to "L" level, in order to turn off the next stage transistor with this output, it is necessary to The collector potential must be lower than the base potential. That is, the collector
The saturation voltage between the emitter must be smaller than the rising voltage between the base and emitter.

Here, if a normal bipolar transistor is used as the active element of the NOR gate, there is no problem since the above relationship is satisfied, but if the intention is to increase the integration and speed by reducing the number of constituent elements, for example, When using a device such as a resonant tunneling hot electrotransistor (hereinafter referred to as RHET) proposed by the present applicant, the above relationship is not necessarily satisfied appropriately. Therefore, when using such an element, it is necessary to consider a circuit that matches the input and output levels, but this has not been considered yet, and the problem is that it is not possible to create a NOR gate that meets the demands for high integration. there were.

Note that if there is a DC level difference between the input side and the output side, the circuit becomes complicated because it becomes impossible to connect the circuit directly or a level conversion circuit needs to be interposed.

Here, the structure and principle of RHET have already been proposed and disclosed by the applicant of the present invention (Japanese Unexamined Patent Publication No. 62-18
(See Publication No. 1468). This RHET has negative conductance as an active element and is attracting attention as a high-speed functional element, and FIG. 4 shows the current/voltage characteristics. FIG. 5 shows a structural band diagram of RHET.

The structure of RHET is, for example, n″GaAs collector Nl
o, Collector barrier layer 20 of AfGaAs. n”G
aAS base layer 30. Emitter barrier layer 40 with superlattice structure made of AfGaAs and GaAs and n″GaAs
The emitter layer 50 consists of the following. This transistor has a band diagram as shown in FIG. 5(a) in a thermal equilibrium state, but when a voltage VCt is applied between the emitter 5o and the collector 10 (FIG. 5(b)), the emitter 50
When a predetermined voltage (2) is applied between the emitter and the base 30, the number of electrons injected from the emitter to the base increases, as shown in FIG. 5(C). Then, the electrons injected into the base become hot electrons, which pass through the base at high speed and reach the collector, excluding some electrons that have lost energy due to scattering. Furthermore, when the voltage between the base and emitter is further increased, the injection of electrons from the emitter disappears, as shown in FIG. 5(d), and the collector current decreases. Then, if we further increase the pace emitter voltage,
The collector current increases again.

Therefore, as shown in FIG. 4, a negative resistance region exists due to the resonance tunneling effect, resulting in complicated characteristics. Furthermore, unlike a bipolar transistor, a RHET has a different band structure as shown in Figure 5(a), and a collector barrier (
Barrier) 20 is thick. Furthermore, scattering within the collector barrier, that is, electrons injected from the emitter to the base are scattered within the collector barrier 20 as shown in FIG. ■ Saturation voltage between. Is high.

Therefore, the present invention provides a logic circuit that can achieve high integration by configuring a NOR gate with matching input and output levels even when the device has a high collector-emitter saturation voltage such as RHET. It is an object.

[Means to solve the problem]

In order to achieve the above object, the logic circuit according to the present invention connects the bases and emitters of two transistors in common, and further connects the collector of one transistor to the base, thereby diode-connecting one transistor, and An input resistor is connected to the collector side of the transistor, an input signal is supplied through the input resistor, a load resistor is connected to the collector side of the other transistor, and an output signal is taken out from the collector. When all of the input signals are supplied at high levels, the collector current flowing through the two transistors is smaller than the peak current, and the load resistance is set to be larger than the input resistance, and NOR logic is applied between the input and output. I'm trying to form it.

[Operation] In the present invention, two transistors constitute a current mirror circuit, and when a plurality of inputs are "L'', almost no current flows through both transistors, and the output is "H". On the other hand, when at least one input becomes H++, a current flows, but by making the output saturate from the current when one of the inputs is "H", the output will be "H" even when multiple inputs are "H". becomes low, realizing NOR logic.

Therefore, the level shifts due to the voltage drop caused by the input resistance, so especially when the collector
Even if the element has a high emitter-to-emitter saturation voltage, a NOR gate with matching input and output levels can be constructed.

〔Example〕

Hereinafter, the present invention will be explained based on the drawings.

First, a detailed explanation of the present invention will be given. FIG. 1 is a circuit diagram of a NOR gate according to the invention, where NOR gate 1 is composed of two RHETs 2.3, an input resistor R1°R2 and a load resistor R3. The bases and emitters of the two RHET2.3 are connected in common, and the collector of RHET2 is connected to the base. Therefore, RHE
T2 will be diode-connected, and RHET2.
3 constitutes a so-called current mirror circuit.

Note that Vcc is a high potential power supply, GND is a low potential ground potential, and the emitters of RHET 2.3 are both grounded. The structure of RHET2.3 is the same as that shown in FIG.

In the above configuration, two
When input signals A and B are supplied to two RHETs 2.3 through two input resistors R11R2, and output signal Q is taken out from the collector side of RHET3 with load resistor R1, it is shown in Figure 2 due to the nature of the current mirror circuit. When current 11 is applied to R HE T 2 connected as a diode, the voltage between the emitter and the base is determined according to the current 11, and the current 2 corresponding to that voltage is applied to the other R
The relationship between the two is expressed by the following equation.

I2 n'Hf・IrHtm+n+1: Area ratio of two transistors Hlm: Current amplification factor At this time, since the voltage between the emitter and base of the two RHET2.3 is always the same, for example, the characteristics of the two RHET2.3 made on the same chip If the transistors have the same area, the same current will always flow through them. If the current amplification factor Ht is large and the base current can be ignored, the current 1 flowing into the diode-connected RHET 2 and the current I2 absorbed by the other RHET 3 will be equal. In addition, two RHET
If the area of 2.3 is changed, a current will flow according to the area ratio n.

Therefore, the diode-connected R f-T ET
The current {circle around (2)} flowing through the circuit 2 can be determined by drawing a load line to the emitter-base characteristics. If this load line is drawn, for example, in FIG. 4 shown above, it will become as shown by broken lines ① to ② in the same figure.

Now, when both input signals A and B are °゛L°゛, the current is 1. There is almost no flow (when load line ■). therefore,
The collector current ■2 of RHET3 does not flow and the output signal Q is '
It's H. Also, on the other hand''.

When H11 is applied (when the load line is ■), and when H11 is applied to both input signals A and B (when the load line is), a current ■1 flows, and at this time, the characteristics of the current mirror circuit Therefore, a current I2 of the same value as this naturally tries to flow into the load resistor R3.Here, at least the current when both input signals A and B are input at "H"' is higher than the peak current. Input resistance R,,R
, and by selecting the value of the load resistor R3 so as to be larger than this resistance, "°H°'
Even when a power of 5 is applied, the output signal Q becomes the °L" level, and the logic of the NOR gate 1 can be realized while maintaining a good operating margin. Furthermore, since the current does not exceed the peak current shown in FIG. 4 and go into the negative region at this time, there is no problem at all in determining the NOR logic even if a negative resistance element is used.

Furthermore, with the above configuration, the input signals A and B receive a voltage drop due to the input resistors Rr and Rz connected to the input, respectively, and the RHET forms a current mirror circuit.
2 and 3, the level of the input signal will be shifted. Note that if only the level is to be shifted, it is possible to use a simple resistor (for example, inserting a base resistor) instead of a current mirror circuit, but this is not practical because the operating margin is narrow and stability is lacking.

Therefore, by combining the input resistors Rr, Rz and the current mirror circuit, it is possible to perform a level shift that can be put to practical use for the first time, and thereby the input and output levels can be easily and simply matched without using a complicated circuit. . As a result, even if the element has a high collector-emitter saturation voltage, such as a RHET, a NOR gate with matching input and output levels can be constructed.

Furthermore, even if the element has complex characteristics such as a RHET, which has negative conductance in its input/output characteristics, the design is easy because the two transistors operate in the same way. In other words, operation is almost guaranteed if only two points are taken into account: the current that flows when both inputs are at "H" level should be smaller than the peak current, and the load resistance should be larger than the input resistance. Therefore, it is possible to realize a NOR gate that meets the demands for higher integration and higher speed.

Next, a preferred embodiment of the NOR gate according to the present invention based on the above principle will be described. Figure 3 is a circuit diagram when the circuit in Figure 1 is realized using RHET as an active element.Since the circuit configuration is the same, the active elements are given the same symbols as in Figure 1, and the resistor R , -R, are expressed as resistance values in order to make it easier to understand those at the same position. In addition, Vcc = 2.5 V, GND = OV, and the characteristics of RHE T 2.3 are that the rise voltage is 0.4 V, the peak voltage is 0.8 V, and the peak current is 10 mA. are doing. When this circuit operates as described above, "H"level>2. A result was obtained in which the OV L'' level was <1.OV, and a practically usable NOR gate was realized.

In the above embodiment, the circuit is constructed using a RHET, but the circuit can be constructed in the same way using a normal bipolar transistor, a petrojunction bipolar transistor, or a hot electron transistor.

〔Effect of the invention〕

According to the present invention, by using a current mirror circuit, even if the saturation voltage between the collector and emitter is high and the input/output characteristics are complicated, a NOR gate with matching input and output levels can be constructed. This makes it possible to realize logic circuits that meet the demands for higher integration and higher speed.

[Brief explanation of drawings]

Figure 1.2 is a diagram explaining the present invention in detail, Figure 1 is a circuit diagram of its NOR gate, Figure 2 is a diagram explaining its current mirror circuit, and Figure 3 is a logic diagram according to the present invention. FIG. 4 is a circuit diagram of a NOR gate showing one embodiment of the circuit, FIG. 4 is a diagram showing characteristics of RHET, and FIG. 5 is a diagram showing a structural band diagram of RHET. ■...NOR gate, 2, 3...RHET. Rr, Rz...Input resistance, R3...Load resistance. FIG. 2 is a diagram explaining the current mirror circuit of the present invention. FIG. 2 is a circuit diagram of a NOR gate according to an embodiment. FIG. 3 is a diagram showing the characteristics of RHET.

Claims (1)

[Claims] By connecting the bases and emitters of two transistors in common and further connecting the collector of one transistor to the base, the one transistor is diode-connected, and the input signal is input to the collector side of the other transistor. connect the resistor,
An input signal is supplied through the input resistor, a load resistor is connected to the collector side of the other transistor, and an output signal is taken out from the collector, and at least all of the plurality of input signals are supplied at a high level. Logic characterized in that the collector current flowing through the two transistors is smaller than the peak current and the load resistance is set larger than the input resistance to form a NOR logic between the input and the output. circuit.