JPH02234221A - Image data display system - Google Patents

Abstract

PURPOSE:To evolve an image at a high speed by making use of the access time required for an expanding process to send the image data undergone to a display process system. CONSTITUTION:An image device 4 functions as a 1st process means and a 1st access means respectively; while a display controller 5 functions as a 2nd process means and a 2nd access means respectively. The 2nd access means makes use of the access time set by the 1st access means and the image data undergone a time expanding process is sent to a 2nd process means. Thus the time required for the image display is approximately equal to just the time required for the time expanding process. As a result, an image is evolved at a high speed.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to an image data display system.

(Prior Art) Conventionally, there is an image data display system that performs time expansion processing on time-compressed image data and then develops the time-expanded image data on a display device.

That is, in this system, when a boot command is issued from the CPU, the image device first sequentially reads the time-compressed image data stored at each address of the extended memory and expands the time. Image data is written into an extended memory, and then a display device sequentially reads the time-expanded image data from the extended memory and develops it on a display.

(Problem to be Solved by the Invention) However, the time required for displaying image data, which involves this type of time compression operation, is longer than the time required for displaying image data. There was a problem that it took an extra amount of time and the image development was slow.

The present invention has been made in view of the problems of the prior art, and an object of the present invention is to provide an image data display system that speeds up image development.

[Structure of the Invention] (Means for Solving the Problems) The image data display system of the present invention provides an access request from a first access means for time expansion processing by the first processing means, an address thereof, and an access request from the first access means for time expansion processing by the first processing means. The access request from the second access means and its address for display processing by the second processing means are monitored, and the access address by the second access means does not overtake the access address by the first access means. It is designed to perform arbitration.

(Function) According to the present invention, the second access means utilizes the time between accesses by the first access means to pass the time-expanded image data to the second processing means. , the time required to display the image is reduced to just the time for time expansion processing.

(Example) Examples of the present invention will be described below with reference to the drawings.

In FIG. 1, reference numeral 1 denotes an extended memory as a storage means. This extended memory 1 stores image data, and also stores an image device 4 and a display device 5, which will be described later.
It also stores various data necessary for its processing. 2 is its address bus, and 3 is its data path.

4 is an image device, and this image device 4
It functions as a processing means and a first access means, and accesses the extended memory 1 and compresses and φ-expands the image data. That is, the first
When the system shown in the figure is on the transmitting side, it performs time-axis compression processing on image data, and when it is on the receiving side, it performs time-axis expansion processing on image data. The image device 4 sequentially accesses the extended memory 1 from the first address where the image data is stored. For example, when performing time-axis expansion of image data, specify the write address of the expanded image data as I ADRS, and send the expanded image data as IDATA to the corresponding address in extended memory 1. write to.

5 is a display control device, and 6 is a display device.

The display control device 5 functions as a second processing means and a second access means, and sequentially accesses the extended memory 1 from the first address where the image data is stored. The read address is designated as DADRS, the time-expanded image data is read out as DDATA, and this time-expanded image data is developed on the display screen 6. This display device 6 is constituted by, for example, a cathode ray tube display.

7 is an arbitration circuit, and this arbitration circuit 7 receives access requests from the image device 4 and the display device 5 to the extended memory 1 IREQ, DRE.
Q, access address IADRS, DADRS, bus 2
．． It receives access requests and access ADRS from devices other than the image device 4 and display control device 5 (hereinafter referred to as other devices) connected to the image device 4 and the display control device 5 connected to the controller 3, and performs arbitration for the device Wt4.5 etc. based on these signals. hand,
Generates access permission for each access request, 8 is an access request signal line from the image device 4, 9 is an access permission signal line to the image device 4, 10 is an access request signal line from the display control device 5, 11 is an access permission signal line to the display control device 5.

The image device 4 and the display control device 5 are configured to operate in parallel or in series with each other under the arbitration control of the arbitration circuit 7.
This arbitration circuit 7 is capable of switching between these.

That is, first, to explain the parallel operation, when the arbitration circuit 7 receives access requests IREQ and DREQ from the image device 4 and the display control device 5,
For access IREQ, an access permission IACK is generated unless there is a conflict in the relationship with other devices, and for access request DREQ, in addition to the relationship with other devices, access addresses IADRS, DADRS (however,
IADRS is the decompressed data write address, DADRS is the decompressed data read address), and IADRS is
> Generates access permission DACK when DADRS,
When IADRS≦DADRS, a wait is applied to the display device if5.

Therefore, for example, for addresses in the relationship j>i,
As shown in FIG. 2, first, the image device 4 issues an access request IREQ to the address j, and after the arbitration circuit 7 issues an access permission IACK in response to this, the display device 5 issues an access request D to the address i.
Suppose that REQ is issued. In this case, the arbitration circuit 7 issues an access permission DACK to the display control device 5 as long as there is no conflict with another device since there is a relationship of IADRS>DADRS.

Further, as shown in FIG. 3, it is assumed that the display control device 5 issues an access request DREQ to the address i before the image device 4 issues an access request IREQ to the address j. In this case, the arbitration circuit 7
Since there is a relationship of ADRS≦DADRS, a wait is applied to the display control device 5, and the display control device 5 is
Generates access permission DACK for.

This prevents the display control device 5 from reading image data that has not been subjected to time-axis expansion processing, and ensures that image data that has undergone expansion processing is read out.

In this way, the image data that has been decompressed is transferred to the display control device 5 and sequentially developed on the display device 6 during the decompression processing time of the image device 4, so that the entire image is The time required for expansion is approximately equal to the time required for time axis expansion processing.

Next, in the case of serial operation, as shown in FIG. 4, first, the image device 4 sequentially performs time axis expansion processing on image data from addresses 1 to n.

That is, even if the access request DREQ is issued from the display control device 5, the arbitration circuit 7 continues to wait until all processing by the image device 4 is completed.

When all the processing of the image device 4 is completed, an access permission DACK is issued to the display control device 5. From then on, the image data from address 1 to address n is continuously transferred to the display control device 5, and the image data is transferred to the display control device 5. Development continues.

According to such serial operation, the time required to develop all the images includes time TI for time axis expansion processing and time T2 for display processing. On the other hand, according to the parallel operation shown in FIGS. 2 and 3, the image data is transferred to the display control device 5 using the time T3 between the accesses of the image device RA4. Therefore, the time required to develop the entire image is approximately Tl.

(Effects of the Invention) As explained above, according to the present invention, the time between accesses for decompression processing is used to pass time-expanded image data to the display processing system.Image Display The time required for this process is almost exclusively the time for time expansion processing, and it is possible to achieve high-speed image development.

Furthermore, even if there are images that have not been decompressed, the images will be decompressed sequentially starting from those that have been decompressed, so system users can , you will be able to see it early.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of an image data display system according to the present invention, FIGS. 2 and 3 are time charts of parallel operations according to the present invention by the apparatus shown in FIG. 1, and FIG. 4 is a conventional This is a time chart of the series operation that has been carried out since. 1...Extension memory, 2...Address bus, 3...
Data path, 4... Image device, 5... Display device, 6... Display device, 7... Arbitration circuit, 8.10... Access request signal line, 9.11.
・Access permission signal line

Claims (1)

[Scope of Claims] Storage means for storing image data; first processing means for performing time axis expansion processing on compressed image data; and display for expanding the expanded image data on a display. a second processing means for performing processing; a first access means for writing the decompressed image data of the first processing means into the storage means; and a first access means for reading the decompressed image data from the storage means Second
a second access means that receives an access request and its write address from the first access means and an access request and its read address from the second access means;
arbitration means for generating access permission to the first and second access means so that the write address by the access means does not overtake the read address by the first access means; decompression processing by the means and the second
An image data display system characterized in that display processing by processing means is performed in parallel.