JPH02232931A - Manufacture of semiconductor element - Google Patents

Abstract

PURPOSE:To form a heterojunction structure of an n-AlSb/p-GaSb/n-AlSb in excellent controllability at one time by a method wherein a heterojunction structure of AlSb/GaSb/AlSb is deposited while doping all the deposited layers with Si. CONSTITUTION:An AlSb layer 22, a GaSb layer 23 and an AlSb layer 24 are deposited on an n type GaSb substrate 21 in the face orientation (100) by molecular beam deposition process. At this time, n-AlSb emitter layer/p<+>-GaSb base layer/n<->-AlSb collector layer in this order from the surface are formed to manufacture a structure for an npn hetero transistor. Next, the surfaces of respective layers are exposed in mesa type by the lithography using photoresist as well as an acetic acid base etchant; a master is provided by the lithography using the photoresist again; and then AuSn layers 2b are formed on an n type emitter layer and a collector layer while an AuZn layer 26 is formed on a p type base layer by evaporation process. In such a constitution, SiNx layers 27 are provided by sputtering to protect the AlSb crystal from the water content contained in the air.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides an A I method using Si as a doping impurity.
The present invention relates to a method of manufacturing an npn type heterojunction transistor having an Sb/GaSb/AISb structure.

[Conventional technology]

A I S b / G a S b / A I S
The npn type heterojunction transistor with the b structure is I n
Aj! GaAs-based I n A I G a As
/ 1 n Ga As / 1 n A I.
Similar to npn-type heterojunction transistors having a GaAs structure, GaRB used as a base material has a high electron mobility and a narrow forbidden band width, so it is expected to be a high-speed and low-power consumption device. In addition, the base layer is sandwiched between the emitter layer and the collector layer, and holes are therefore trapped in the base layer, resulting in the so-called Kirk effect, which poses a problem during large current operation. Trans.on Electron
Devices ED-9 (1962) 164)) can also be avoided. However, this Affisb/G
aSb/Aj! When fabricating an npn-type heterojunction transistor with an Sb structure, an n-type Alsb layer is required. It was used.

[Problem to be solved by the invention]

Te is an element with a low vapor pressure and can be used for liquid phase growth, vapor phase growth, etc. Any growth method such as molecular beam growth has poor controllability, and it has been difficult to obtain, for example, a steep doping profile. For example, /lsb by molecular beam growth method
When doping Te in the growth of Te, the molecular beam source cell temperature for Te is as low as about 200°C for the commonly used doping concentration of about 10"cm-'; therefore, the molecular beam source cell temperature The doping concentration fluctuates greatly due to small fluctuations in the temperature, resulting in extremely poor controllability.Similarly, when it is desired to change the doping concentration suddenly and sharply, the controllability of the molecular beam source cell temperature is poor, resulting in a steep doping profile. Formation was difficult.

Furthermore, in the preparation of the p-GaSb layer which is the base layer,
For example, a new molecular beam source cell for doping with acceptor impurities such as Be has become necessary.

An object of the present invention is to provide a method for manufacturing a semiconductor device that solves these problems.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention uses a growth temperature at which Si is doped as a donor impurity in the growth of AlSb, and while doping all growth layers with Si, A I S b / G a S b / A 12s
The method is characterized in that it includes the step of growing the heterojunction structure of b.

[Effect]

Si, a Group Ⅰ element that is generally used as a donor impurity for GaAs crystals, has a low vapor pressure and is an impurity that can be easily controlled.
It is well known that -V group compound semiconductors occupy the group (2) atom position and function as acceptors. Figure 1 shows the measurement results of the carrier concentration and carrier mobility by hole measurement of Si doping for Gasb and AIlSb fabricated on a semi-insulating GaAs substrate by the molecular beam growth method. FIG. 3 is a diagram showing the relationship between the growth temperature T, conductivity type, hole or electron concentration, and mobility μ of the /lsb layer and Gasb layer formed while doping.

For growth, the Al flux amount was set to 1.8XlO-'Torr.
, Ga flux amount is 4.8X10-'Torr, S
b flux amount is 2.7X10-'' Torr, growth rate is 1.2 μm/h, and Si doping concentration is 9.3X.
The growth temperature was set at 10"cm-3, and the growth temperature was varied.

As is clear from this measurement result, Si is 9.3X10
l? cm-' doped Garb exhibited p-type of about 1x10''cm-' over a wide growth temperature range.
It was found that Si in Garb occupies the V group atom position over a wide growth temperature range and acts as an acceptor impurity.

On the other hand, however, for AISb, Si occupies the group II atom position as a donor impurity in the region where the growth temperature is low, and as an acceptor, occupies the V group atom position in the region where the growth temperature is high, starting from around 490°C. It was found that it acts as an impurity. Therefore, from the results of Si doping for /lsb, it was found that for AffiSb, Si can be selectively used as a donor impurity or an acceptor impurity by selecting the growth temperature.

Whether Si, which is an amphoteric impurity, occupies the group II atom position or the group V atom position will be largely influenced by the stoichiometric ratio of /1 atoms and sb atoms on the surface during growth. In the case of the molecular beam growth method, the relationship between the ■ group flux amount and the ■ group flux amount also determines the amount of 8! on the surface during growth. It is also possible to vary the stoichiometric ratio of atoms to sb atoms. however,
It is clear that growth under conditions where there is an order of magnitude difference in flux amount is not only practical in terms of controllability and economy, but also in terms of crystallinity. Under commonly used growth conditions, a method of controlling only the growth temperature is the most advantageous from all viewpoints.

The present invention utilizes the fact that the behavior of Si impurities with respect to GaSb and AfSb is greatly different as shown above. That is, in the growth of A2Sb, Si
A is doped as a donor impurity while doping all grown layers with Si.
If ffiSb, GaSb, and /lsb are grown sequentially, an n-AISb/p-GaSb/n-AISb heterojunction structure can be formed at once with good control.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to FIG.

FIG. 2 shows that A I S b / G a according to the present invention
FIG. 3 is a diagram showing a procedure for creating an nPn type heterojunction transistor having an S b /Aj2Sb structure. Each figure is
FIG. 3 is a cross-sectional view of a sample at each stage.

As shown in Figure 2(a), GaS with plane orientation (100)
On the bi plate 21, by the molecular beam growth method based on the present invention,
First Aj! Sbji22, Garb layer 23, second A
An ISb layer 24 is grown to create a wafer.

The common growth conditions for these growth layers are a growth temperature of 390° C. and an sb flux of 2.7×10 −b Torr.

First, a first AlSb layer 22 with a thickness of 2 μm is formed as a collector layer.
The formation of A2 flux amount 1.8 x 10-'T
orr, Si doping concentration IXIO"cm-'.

Furthermore, the formation of the 0.1 μm GaSb layer 23 serving as the base layer requires a Ga flux amount of 4.8×10-'Torr,
The Si doping concentration was increased by one order of magnitude to IXIO19c.
I went with m-”.

Furthermore, the formation of the second Aisb layer 24 with a thickness of 0.4 μm, which will become an emitter layer, is performed using an A2 flux amount of 1.8X10-'To
rr. Doping concentration of Si
I went there.

When manufactured under these growth conditions, the electrical properties of each layer are such that the first AfSb layer 22 is n-type and has an electron concentration of I
O"cm-", the GaSb layer 23 is p-type and the hole concentration I
It can be expected that the second AffiSb layer 24 is n-type and has an electron concentration IXIO of 17 cm-'. Therefore, the n-AfSb emitter layer/p・
A GaSb base layer/Jl--AlSb collector layer was formed, and a structure of a wafer for an npn type heterojunction transistor was obtained.

Next, as shown in Figure 2(b), using photoresist, lithography technology, and acetic acid-based etchant,
The surface of each layer is exposed in a mesa shape, and then a mask is provided again using photoresist or lithography, and AuSn layer 25 is deposited on the n-type emitter layer and collector layer, and AuZn layer 25 is deposited on the p-type base layer by vapor deposition. layer 2
form 6. Here, an npn type heterojunction transistor structure has been completed, but since the /lsb crystal used for the emitter and collector layers has the property of reacting with water, a second crystal is used to protect it from moisture in the air. As shown in Figure (C), SiN was deposited by sputter deposition except for the areas necessary for wiring. A layer 27 was provided to protect the surface.

n-Aj! created as above! Sb/p''-Ga
Sb/n--Aj! As for the characteristics of the Sb heterojunction transistor, a current gain of 150 was obtained at room temperature. [Effects of the Invention] As described above, according to the present invention, by using only Si impurities with low vapor pressure and high controllability, T with poor controllability
Not only can n-type AlSb[ be formed without using e-impurities, but also AfSb, GaSb, and AffiSb can be formed continuously while doping Si without newly using acceptor impurities such as Be to form p-type GaSb layers. By growing n-AISb/p-GaSb/n
-Alsb heterojunction structure can be formed at once with good control.

In addition, in the present invention, A. j! GaSb crystal A/! It is clear that similar effects can be expected when used in place of Sb[.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the relationship between the growth temperature, conductivity type, hole or electron concentration, and mobility of an Affisb layer and a GaSb layer formed by doping 31 on a semi-insulating GaAs substrate by the molecular beam growth method, FIG. 2 shows that Af according to the present invention is
FIG. 2 is a diagram showing a procedure for manufacturing an npn type heterojunction transistor having a Sb/GaSb/AISb structure. 21...Garb board 22...1st An! Sb layer 23...Garb layer 24...Second AffiSb layer 25...AuSnN 26...AuZnN 27...SiN. Layered agent Patent attorney Yoshihiro Iwasa Yoshihiro Iwasa's temperature ('C) (a) (b) ○00/T9 (1/K) Figure (C) Figure 2 Procedure amendment 5. Subject of amendment: 1999 1.6.9 Detailed description of the invention in the description

Claims (1)

[Claims] (1) Using a growth temperature at which Si is doped as a donor impurity in the growth of AlSb, all growth layers are doped with Si while forming AlSb/GaSb/AlSb.
A method for manufacturing a semiconductor device, comprising the step of growing a heterojunction structure as described in (b).