JPH0249422A - Manufacture of silicon carbide semiconductor device - Google Patents

Manufacture of silicon carbide semiconductor device

Info

Publication number
JPH0249422A
JPH0249422A JP20091988A JP20091988A JPH0249422A JP H0249422 A JPH0249422 A JP H0249422A JP 20091988 A JP20091988 A JP 20091988A JP 20091988 A JP20091988 A JP 20091988A JP H0249422 A JPH0249422 A JP H0249422A
Authority
JP
Japan
Prior art keywords
silicon carbide
ion
layer
implanted
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20091988A
Other languages
Japanese (ja)
Inventor
Masaki Furukawa
勝紀 古川
Akira Suzuki
彰 鈴木
Mitsuhiro Shigeta
光浩 繁田
Yoshihisa Fujii
藤井 良久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP20091988A priority Critical patent/JPH0249422A/en
Publication of JPH0249422A publication Critical patent/JPH0249422A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046Making n or p doped regions or layers, e.g. using diffusion using ion implantation

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

PURPOSE:To enable the title silicon carbide semiconductor device to be electrically activated sufficiently even if the device is implanted with group III element ion at around room temperature by a method wherein a silicon carbide semiconductor layer is implanted with silicon ion and group III element ion while a process to form a P type conductive layer is included. CONSTITUTION:A non-doped SiC single crystal layer 2 is deposited on an Si single crystal substrate 1. An SiO2 film 3 is formed on the whole surface of the single crystal layer 2 and then an opening is made in specified region on the SiO2 film 3. Next, an Si ion implanted layer 4 is formed by implanting Si(<28>Si<+>) ion in an opening part in the single crystal layer 2. Successively, a mixed ion implanted layer 5 with Si ion and B ion is formed by implanting B(<11>B<+>) ion in the implanted layer 4. Then, the mixed ion implanted layer 5 is activated to form a p type conductive layer 5' by annealing process in Ar atmosphere. Finally, Al electrodes 6 and 7 are formed by making openings in the specified regions in the film 3 to evaporate aluminum.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は炭化珪素半導体装置、特にp型伝導層を有する
炭化珪素半導体装置の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a silicon carbide semiconductor device, particularly a silicon carbide semiconductor device having a p-type conductive layer.

(従来の技術) 珪素(Si)を初めとして、ヒ化ガリウム(GaAs)
やリン化ガリウム(GaP)などの化合物半導体を用い
た半導体装置(例えば、ダイオード、トランジスタ、集
積回路、大規模集積回路2発光ダイオード。
(Prior art) In addition to silicon (Si), gallium arsenide (GaAs)
Semiconductor devices (e.g., diodes, transistors, integrated circuits, large-scale integrated circuits, 2 light emitting diodes, etc.) using compound semiconductors such as gallium phosphide (GaP) and gallium phosphide (GaP).

半導体レーザ、および電荷結合素子)がエレクトロニク
スの各分野において広範囲に実用化されている。
BACKGROUND ART Semiconductor lasers and charge-coupled devices have been widely used in various fields of electronics.

炭化珪素(SiC)は広い禁制帯幅(2,2〜3.3e
V)を有する半導体材料であって、熱的、化学的、およ
び機械的に極めて安定であり、放射線損傷にも強いとい
う優れた特徴を持っている。珪素のような従来の半導体
材料を用いた半導体装置は、特に高温、高出力駆動、放
射線照射などの苛酷な条件下では使用が困難である。従
って、炭化珪素を用いた半導体装置は、このような苛酷
な条件下でも使用し得る半導体装置として広範な分野で
の応用が期待されている。
Silicon carbide (SiC) has a wide forbidden band width (2.2~3.3e
V), and has the excellent characteristics of being extremely stable thermally, chemically, and mechanically, and resistant to radiation damage. Semiconductor devices using conventional semiconductor materials such as silicon are difficult to use, especially under harsh conditions such as high temperatures, high power drives, and radiation exposure. Therefore, semiconductor devices using silicon carbide are expected to be applied in a wide range of fields as semiconductor devices that can be used even under such severe conditions.

しかしながら、大きな面積を有し、かつ高品質の炭化珪
素単結晶を、生産性を考慮した工業的規模で安定に供給
し得る結晶成長技術は確率されていない、それゆえ、炭
化珪素は、上述のような多くの利点および可能性を有す
る半導体材料であるにもかかわらず、その実用化が阻ま
れている。
However, no crystal growth technology has been established that can stably supply silicon carbide single crystals with a large area and high quality on an industrial scale in consideration of productivity.Therefore, silicon carbide is Although semiconductor materials have many advantages and possibilities, their practical application has been hindered.

従来、研究室規模では1例えば昇華再結晶法(レーリー
法)で炭化珪素単結晶を成長させたり。
Conventionally, on a laboratory scale, silicon carbide single crystals have been grown using, for example, the sublimation recrystallization method (Rayleigh method).

該方法で得られた炭化珪素単結晶を基板として。Using the silicon carbide single crystal obtained by this method as a substrate.

その上に気相成長法(CVD法)や液相エピタキシャル
成長法(LP!i法)で炭化珪素単結晶層をエピタキシ
ャル成長させることにより、半導体装置の試作が可能な
サイズの炭化珪素単結晶を得ている。しかしながら、こ
れらの方法では、得られた単結晶の面積が小さく、その
寸法や形状を高精度に制御することは困難である。また
、炭化珪素が有する結晶多形および不純物濃度の制御も
容易ではない。
By epitaxially growing a silicon carbide single crystal layer thereon using vapor phase growth (CVD) or liquid phase epitaxial growth (LP!i), a silicon carbide single crystal of a size that is suitable for prototyping semiconductor devices is obtained. There is. However, with these methods, the area of the obtained single crystal is small, and it is difficult to control its size and shape with high precision. Furthermore, it is not easy to control the crystal polymorphism and impurity concentration of silicon carbide.

これらの問題点を解決するために1本発明者らは、安価
で入手の容易な珪素単結晶基板上に、大きな面積を有す
る良質の炭化珪素単結晶を気相成長させる方法を提案し
た(特開昭59−203799号)。
In order to solve these problems, the present inventors proposed a method of vapor phase growth of a high-quality silicon carbide single crystal with a large area on an inexpensive and easily available silicon single crystal substrate (particularly (No. 59-203799).

該方法において、炭化珪素を気相成長させる際に不純物
を添加すれば、得られた炭化珪素単結晶における不純物
濃度および伝導型を制御することは可能である。しかし
ながら、気相成長を行う温度が高いため2例えばpn接
合を設けた半導体装置の電気的特性はあまり良好ではな
い。従って、上記の方法は、不純物が添加された炭化珪
素半導体層を形成するのに適していない。
In this method, if an impurity is added during vapor phase growth of silicon carbide, it is possible to control the impurity concentration and conductivity type in the obtained silicon carbide single crystal. However, since the temperature for vapor phase growth is high, the electrical characteristics of a semiconductor device provided with, for example, a pn junction are not very good. Therefore, the above method is not suitable for forming a silicon carbide semiconductor layer doped with impurities.

珪素を用いた半導体装置、特にプレーナ構造の半導体装
置の作製には、不純物熱拡散法またはイオン注入法が必
要不可欠なプロセス技術として広く用いられている。
BACKGROUND ART Impurity thermal diffusion or ion implantation is widely used as an indispensable process technique for manufacturing semiconductor devices using silicon, particularly semiconductor devices with a planar structure.

(発明が解決しようとする課題) しかしながら、炭化珪素における不純物の拡散定数は小
さく、また1 、 600℃以上の拡散温度が必要であ
るため、不純物熱拡散法は炭化珪素半導体のプロセス技
術として適当ではない。
(Problem to be Solved by the Invention) However, the impurity diffusion constant in silicon carbide is small and a diffusion temperature of 1,600°C or higher is required, so the impurity thermal diffusion method is not suitable as a process technology for silicon carbide semiconductors. do not have.

イオン注入法については、V族元素イオン(例えば、窒
素(N)イオンやリン(P)イオン)の注入が行われて
おり、これらイオンが注入された炭化珪素は熱アニール
処理により電気的に活性化する。
Regarding the ion implantation method, group V element ions (for example, nitrogen (N) ions and phosphorus (P) ions) are implanted, and silicon carbide into which these ions are implanted becomes electrically active by thermal annealing. become

しかしながら、炭化珪素に■族元素イオンを注入した場
合には、注入された不純物イオンが理論通りに炭化珪素
中に分布しているにもかかわらず該炭化珪素の電気的活
性化は充分に行われない。
However, when group Ⅰ element ions are implanted into silicon carbide, the silicon carbide is not sufficiently electrically activated even though the implanted impurity ions are distributed in the silicon carbide as theoretically expected. do not have.

実際、基板温度823Kにおいてアルミニウム(AI)
を炭化珪素にイオン注入した例(J、A、Edmond
 et al、。
In fact, at a substrate temperature of 823K, aluminum (AI)
An example of ion implantation into silicon carbide (J, A, Edmond
et al.

J、Appl、Phys、63.922(1988))
が報告されているだけであり、室温付近で■族元素イオ
ンを注入し。
J. Appl. Phys. 63.922 (1988))
has only been reported by implanting group ■ element ions at around room temperature.

電気的な活性化が認めら、れた例はない。There are no cases where electrical activation has been observed.

本発明は上記従来の問題点を解決するものであり、その
目的とするところは、室温付近で■族元素イオンを注入
しても、充分に電気的な活性化が行われる。p型伝導層
を有する炭化珪素半導体装置の製造方法を提供すること
にある。
The present invention is intended to solve the above-mentioned conventional problems, and its purpose is to achieve sufficient electrical activation even when group (I) element ions are implanted near room temperature. An object of the present invention is to provide a method for manufacturing a silicon carbide semiconductor device having a p-type conductive layer.

(課題を解決するための手段) 本発明は、 p型伝導層を有する炭化珪素半導体装置の
製造方法であって、炭化珪素半導体層に珪素イオンと■
族元素イオンとを注入することによりp型伝導層を形成
する工程を包含し、そのことにより上記目的が達成され
る。
(Means for Solving the Problems) The present invention provides a method for manufacturing a silicon carbide semiconductor device having a p-type conduction layer, which comprises adding silicon ions and
forming a p-type conductive layer by implanting group element ions, thereby achieving the above object.

炭化珪素半導体に■族元素イオンのみを注入しても活性
化されない。これに対し、珪素半導体では、イオン注入
された■族元素イオンが容易に活性化する。そこで1本
発明の製造方法においては。
Even if only group Ⅰ element ions are implanted into a silicon carbide semiconductor, it will not be activated. On the other hand, in silicon semiconductors, implanted group Ⅰ element ions are easily activated. Therefore, in the manufacturing method of the present invention.

炭化珪素半導体層に珪素イオンと■族元素イオンとを注
入し、過剰の珪素イオンが存在する状態で■族元素イオ
ンの活性化を行う。そして、このことにより、炭化珪素
半導体層における■族元素イオンは容易に活性化される
Silicon ions and group Ⅰ element ions are implanted into the silicon carbide semiconductor layer, and the group Ⅰ element ions are activated in the presence of excess silicon ions. As a result, group (I) element ions in the silicon carbide semiconductor layer are easily activated.

イオン注入を行う際には、まず珪素イオンを注入した後
、続いて■族元素イオンを注入するか。
When performing ion implantation, do you first implant silicon ions and then implant group (I) element ions?

あるいは珪素イオンと■族元素イオンとを同時に注入す
ることができる。
Alternatively, silicon ions and Group I element ions can be implanted simultaneously.

イオン注入する■族元素イオンとしては2例えばホウ素
(B)イオン、アルミニウム(AI)イオンガリウム(
Ga)イオンなどが挙げられる。
Examples of group II element ions to be implanted include boron (B) ions, aluminum (AI) ions, gallium (
Examples include Ga) ions.

(実施例) 以下に本発明を実施例について述べる。(Example) The present invention will be described below with reference to examples.

本実施例では■族元素イオンとしてホウ素イオンを用い
た場合について説明する。
In this example, a case will be explained in which boron ions are used as the group Ⅰ element ions.

まず、第1図℃)に示すように、気相成長(CVD)法
により、Si単結晶基板1上にノンドープSiC単結晶
層2を成長させた。そして、ノンドープSiC単結晶層
2上の全面に厚さが約s、ooo人のSiO2膜3を形
成した後、第1図(C)に示すように、 Sin、膜3
の所定領域をエツチングにより開口した。
First, as shown in FIG. 1 (° C.), a non-doped SiC single crystal layer 2 was grown on a Si single crystal substrate 1 by a vapor phase epitaxy (CVD) method. Then, after forming an SiO2 film 3 of approximately 1000 m thick over the entire surface of the non-doped SiC single crystal layer 2, as shown in FIG.
An opening was made in a predetermined area by etching.

次いで、イオン注入装置を用いて、ノンドープSiC単
結晶層2の開口部分にSt (”・St” )イオンを
注入することにより、第1図(財)に示すように。
Next, using an ion implantation device, St (".St") ions are implanted into the opening portion of the non-doped SiC single crystal layer 2, as shown in FIG.

Siイオン注入層4を形成した。注入条件としては。A Si ion implantation layer 4 was formed. As for the injection conditions.

加速電圧が180keV、およびSiイオンの注入量が
5XIO14C1−”であった、引き続いて、Siイオ
ン注入層4にB(”B”)イオンを注入することにより
By subsequently implanting B ("B") ions into the Si ion implantation layer 4, the acceleration voltage was 180 keV and the implantation amount of Si ions was 5XIO14C1-".

第1図(e)に示すように、SiイオンとBイオンとが
混在する混合イオン注入層5を形成した。注入条件とし
ては、加速電圧が70keV、およびBイオンの注入量
がI Xl01SC1−”であった。
As shown in FIG. 1(e), a mixed ion implantation layer 5 containing Si ions and B ions was formed. The implantation conditions were that the acceleration voltage was 70 keV and the amount of B ions implanted was IXl01SC1-''.

そして、 Ar雰囲気下、  1.100°Cにて30
分間のアニール処理を行うことにより、混合イオン注入
層5を活性化させた。熱探針法およびホール測定法で調
べたところ、 p型伝導層5°(第1図(a))が形成
されていることがわかった。
And 30 at 1.100°C under Ar atmosphere.
The mixed ion implantation layer 5 was activated by performing an annealing treatment for 1 minute. When examined using the thermal probe method and the Hall measurement method, it was found that a p-type conductive layer of 5° (Fig. 1(a)) was formed.

最後に、 SiOx膜3の所定領域を開口してアルミニ
ウムを蒸着することにより^l電極6および7を形成し
、第1図(a)に示すような炭化珪素半導体装置を得た
。このようにして得られた炭化珪素半導体装置の電流−
電圧特性を測定したところ、第2図の実線で表されるよ
うに、良好な整流特性を示した。
Finally, electrodes 6 and 7 were formed by opening a predetermined region of SiOx film 3 and depositing aluminum to obtain a silicon carbide semiconductor device as shown in FIG. 1(a). Current of the silicon carbide semiconductor device thus obtained -
When the voltage characteristics were measured, as shown by the solid line in FIG. 2, good rectification characteristics were shown.

比較のために、Siイオンの注入を行わずに、 Bイオ
ンだけを注入すること以外は同様にして炭化珪素半導体
装置を作製した。このような半導体装置は、第2図の点
線で表されるように1高抵抗にはなっているが整流特性
を示さなかった。
For comparison, a silicon carbide semiconductor device was manufactured in the same manner except that only B ions were implanted without implanting Si ions. Although such a semiconductor device had a high resistance as indicated by the dotted line in FIG. 2, it did not exhibit rectifying characteristics.

(発明の効果) 本発明の製造方法によれば、このように、p型不純物で
ある■族元素イオンを炭化珪素にイオン注入することが
可能となり、p型伝導層を有する炭化珪素半導体装置が
得られる。該製造方法は。
(Effects of the Invention) According to the manufacturing method of the present invention, it is possible to ion-implant group III element ions, which are p-type impurities, into silicon carbide, and a silicon carbide semiconductor device having a p-type conduction layer can be manufactured. can get. The manufacturing method is:

通常のイオン注入技術を利用しているため、炭化珪素半
導体を用いたトランジスタや集積回路などの半導体装置
を工業的規模で生産することが可能となる。
Since ordinary ion implantation technology is used, semiconductor devices such as transistors and integrated circuits using silicon carbide semiconductors can be produced on an industrial scale.

4  ゛  の   な  日 第1図(a)は本発明の一実施例である製造方法により
作製された炭化珪素半導体装置の断面図、第1図伽)〜
(8)は該炭化珪素半導体装置の製造途中における断面
図、第2図は該炭化珪素半導体装置の電流−電圧特性(
実線)と、比較例である炭化珪素半導体装置の電流−電
圧特性(点線)とを表す図である。
Figure 1(a) is a cross-sectional view of a silicon carbide semiconductor device manufactured by a manufacturing method that is an embodiment of the present invention.
(8) is a cross-sectional view of the silicon carbide semiconductor device in the middle of manufacturing, and FIG. 2 is a current-voltage characteristic of the silicon carbide semiconductor device (
FIG. 4 is a diagram showing current-voltage characteristics (dotted line) of a silicon carbide semiconductor device as a comparative example.

1・・・St単結晶基板、2・・・ノンドープSiC単
結晶層、3・・・5ift膜、4・・・Siイオン注入
層、5・・・混合イオン注入層、5゛・・・p型伝導層
、6,7・・・Alt橿。
DESCRIPTION OF SYMBOLS 1... St single crystal substrate, 2... Non-doped SiC single crystal layer, 3... 5ift film, 4... Si ion implantation layer, 5... Mixed ion implantation layer, 5'...p Type conductive layer, 6, 7... Alt rod.

以上 第1図that's all Figure 1

Claims (1)

【特許請求の範囲】 1、p型伝導層を有する炭化珪素半導体装置の製造方法
であって、 炭化珪素半導体層に珪素イオンとIII族元素イオンとを
注入することによりp型伝導層を形成する工程、 を包含する炭化珪素半導体装置の製造方法。
[Claims] 1. A method for manufacturing a silicon carbide semiconductor device having a p-type conductive layer, the p-type conductive layer being formed by implanting silicon ions and group III element ions into the silicon carbide semiconductor layer. A method for manufacturing a silicon carbide semiconductor device, comprising the steps of:
JP20091988A 1988-08-11 1988-08-11 Manufacture of silicon carbide semiconductor device Pending JPH0249422A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20091988A JPH0249422A (en) 1988-08-11 1988-08-11 Manufacture of silicon carbide semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20091988A JPH0249422A (en) 1988-08-11 1988-08-11 Manufacture of silicon carbide semiconductor device

Publications (1)

Publication Number Publication Date
JPH0249422A true JPH0249422A (en) 1990-02-19

Family

ID=16432456

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20091988A Pending JPH0249422A (en) 1988-08-11 1988-08-11 Manufacture of silicon carbide semiconductor device

Country Status (1)

Country Link
JP (1) JPH0249422A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5135885A (en) * 1989-03-27 1992-08-04 Sharp Corporation Method of manufacturing silicon carbide fets
WO1994017547A1 (en) * 1993-01-25 1994-08-04 North Carolina State University Method of manufacturing a silicon carbide field effect transistor
US6133120A (en) * 1995-08-28 2000-10-17 Nippondenso Co., Ltd. Boron-doped p-type single crystal silicon carbide semiconductor and process for preparing same
DE112009000678T5 (en) 2008-03-28 2011-03-03 Honda Motor Co., Ltd. Engine balancer
JP2020113565A (en) * 2019-01-08 2020-07-27 トヨタ自動車株式会社 Manufacturing method of silicon carbide semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5135885A (en) * 1989-03-27 1992-08-04 Sharp Corporation Method of manufacturing silicon carbide fets
WO1994017547A1 (en) * 1993-01-25 1994-08-04 North Carolina State University Method of manufacturing a silicon carbide field effect transistor
US6133120A (en) * 1995-08-28 2000-10-17 Nippondenso Co., Ltd. Boron-doped p-type single crystal silicon carbide semiconductor and process for preparing same
DE112009000678T5 (en) 2008-03-28 2011-03-03 Honda Motor Co., Ltd. Engine balancer
JP2020113565A (en) * 2019-01-08 2020-07-27 トヨタ自動車株式会社 Manufacturing method of silicon carbide semiconductor device

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